1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox Technologies, Ltd
5 .. include:: <isonum.txt>
7 MLX5 Ethernet Poll Mode Driver
8 ==============================
10 The mlx5 Ethernet poll mode driver library (**librte_net_mlx5**) provides support
11 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** , **Mellanox
12 ConnectX-5**, **Mellanox ConnectX-6**, **Mellanox ConnectX-6 Dx**, **Mellanox
13 ConnectX-6 Lx**, **Mellanox BlueField** and **Mellanox BlueField-2** families
14 of 10/25/40/50/100/200 Gb/s adapters as well as their virtual functions (VF)
21 Besides its dependency on libibverbs (that implies libmlx5 and associated
22 kernel support), librte_net_mlx5 relies heavily on system calls for control
23 operations such as querying/updating the MTU and flow control parameters.
25 This capability allows the PMD to coexist with kernel network interfaces
26 which remain functional, although they stop receiving unicast packets as
27 long as they share the same MAC address.
28 This means legacy linux control tools (for example: ethtool, ifconfig and
29 more) can operate on the same network interfaces that owned by the DPDK
32 See :doc:`../../platform/mlx5` guide for more design details.
37 - Multi arch support: x86_64, POWER8, ARMv8, i686.
38 - Multiple TX and RX queues.
40 - Rx queue delay drop.
41 - Support steering for external Rx queue created outside the PMD.
42 - Support for scattered TX frames.
43 - Advanced support for scattered Rx frames with tunable buffer attributes.
44 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
45 - RSS using different combinations of fields: L3 only, L4 only or both,
46 and source only, destination only or both.
47 - Several RSS hash keys, one for each flow type.
48 - Default RSS operation with no hash key specification.
49 - Configurable RETA table.
50 - Link flow control (pause frame).
51 - Support for multiple MAC addresses.
55 - RX CRC stripping configuration.
56 - TX mbuf fast free offload.
57 - Promiscuous mode on PF and VF.
58 - Multicast promiscuous mode on PF and VF.
59 - Hardware checksum offloads.
60 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
62 - Flow API, including :ref:`flow_isolated_mode`.
64 - KVM and VMware ESX SR-IOV modes are supported.
65 - RSS hash result is supported.
66 - Hardware TSO for generic IP or UDP tunnel, including VXLAN and GRE.
67 - Hardware checksum Tx offload for generic IP or UDP tunnel, including VXLAN and GRE.
69 - Statistics query including Basic, Extended and per queue.
71 - Tunnel types: VXLAN, L3 VXLAN, VXLAN-GPE, GRE, MPLSoGRE, MPLSoUDP, IP-in-IP, Geneve, GTP.
72 - Tunnel HW offloads: packet type, inner/outer RSS, IP and UDP checksum verification.
73 - NIC HW offloads: encapsulation (vxlan, gre, mplsoudp, mplsogre), NAT, routing, TTL
74 increment/decrement, count, drop, mark. For details please see :ref:`mlx5_offloads_support`.
75 - Flow insertion rate of more then million flows per second, when using Direct Rules.
76 - Support for multiple rte_flow groups.
77 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
80 - Multiple-thread flow insertion.
81 - Matching on IPv4 Internet Header Length (IHL).
82 - Matching on GTP extension header with raw encap/decap action.
83 - Matching on Geneve TLV option header with raw encap/decap action.
84 - Matching on ESP header SPI field.
85 - RSS support in sample action.
86 - E-Switch mirroring and jump.
87 - E-Switch mirroring and modify.
88 - 21844 flow priorities for ingress or egress flow groups greater than 0 and for any transfer
90 - Flow metering, including meter policy API.
91 - Flow meter hierarchy.
92 - Flow integrity offload API.
93 - Connection tracking.
94 - Sub-Function representors.
103 On Windows, the features are limited:
105 - Promiscuous mode is not supported
106 - The following rules are supported:
108 - IPv4/UDP with CVLAN filtering
109 - Unicast MAC filtering
111 - Additional rules are supported from WinOF2 version 2.70:
113 - IPv4/TCP with CVLAN filtering
114 - L4 steering rules for port RSS of UDP, TCP and IP
116 - For secondary process:
118 - Forked secondary process not supported.
119 - MPRQ is not supported. Callback to free externally attached MPRQ buffer is set
120 in a primary process, but has a different virtual address in a secondary process.
121 Calling a function at the wrong address leads to a segmentation fault.
122 - External memory unregistered in EAL memseg list cannot be used for DMA
123 unless such memory has been registered by ``mlx5_mr_update_ext_mp()`` in
124 primary process and remapped to the same virtual address in secondary
125 process. If the external memory is registered by primary process but has
126 different virtual address in secondary process, unexpected error may happen.
130 - Counters of received packets and bytes number of devices in same share group are same.
131 - Counters of received packets and bytes number of queues in same group and queue ID are same.
133 - When using Verbs flow engine (``dv_flow_en`` = 0), flow pattern without any
134 specific VLAN will match for VLAN packets as well:
136 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
137 Meaning, the flow rule::
139 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
141 Will only match vlan packets with vid=3. and the flow rule::
143 flow create 0 ingress pattern eth / ipv4 / end ...
145 Will match any ipv4 packet (VLAN included).
147 - When using Verbs flow engine (``dv_flow_en`` = 0), multi-tagged(QinQ) match is not supported.
149 - When using DV flow engine (``dv_flow_en`` = 1), flow pattern with any VLAN specification will match only single-tagged packets unless the ETH item ``type`` field is 0x88A8 or the VLAN item ``has_more_vlan`` field is 1.
152 flow create 0 ingress pattern eth / ipv4 / end ...
154 Will match any ipv4 packet.
157 flow create 0 ingress pattern eth / vlan / end ...
158 flow create 0 ingress pattern eth has_vlan is 1 / end ...
159 flow create 0 ingress pattern eth type is 0x8100 / end ...
161 Will match single-tagged packets only, with any VLAN ID value.
164 flow create 0 ingress pattern eth type is 0x88A8 / end ...
165 flow create 0 ingress pattern eth / vlan has_more_vlan is 1 / end ...
167 Will match multi-tagged packets only, with any VLAN ID value.
169 - A flow pattern with 2 sequential VLAN items is not supported.
171 - VLAN pop offload command:
173 - Flow rules having a VLAN pop offload command as one of their actions and
174 are lacking a match on VLAN as one of their items are not supported.
175 - The command is not supported on egress traffic in NIC mode.
177 - VLAN push offload is not supported on ingress traffic in NIC mode.
179 - VLAN set PCP offload is not supported on existing headers.
181 - A multi segment packet must have not more segments than reported by dev_infos_get()
182 in tx_desc_lim.nb_seg_max field. This value depends on maximal supported Tx descriptor
183 size and ``txq_inline_min`` settings and may be from 2 (worst case forced by maximal
184 inline settings) to 58.
186 - Match on VXLAN supports the following fields only:
189 - Last reserved 8-bits
191 Last reserved 8-bits matching is only supported When using DV flow
192 engine (``dv_flow_en`` = 1).
193 For ConnectX-5, the UDP destination port must be the standard one (4789).
194 Group zero's behavior may differ which depends on FW.
195 Matching value equals 0 (value & mask) is not supported.
197 - L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with MPLSoGRE and MPLSoUDP.
199 - Match on Geneve header supports the following fields only:
206 - Match on Geneve TLV option is supported on the following fields:
213 Only one Class/Type/Length Geneve TLV option is supported per shared device.
214 Class/Type/Length fields must be specified as well as masks.
215 Class/Type/Length specified masks must be full.
216 Matching Geneve TLV option without specifying data is not supported.
217 Matching Geneve TLV option with ``data & mask == 0`` is not supported.
219 - VF: flow rules created on VF devices can only match traffic targeted at the
220 configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).
222 - Match on GTP tunnel header item supports the following fields only:
224 - v_pt_rsv_flags: E flag, S flag, PN flag
228 - Match on GTP extension header only for GTP PDU session container (next
229 extension header type = 0x85).
230 - Match on GTP extension header is not supported in group 0.
234 - Hardware support: BlueField-2.
235 - Flex item is supported on PF only.
236 - Hardware limits ``header_length_mask_width`` up to 6 bits.
237 - Firmware supports 8 global sample fields.
238 Each flex item allocates non-shared sample fields from that pool.
239 - Supported flex item can have 1 input link - ``eth`` or ``udp``
240 and up to 2 output links - ``ipv4`` or ``ipv6``.
241 - Flex item fields (``next_header``, ``next_protocol``, ``samples``)
242 do not participate in RSS hash functions.
243 - In flex item configuration, ``next_header.field_base`` value
244 must be byte aligned (multiple of 8).
246 - No Tx metadata go to the E-Switch steering domain for the Flow group 0.
247 The flows within group 0 and set metadata action are rejected by hardware.
251 MAC addresses not already present in the bridge table of the associated
252 kernel network device will be added and cleaned up by the PMD when closing
253 the device. In case of ungraceful program termination, some entries may
254 remain present and should be removed manually by other means.
256 - Buffer split offload is supported with regular Rx burst routine only,
257 no MPRQ feature or vectorized code can be engaged.
259 - When Multi-Packet Rx queue is configured (``mprq_en``), a Rx packet can be
260 externally attached to a user-provided mbuf with having RTE_MBUF_F_EXTERNAL in
261 ol_flags. As the mempool for the external buffer is managed by PMD, all the
262 Rx mbufs must be freed before the device is closed. Otherwise, the mempool of
263 the external buffers will be freed by PMD and the application which still
264 holds the external buffers may be corrupted.
265 User-managed mempools with external pinned data buffers
266 cannot be used in conjunction with MPRQ
267 since packets may be already attached to PMD-managed external buffers.
269 - If Multi-Packet Rx queue is configured (``mprq_en``) and Rx CQE compression is
270 enabled (``rxq_cqe_comp_en``) at the same time, RSS hash result is not fully
271 supported. Some Rx packets may not have RTE_MBUF_F_RX_RSS_HASH.
273 - IPv6 Multicast messages are not supported on VM, while promiscuous mode
274 and allmulticast mode are both set to off.
275 To receive IPv6 Multicast messages on VM, explicitly set the relevant
276 MAC address using rte_eth_dev_mac_addr_add() API.
278 - To support a mixed traffic pattern (some buffers from local host memory, some
279 buffers from other devices) with high bandwidth, a mbuf flag is used.
281 An application hints the PMD whether or not it should try to inline the
282 given mbuf data buffer. PMD should do the best effort to act upon this request.
284 The hint flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE`` is dynamic,
285 registered by application with rte_mbuf_dynflag_register(). This flag is
286 purely driver-specific and declared in PMD specific header ``rte_pmd_mlx5.h``,
287 which is intended to be used by the application.
289 To query the supported specific flags in runtime,
290 the function ``rte_pmd_mlx5_get_dyn_flag_names`` returns the array of
291 currently (over present hardware and configuration) supported specific flags.
292 The "not inline hint" feature operating flow is the following one:
295 - probe the devices, ports are created
296 - query the port capabilities
297 - if port supporting the feature is found
298 - register dynamic flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE``
299 - application starts the ports
300 - on ``dev_start()`` PMD checks whether the feature flag is registered and
301 enables the feature support in datapath
302 - application might set the registered flag bit in ``ol_flags`` field
303 of mbuf being sent and PMD will handle ones appropriately.
305 - The amount of descriptors in Tx queue may be limited by data inline settings.
306 Inline data require the more descriptor building blocks and overall block
307 amount may exceed the hardware supported limits. The application should
308 reduce the requested Tx size or adjust data inline settings with
309 ``txq_inline_max`` and ``txq_inline_mpw`` devargs keys.
311 - To provide the packet send scheduling on mbuf timestamps the ``tx_pp``
312 parameter should be specified.
313 When PMD sees the RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME set on the packet
314 being sent it tries to synchronize the time of packet appearing on
315 the wire with the specified packet timestamp. It the specified one
316 is in the past it should be ignored, if one is in the distant future
317 it should be capped with some reasonable value (in range of seconds).
318 These specific cases ("too late" and "distant future") can be optionally
319 reported via device xstats to assist applications to detect the
320 time-related problems.
322 The timestamp upper "too-distant-future" limit
323 at the moment of invoking the Tx burst routine
324 can be estimated as ``tx_pp`` option (in nanoseconds) multiplied by 2^23.
325 Please note, for the testpmd txonly mode,
326 the limit is deduced from the expression::
328 (n_tx_descriptors / burst_size + 1) * inter_burst_gap
330 There is no any packet reordering according timestamps is supposed,
331 neither within packet burst, nor between packets, it is an entirely
332 application responsibility to generate packets and its timestamps
333 in desired order. The timestamps can be put only in the first packet
334 in the burst providing the entire burst scheduling.
336 - E-Switch decapsulation Flow:
338 - can be applied to PF port only.
339 - must specify VF port action (packet redirection from PF to VF).
340 - optionally may specify tunnel inner source and destination MAC addresses.
342 - E-Switch encapsulation Flow:
344 - can be applied to VF ports only.
345 - must specify PF port action (packet redirection from VF to PF).
349 - The input buffer, used as outer header, is not validated.
353 - The decapsulation is always done up to the outermost tunnel detected by the HW.
354 - The input buffer, providing the removal size, is not validated.
355 - The buffer size must match the length of the headers to be removed.
357 - ICMP(code/type/identifier/sequence number) / ICMP6(code/type) matching, IP-in-IP and MPLS flow matching are all
358 mutually exclusive features which cannot be supported together
359 (see :ref:`mlx5_firmware_config`).
363 - Requires DevX and DV flow to be enabled.
364 - KEEP_CRC offload cannot be supported with LRO.
365 - The first mbuf length, without head-room, must be big enough to include the
367 - Rx queue with LRO offload enabled, receiving a non-LRO packet, can forward
368 it with size limited to max LRO size, not to max RX packet length.
369 - LRO can be used with outer header of TCP packets of the standard format:
370 eth (with or without vlan) / ipv4 or ipv6 / tcp / payload
372 Other TCP packets (e.g. with MPLS label) received on Rx queue with LRO enabled, will be received with bad checksum.
373 - LRO packet aggregation is performed by HW only for packet size larger than
374 ``lro_min_mss_size``. This value is reported on device start, when debug
379 - ``RTE_ETH_RX_OFFLOAD_KEEP_CRC`` cannot be supported with decapsulation
380 for some NICs (such as ConnectX-6 Dx, ConnectX-6 Lx, and BlueField-2).
381 The capability bit ``scatter_fcs_w_decap_disable`` shows NIC support.
385 - fast free offload assumes the all mbufs being sent are originated from the
386 same memory pool and there is no any extra references to the mbufs (the
387 reference counter for each mbuf is equal 1 on tx_burst call). The latter
388 means there should be no any externally attached buffers in mbufs. It is
389 an application responsibility to provide the correct mbufs if the fast
390 free offload is engaged. The mlx5 PMD implicitly produces the mbufs with
391 externally attached buffers if MPRQ option is enabled, hence, the fast
392 free offload is neither supported nor advertised if there is MPRQ enabled.
396 - Supports ``RTE_FLOW_ACTION_TYPE_SAMPLE`` action only within NIC Rx and
397 E-Switch steering domain.
398 - For E-Switch Sampling flow with sample ratio > 1, additional actions are not
399 supported in the sample actions list.
400 - For ConnectX-5, the ``RTE_FLOW_ACTION_TYPE_SAMPLE`` is typically used as
401 first action in the E-Switch egress flow if with header modify or
402 encapsulation actions.
403 - For NIC Rx flow, supports ``MARK``, ``COUNT``, ``QUEUE``, ``RSS`` in the
405 - For E-Switch mirroring flow, supports ``RAW ENCAP``, ``Port ID``,
406 ``VXLAN ENCAP``, ``NVGRE ENCAP`` in the sample actions list.
407 - For ConnectX-5 trusted device, the application metadata with SET_TAG index 0
408 is not supported before ``RTE_FLOW_ACTION_TYPE_SAMPLE`` action.
412 - Supports the 'set' operation only for ``RTE_FLOW_ACTION_TYPE_MODIFY_FIELD`` action.
413 - Modification of an arbitrary place in a packet via the special ``RTE_FLOW_FIELD_START`` Field ID is not supported.
414 - Modification of the 802.1Q Tag, VXLAN Network or GENEVE Network ID's is not supported.
415 - Encapsulation levels are not supported, can modify outermost header fields only.
416 - Offsets must be 32-bits aligned, cannot skip past the boundary of a field.
417 - If the field type is ``RTE_FLOW_FIELD_MAC_TYPE``
418 and packet contains one or more VLAN headers,
419 the meaningful type field following the last VLAN header
420 is used as modify field operation argument.
421 The modify field action is not intended to modify VLAN headers type field,
422 dedicated VLAN push and pop actions should be used instead.
424 - IPv6 header item 'proto' field, indicating the next header protocol, should
425 not be set as extension header.
426 In case the next header is an extension header, it should not be specified in
427 IPv6 header item 'proto' field.
428 The last extension header item 'next header' field can specify the following
429 header protocol type.
433 - Hairpin between two ports could only manual binding and explicit Tx flow mode. For single port hairpin, all the combinations of auto/manual binding and explicit/implicit Tx flow mode could be supported.
434 - Hairpin in switchdev SR-IOV mode is not supported till now.
438 - All the meter colors with drop action will be counted only by the global drop statistics.
439 - Yellow detection is only supported with ASO metering.
440 - Red color must be with drop action.
441 - Meter statistics are supported only for drop case.
442 - A meter action created with pre-defined policy must be the last action in the flow except single case where the policy actions are:
443 - green: NULL or END.
444 - yellow: NULL or END.
446 - The only supported meter policy actions:
447 - green: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MARK, METER and SET_TAG.
448 - yellow: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MARK, METER and SET_TAG.
450 - Policy actions of RSS for green and yellow should have the same configuration except queues.
451 - Policy with RSS/queue action is not supported when ``dv_xmeta_en`` enabled.
452 - If green action is METER, yellow action must be the same METER action or NULL.
453 - meter profile packet mode is supported.
454 - meter profiles of RFC2697, RFC2698 and RFC4115 are supported.
455 - RFC4115 implementation is following MEF, meaning yellow traffic may reclaim unused green bandwidth when green token bucket is full.
459 - Integrity offload is enabled for **ConnectX-6** family.
460 - Verification bits provided by the hardware are ``l3_ok``, ``ipv4_csum_ok``, ``l4_ok``, ``l4_csum_ok``.
461 - ``level`` value 0 references outer headers.
462 - Multiple integrity items not supported in a single flow rule.
463 - Flow rule items supplied by application must explicitly specify network headers referred by integrity item.
464 For example, if integrity item mask sets ``l4_ok`` or ``l4_csum_ok`` bits, reference to L4 network header,
465 TCP or UDP, must be in the rule pattern as well::
467 flow create 0 ingress pattern integrity level is 0 value mask l3_ok value spec l3_ok / eth / ipv6 / end …
469 flow create 0 ingress pattern integrity level is 0 value mask l4_ok value spec 0 / eth / ipv4 proto is udp / end …
471 - Connection tracking:
473 - Cannot co-exist with ASO meter, ASO age action in a single flow rule.
474 - Flow rules insertion rate and memory consumption need more optimization.
476 - 4M connections maximum.
478 - Multi-thread flow insertion:
480 - In order to achieve best insertion rate, application should manage the flows per lcore.
481 - Better to disable memory reclaim by setting ``reclaim_mem_mode`` to 0 to accelerate the flow object allocation and release with cache.
485 - TXQ affinity subjects to HW hash once enabled.
487 - Bonding under socket direct mode
493 - CQE timestamp field width is limited by hardware to 63 bits, MSB is zero.
494 - In the free-running mode the timestamp counter is reset on power on
495 and 63-bit value provides over 1800 years of uptime till overflow.
496 - In the real-time mode
497 (configurable with ``REAL_TIME_CLOCK_ENABLE`` firmware settings),
498 the timestamp presents the nanoseconds elapsed since 01-Jan-1970,
499 hardware timestamp overflow will happen on 19-Jan-2038
500 (0x80000000 seconds since 01-Jan-1970).
501 - The send scheduling is based on timestamps
502 from the reference "Clock Queue" completions,
503 the scheduled send timestamps should not be specified with non-zero MSB.
507 - WQE based high scaling and safer flow insertion/destruction.
508 - Set ``dv_flow_en`` to 2 in order to enable HW steering.
509 - Async queue-based ``rte_flow_q`` APIs supported only.
511 - Match on GRE header supports the following fields:
513 - c_rsvd0_v: C bit, K bit, S bit
519 Matching on checksum and sequence needs OFED 5.6+.
521 - The NIC egress flow rules on representor port are not supported.
527 MLX5 supports various methods to report statistics:
529 Port statistics can be queried using ``rte_eth_stats_get()``. The received and sent statistics are through SW only and counts the number of packets received or sent successfully by the PMD. The imissed counter is the amount of packets that could not be delivered to SW because a queue was full. Packets not received due to congestion in the bus or on the NIC can be queried via the rx_discards_phy xstats counter.
531 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
533 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
539 See :ref:`mlx5 common compilation <mlx5_common_compilation>`.
545 Environment Configuration
546 ~~~~~~~~~~~~~~~~~~~~~~~~~
548 See :ref:`mlx5 common configuration <mlx5_common_env>`.
550 Firmware configuration
551 ~~~~~~~~~~~~~~~~~~~~~~
553 See :ref:`mlx5_firmware_config` guide.
558 Please refer to :ref:`mlx5 common options <mlx5_common_driver_options>`
559 for an additional list of options shared with other mlx5 drivers.
561 - ``rxq_cqe_comp_en`` parameter [int]
563 A nonzero value enables the compression of CQE on RX side. This feature
564 allows to save PCI bandwidth and improve performance. Enabled by default.
565 Different compression formats are supported in order to achieve the best
566 performance for different traffic patterns. Default format depends on
567 Multi-Packet Rx queue configuration: Hash RSS format is used in case
568 MPRQ is disabled, Checksum format is used in case MPRQ is enabled.
570 Specifying 2 as a ``rxq_cqe_comp_en`` value selects Flow Tag format for
571 better compression rate in case of RTE Flow Mark traffic.
572 Specifying 3 as a ``rxq_cqe_comp_en`` value selects Checksum format.
573 Specifying 4 as a ``rxq_cqe_comp_en`` value selects L3/L4 Header format for
574 better compression rate in case of mixed TCP/UDP and IPv4/IPv6 traffic.
575 CQE compression format selection requires DevX to be enabled. If there is
576 no DevX enabled/supported the value is reset to 1 by default.
580 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
581 ConnectX-6 Lx, BlueField and BlueField-2.
582 - POWER9 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
583 ConnectX-6 Lx, BlueField and BlueField-2.
585 - ``rxq_pkt_pad_en`` parameter [int]
587 A nonzero value enables padding Rx packet to the size of cacheline on PCI
588 transaction. This feature would waste PCI bandwidth but could improve
589 performance by avoiding partial cacheline write which may cause costly
590 read-modify-copy in memory transaction on some architectures. Disabled by
595 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
596 ConnectX-6 Lx, BlueField and BlueField-2.
597 - POWER8 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
598 ConnectX-6 Lx, BlueField and BlueField-2.
600 - ``delay_drop`` parameter [int]
602 Bitmask value for the Rx queue delay drop attribute. Bit 0 is used for the
603 standard Rx queue and bit 1 is used for the hairpin Rx queue. By default, the
604 delay drop is disabled for all Rx queues. It will be ignored if the port does
605 not support the attribute even if it is enabled explicitly.
607 The packets being received will not be dropped immediately when the WQEs are
608 exhausted in a Rx queue with delay drop enabled.
610 A timeout value is set in the driver to control the waiting time before
611 dropping a packet. Once the timer is expired, the delay drop will be
612 deactivated for all the Rx queues with this feature enable. To re-activate
613 it, a rearming is needed and it is part of the kernel driver starting from
616 To enable / disable the delay drop rearming, the private flag ``dropless_rq``
617 can be set and queried via ethtool:
619 - ethtool --set-priv-flags <netdev> dropless_rq on (/ off)
620 - ethtool --show-priv-flags <netdev>
622 The configuration flag is global per PF and can only be set on the PF, once
623 it is on, all the VFs', SFs' and representors' Rx queues will share the timer
626 - ``mprq_en`` parameter [int]
628 A nonzero value enables configuring Multi-Packet Rx queues. Rx queue is
629 configured as Multi-Packet RQ if the total number of Rx queues is
630 ``rxqs_min_mprq`` or more. Disabled by default.
632 Multi-Packet Rx Queue (MPRQ a.k.a Striding RQ) can further save PCIe bandwidth
633 by posting a single large buffer for multiple packets. Instead of posting a
634 buffers per a packet, one large buffer is posted in order to receive multiple
635 packets on the buffer. A MPRQ buffer consists of multiple fixed-size strides
636 and each stride receives one packet. MPRQ can improve throughput for
637 small-packet traffic.
639 When MPRQ is enabled, MTU can be larger than the size of
640 user-provided mbuf even if RTE_ETH_RX_OFFLOAD_SCATTER isn't enabled. PMD will
641 configure large stride size enough to accommodate MTU as long as
642 device allows. Note that this can waste system memory compared to enabling Rx
643 scatter and multi-segment packet.
645 - ``mprq_log_stride_num`` parameter [int]
647 Log 2 of the number of strides for Multi-Packet Rx queue. Configuring more
648 strides can reduce PCIe traffic further. If configured value is not in the
649 range of device capability, the default value will be set with a warning
650 message. The default value is 4 which is 16 strides per a buffer, valid only
651 if ``mprq_en`` is set.
653 The size of Rx queue should be bigger than the number of strides.
655 - ``mprq_log_stride_size`` parameter [int]
657 Log 2 of the size of a stride for Multi-Packet Rx queue. Configuring a smaller
658 stride size can save some memory and reduce probability of a depletion of all
659 available strides due to unreleased packets by an application. If configured
660 value is not in the range of device capability, the default value will be set
661 with a warning message. The default value is 11 which is 2048 bytes per a
662 stride, valid only if ``mprq_en`` is set. With ``mprq_log_stride_size`` set
663 it is possible for a packet to span across multiple strides. This mode allows
664 support of jumbo frames (9K) with MPRQ. The memcopy of some packets (or part
665 of a packet if Rx scatter is configured) may be required in case there is no
666 space left for a head room at the end of a stride which incurs some
669 - ``mprq_max_memcpy_len`` parameter [int]
671 The maximum length of packet to memcpy in case of Multi-Packet Rx queue. Rx
672 packet is mem-copied to a user-provided mbuf if the size of Rx packet is less
673 than or equal to this parameter. Otherwise, PMD will attach the Rx packet to
674 the mbuf by external buffer attachment - ``rte_pktmbuf_attach_extbuf()``.
675 A mempool for external buffers will be allocated and managed by PMD. If Rx
676 packet is externally attached, ol_flags field of the mbuf will have
677 RTE_MBUF_F_EXTERNAL and this flag must be preserved. ``RTE_MBUF_HAS_EXTBUF()``
678 checks the flag. The default value is 128, valid only if ``mprq_en`` is set.
680 - ``rxqs_min_mprq`` parameter [int]
682 Configure Rx queues as Multi-Packet RQ if the total number of Rx queues is
683 greater or equal to this value. The default value is 12, valid only if
686 - ``txq_inline`` parameter [int]
688 Amount of data to be inlined during TX operations. This parameter is
689 deprecated and converted to the new parameter ``txq_inline_max`` providing
690 partial compatibility.
692 - ``txqs_min_inline`` parameter [int]
694 Enable inline data send only when the number of TX queues is greater or equal
697 This option should be used in combination with ``txq_inline_max`` and
698 ``txq_inline_mpw`` below and does not affect ``txq_inline_min`` settings above.
700 If this option is not specified the default value 16 is used for BlueField
701 and 8 for other platforms
703 The data inlining consumes the CPU cycles, so this option is intended to
704 auto enable inline data if we have enough Tx queues, which means we have
705 enough CPU cores and PCI bandwidth is getting more critical and CPU
706 is not supposed to be bottleneck anymore.
708 The copying data into WQE improves latency and can improve PPS performance
709 when PCI back pressure is detected and may be useful for scenarios involving
710 heavy traffic on many queues.
712 Because additional software logic is necessary to handle this mode, this
713 option should be used with care, as it may lower performance when back
714 pressure is not expected.
716 If inline data are enabled it may affect the maximal size of Tx queue in
717 descriptors because the inline data increase the descriptor size and
718 queue size limits supported by hardware may be exceeded.
720 - ``txq_inline_min`` parameter [int]
722 Minimal amount of data to be inlined into WQE during Tx operations. NICs
723 may require this minimal data amount to operate correctly. The exact value
724 may depend on NIC operation mode, requested offloads, etc. It is strongly
725 recommended to omit this parameter and use the default values. Anyway,
726 applications using this parameter should take into consideration that
727 specifying an inconsistent value may prevent the NIC from sending packets.
729 If ``txq_inline_min`` key is present the specified value (may be aligned
730 by the driver in order not to exceed the limits and provide better descriptor
731 space utilization) will be used by the driver and it is guaranteed that
732 requested amount of data bytes are inlined into the WQE beside other inline
733 settings. This key also may update ``txq_inline_max`` value (default
734 or specified explicitly in devargs) to reserve the space for inline data.
736 If ``txq_inline_min`` key is not present, the value may be queried by the
737 driver from the NIC via DevX if this feature is available. If there is no DevX
738 enabled/supported the value 18 (supposing L2 header including VLAN) is set
739 for ConnectX-4 and ConnectX-4 Lx, and 0 is set by default for ConnectX-5
740 and newer NICs. If packet is shorter the ``txq_inline_min`` value, the entire
743 For ConnectX-4 NIC, driver does not allow specifying value below 18
744 (minimal L2 header, including VLAN), error will be raised.
746 For ConnectX-4 Lx NIC, it is allowed to specify values below 18, but
747 it is not recommended and may prevent NIC from sending packets over
750 For ConnectX-4 and ConnectX-4 Lx NICs, automatically configured value
751 is insufficient for some traffic, because they require at least all L2 headers
752 to be inlined. For example, Q-in-Q adds 4 bytes to default 18 bytes
753 of Ethernet and VLAN, thus ``txq_inline_min`` must be set to 22.
754 MPLS would add 4 bytes per label. Final value must account for all possible
755 L2 encapsulation headers used in particular environment.
757 Please, note, this minimal data inlining disengages eMPW feature (Enhanced
758 Multi-Packet Write), because last one does not support partial packet inlining.
759 This is not very critical due to minimal data inlining is mostly required
760 by ConnectX-4 and ConnectX-4 Lx, these NICs do not support eMPW feature.
762 - ``txq_inline_max`` parameter [int]
764 Specifies the maximal packet length to be completely inlined into WQE
765 Ethernet Segment for ordinary SEND method. If packet is larger than specified
766 value, the packet data won't be copied by the driver at all, data buffer
767 is addressed with a pointer. If packet length is less or equal all packet
768 data will be copied into WQE. This may improve PCI bandwidth utilization for
769 short packets significantly but requires the extra CPU cycles.
771 The data inline feature is controlled by number of Tx queues, if number of Tx
772 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
773 is engaged, if there are not enough Tx queues (which means not enough CPU cores
774 and CPU resources are scarce), data inline is not performed by the driver.
775 Assigning ``txqs_min_inline`` with zero always enables the data inline.
777 The default ``txq_inline_max`` value is 290. The specified value may be adjusted
778 by the driver in order not to exceed the limit (930 bytes) and to provide better
779 WQE space filling without gaps, the adjustment is reflected in the debug log.
780 Also, the default value (290) may be decreased in run-time if the large transmit
781 queue size is requested and hardware does not support enough descriptor
782 amount, in this case warning is emitted. If ``txq_inline_max`` key is
783 specified and requested inline settings can not be satisfied then error
786 - ``txq_inline_mpw`` parameter [int]
788 Specifies the maximal packet length to be completely inlined into WQE for
789 Enhanced MPW method. If packet is large the specified value, the packet data
790 won't be copied, and data buffer is addressed with pointer. If packet length
791 is less or equal, all packet data will be copied into WQE. This may improve PCI
792 bandwidth utilization for short packets significantly but requires the extra
795 The data inline feature is controlled by number of TX queues, if number of Tx
796 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
797 is engaged, if there are not enough Tx queues (which means not enough CPU cores
798 and CPU resources are scarce), data inline is not performed by the driver.
799 Assigning ``txqs_min_inline`` with zero always enables the data inline.
801 The default ``txq_inline_mpw`` value is 268. The specified value may be adjusted
802 by the driver in order not to exceed the limit (930 bytes) and to provide better
803 WQE space filling without gaps, the adjustment is reflected in the debug log.
804 Due to multiple packets may be included to the same WQE with Enhanced Multi
805 Packet Write Method and overall WQE size is limited it is not recommended to
806 specify large values for the ``txq_inline_mpw``. Also, the default value (268)
807 may be decreased in run-time if the large transmit queue size is requested
808 and hardware does not support enough descriptor amount, in this case warning
809 is emitted. If ``txq_inline_mpw`` key is specified and requested inline
810 settings can not be satisfied then error will be raised.
812 - ``txqs_max_vec`` parameter [int]
814 Enable vectorized Tx only when the number of TX queues is less than or
815 equal to this value. This parameter is deprecated and ignored, kept
816 for compatibility issue to not prevent driver from probing.
818 - ``txq_mpw_hdr_dseg_en`` parameter [int]
820 A nonzero value enables including two pointers in the first block of TX
821 descriptor. The parameter is deprecated and ignored, kept for compatibility
824 - ``txq_max_inline_len`` parameter [int]
826 Maximum size of packet to be inlined. This limits the size of packet to
827 be inlined. If the size of a packet is larger than configured value, the
828 packet isn't inlined even though there's enough space remained in the
829 descriptor. Instead, the packet is included with pointer. This parameter
830 is deprecated and converted directly to ``txq_inline_mpw`` providing full
831 compatibility. Valid only if eMPW feature is engaged.
833 - ``txq_mpw_en`` parameter [int]
835 A nonzero value enables Enhanced Multi-Packet Write (eMPW) for ConnectX-5,
836 ConnectX-6, ConnectX-6 Dx, ConnectX-6 Lx, BlueField, BlueField-2.
837 eMPW allows the Tx burst function to pack up multiple packets
838 in a single descriptor session in order to save PCI bandwidth
839 and improve performance at the cost of a slightly higher CPU usage.
840 When ``txq_inline_mpw`` is set along with ``txq_mpw_en``,
841 Tx burst function copies entire packet data on to Tx descriptor
842 instead of including pointer of packet.
844 The Enhanced Multi-Packet Write feature is enabled by default if NIC supports
845 it, can be disabled by explicit specifying 0 value for ``txq_mpw_en`` option.
846 Also, if minimal data inlining is requested by non-zero ``txq_inline_min``
847 option or reported by the NIC, the eMPW feature is disengaged.
849 - ``tx_db_nc`` parameter [int]
851 This parameter name is deprecated and ignored.
852 The new name for this parameter is ``sq_db_nc``.
853 See :ref:`common driver options <mlx5_common_driver_options>`.
855 - ``tx_pp`` parameter [int]
857 If a nonzero value is specified the driver creates all necessary internal
858 objects to provide accurate packet send scheduling on mbuf timestamps.
859 The positive value specifies the scheduling granularity in nanoseconds,
860 the packet send will be accurate up to specified digits. The allowed range is
861 from 500 to 1 million of nanoseconds. The negative value specifies the module
862 of granularity and engages the special test mode the check the schedule rate.
863 By default (if the ``tx_pp`` is not specified) send scheduling on timestamps
866 Starting with ConnectX-7 the capability to schedule traffic directly
867 on timestamp specified in descriptor is provided,
868 no extra objects are needed anymore and scheduling capability
869 is advertised and handled regardless ``tx_pp`` parameter presence.
871 - ``tx_skew`` parameter [int]
873 The parameter adjusts the send packet scheduling on timestamps and represents
874 the average delay between beginning of the transmitting descriptor processing
875 by the hardware and appearance of actual packet data on the wire. The value
876 should be provided in nanoseconds and is valid only if ``tx_pp`` parameter is
877 specified. The default value is zero.
879 - ``tx_vec_en`` parameter [int]
881 A nonzero value enables Tx vector on ConnectX-5, ConnectX-6, ConnectX-6 Dx,
882 ConnectX-6 Lx, BlueField and BlueField-2 NICs
883 if the number of global Tx queues on the port is less than ``txqs_max_vec``.
884 The parameter is deprecated and ignored.
886 - ``rx_vec_en`` parameter [int]
888 A nonzero value enables Rx vector if the port is not configured in
889 multi-segment otherwise this parameter is ignored.
893 - ``vf_nl_en`` parameter [int]
895 A nonzero value enables Netlink requests from the VF to add/remove MAC
896 addresses or/and enable/disable promiscuous/all multicast on the Netdevice.
897 Otherwise the relevant configuration must be run with Linux iproute2 tools.
898 This is a prerequisite to receive this kind of traffic.
900 Enabled by default, valid only on VF devices ignored otherwise.
902 - ``l3_vxlan_en`` parameter [int]
904 A nonzero value allows L3 VXLAN and VXLAN-GPE flow creation. To enable
905 L3 VXLAN or VXLAN-GPE, users has to configure firmware and enable this
906 parameter. This is a prerequisite to receive this kind of traffic.
910 - ``dv_xmeta_en`` parameter [int]
912 A nonzero value enables extensive flow metadata support if device is
913 capable and driver supports it. This can enable extensive support of
914 ``MARK`` and ``META`` item of ``rte_flow``. The newly introduced
915 ``SET_TAG`` and ``SET_META`` actions do not depend on ``dv_xmeta_en``.
917 There are some possible configurations, depending on parameter value:
919 - 0, this is default value, defines the legacy mode, the ``MARK`` and
920 ``META`` related actions and items operate only within NIC Tx and
921 NIC Rx steering domains, no ``MARK`` and ``META`` information crosses
922 the domain boundaries. The ``MARK`` item is 24 bits wide, the ``META``
923 item is 32 bits wide and match supported on egress only.
925 - 1, this engages extensive metadata mode, the ``MARK`` and ``META``
926 related actions and items operate within all supported steering domains,
927 including FDB, ``MARK`` and ``META`` information may cross the domain
928 boundaries. The ``MARK`` item is 24 bits wide, the ``META`` item width
929 depends on kernel and firmware configurations and might be 0, 16 or
930 32 bits. Within NIC Tx domain ``META`` data width is 32 bits for
931 compatibility, the actual width of data transferred to the FDB domain
932 depends on kernel configuration and may be vary. The actual supported
933 width can be retrieved in runtime by series of rte_flow_validate()
936 - 2, this engages extensive metadata mode, the ``MARK`` and ``META``
937 related actions and items operate within all supported steering domains,
938 including FDB, ``MARK`` and ``META`` information may cross the domain
939 boundaries. The ``META`` item is 32 bits wide, the ``MARK`` item width
940 depends on kernel and firmware configurations and might be 0, 16 or
941 24 bits. The actual supported width can be retrieved in runtime by
942 series of rte_flow_validate() trials.
944 - 3, this engages tunnel offload mode. In E-Switch configuration, that
945 mode implicitly activates ``dv_xmeta_en=1``.
947 +------+-----------+-----------+-------------+-------------+
948 | Mode | ``MARK`` | ``META`` | ``META`` Tx | FDB/Through |
949 +======+===========+===========+=============+=============+
950 | 0 | 24 bits | 32 bits | 32 bits | no |
951 +------+-----------+-----------+-------------+-------------+
952 | 1 | 24 bits | vary 0-32 | 32 bits | yes |
953 +------+-----------+-----------+-------------+-------------+
954 | 2 | vary 0-24 | 32 bits | 32 bits | yes |
955 +------+-----------+-----------+-------------+-------------+
957 If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
958 ignored and the device is configured to operate in legacy mode (0).
960 Disabled by default (set to 0).
962 The Direct Verbs/Rules (engaged with ``dv_flow_en`` = 1) supports all
963 of the extensive metadata features. The legacy Verbs supports FLAG and
964 MARK metadata actions over NIC Rx steering domain only.
966 Setting META value to zero in flow action means there is no item provided
967 and receiving datapath will not report in mbufs the metadata are present.
968 Setting MARK value to zero in flow action means the zero FDIR ID value
969 will be reported on packet receiving.
971 For the MARK action the last 16 values in the full range are reserved for
972 internal PMD purposes (to emulate FLAG action). The valid range for the
973 MARK action values is 0-0xFFEF for the 16-bit mode and 0-0xFFFFEF
974 for the 24-bit mode, the flows with the MARK action value outside
975 the specified range will be rejected.
977 - ``dv_flow_en`` parameter [int]
979 Value 0 means legacy Verbs flow offloading.
981 Value 1 enables the DV flow steering assuming it is supported by the
982 driver (requires rdma-core 24 or higher).
984 Value 2 enables the WQE based hardware steering.
985 In this mode, only queue-based flow management is supported.
987 It is configured by default to 1 (DV flow steering) if supported.
988 Otherwise, the value is 0 which indicates legacy Verbs flow offloading.
990 - ``dv_esw_en`` parameter [int]
992 A nonzero value enables E-Switch using Direct Rules.
994 Enabled by default if supported.
996 - ``lacp_by_user`` parameter [int]
998 A nonzero value enables the control of LACP traffic by the user application.
999 When a bond exists in the driver, by default it should be managed by the
1000 kernel and therefore LACP traffic should be steered to the kernel.
1001 If this devarg is set to 1 it will allow the user to manage the bond by
1002 itself and not steer LACP traffic to the kernel.
1004 Disabled by default (set to 0).
1006 - ``representor`` parameter [list]
1008 This parameter can be used to instantiate DPDK Ethernet devices from
1009 existing port (PF, VF or SF) representors configured on the device.
1011 It is a standard parameter whose format is described in
1012 :ref:`ethernet_device_standard_device_arguments`.
1014 For instance, to probe VF port representors 0 through 2::
1016 <PCI_BDF>,representor=vf[0-2]
1018 To probe SF port representors 0 through 2::
1020 <PCI_BDF>,representor=sf[0-2]
1022 To probe VF port representors 0 through 2 on both PFs of bonding device::
1024 <Primary_PCI_BDF>,representor=pf[0,1]vf[0-2]
1026 - ``max_dump_files_num`` parameter [int]
1028 The maximum number of files per PMD entity that may be created for debug information.
1029 The files will be created in /var/log directory or in current directory.
1031 set to 128 by default.
1033 - ``lro_timeout_usec`` parameter [int]
1035 The maximum allowed duration of an LRO session, in micro-seconds.
1036 PMD will set the nearest value supported by HW, which is not bigger than
1037 the input ``lro_timeout_usec`` value.
1038 If this parameter is not specified, by default PMD will set
1039 the smallest value supported by HW.
1041 - ``hp_buf_log_sz`` parameter [int]
1043 The total data buffer size of a hairpin queue (logarithmic form), in bytes.
1044 PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
1045 The capacity of the value is specified by the firmware and the initialization
1046 will get a failure if it is out of scope.
1047 The range of the value is from 11 to 19 right now, and the supported frame
1048 size of a single packet for hairpin is from 512B to 128KB. It might change if
1049 different firmware release is being used. By using a small value, it could
1050 reduce memory consumption but not work with a large frame. If the value is
1051 too large, the memory consumption will be high and some potential performance
1052 degradation will be introduced.
1053 By default, the PMD will set this value to 16, which means that 9KB jumbo
1054 frames will be supported.
1056 - ``reclaim_mem_mode`` parameter [int]
1058 Cache some resources in flow destroy will help flow recreation more efficient.
1059 While some systems may require the all the resources can be reclaimed after
1061 The parameter ``reclaim_mem_mode`` provides the option for user to configure
1062 if the resource cache is needed or not.
1064 There are three options to choose:
1066 - 0. It means the flow resources will be cached as usual. The resources will
1067 be cached, helpful with flow insertion rate.
1069 - 1. It will only enable the DPDK PMD level resources reclaim.
1071 - 2. Both DPDK PMD level and rdma-core low level will be configured as
1074 By default, the PMD will set this value to 0.
1076 - ``decap_en`` parameter [int]
1078 Some devices do not support FCS (frame checksum) scattering for
1079 tunnel-decapsulated packets.
1080 If set to 0, this option forces the FCS feature and rejects tunnel
1081 decapsulation in the flow engine for such devices.
1083 By default, the PMD will set this value to 1.
1085 - ``allow_duplicate_pattern`` parameter [int]
1087 There are two options to choose:
1089 - 0. Prevent insertion of rules with the same pattern items on non-root table.
1090 In this case, only the first rule is inserted and the following rules are
1091 rejected and error code EEXIST is returned.
1093 - 1. Allow insertion of rules with the same pattern items.
1094 In this case, all rules are inserted but only the first rule takes effect,
1095 the next rule takes effect only if the previous rules are deleted.
1097 By default, the PMD will set this value to 1.
1103 The following Mellanox device families are supported by the same mlx5 driver:
1115 Below are detailed device names:
1117 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX4111A-XCAT (1x10G)
1118 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX412A-XCAT (2x10G)
1119 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX4111A-ACAT (1x25G)
1120 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX412A-ACAT (2x25G)
1121 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX413A-BCAT (1x40G)
1122 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX4131A-BCAT (1x40G)
1123 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX415A-BCAT (1x40G)
1124 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX413A-GCAT (1x50G)
1125 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX4131A-GCAT (1x50G)
1126 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX414A-BCAT (2x50G)
1127 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-GCAT (1x50G)
1128 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-BCAT (2x50G)
1129 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-GCAT (2x50G)
1130 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-CCAT (1x100G)
1131 * Mellanox\ |reg| ConnectX\ |reg|-4 100G MCX416A-CCAT (2x100G)
1132 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4111A-XCAT (1x10G)
1133 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4121A-XCAT (2x10G)
1134 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4111A-ACAT (1x25G)
1135 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4121A-ACAT (2x25G)
1136 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 40G MCX4131A-BCAT (1x40G)
1137 * Mellanox\ |reg| ConnectX\ |reg|-5 100G MCX556A-ECAT (2x100G)
1138 * Mellanox\ |reg| ConnectX\ |reg|-5 Ex EN 100G MCX516A-CDAT (2x100G)
1139 * Mellanox\ |reg| ConnectX\ |reg|-6 200G MCX654106A-HCAT (2x200G)
1140 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 100G MCX623106AN-CDAT (2x100G)
1141 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 200G MCX623105AN-VDAT (1x200G)
1142 * Mellanox\ |reg| ConnectX\ |reg|-6 Lx EN 25G MCX631102AN-ADAT (2x25G)
1148 See :ref:`mlx5_sub_function`.
1150 Sub-Function representor support
1151 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1153 A SF netdev supports E-Switch representation offload
1154 similar to PF and VF representors.
1155 Use <sfnum> to probe SF representor::
1157 testpmd> port attach <PCI_BDF>,representor=sf<sfnum>,dv_flow_en=1
1163 1. Configure aggressive CQE Zipping for maximum performance::
1165 mlxconfig -d <mst device> s CQE_COMPRESSION=1
1167 To set it back to the default CQE Zipping mode use::
1169 mlxconfig -d <mst device> s CQE_COMPRESSION=0
1171 2. In case of virtualization:
1173 - Make sure that hypervisor kernel is 3.16 or newer.
1174 - Configure boot with ``iommu=pt``.
1175 - Use 1G huge pages.
1176 - Make sure to allocate a VM on huge pages.
1177 - Make sure to set CPU pinning.
1179 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
1180 for better performance. For VMs, verify that the right CPU
1181 and NUMA node are pinned according to the above. Run::
1183 lstopo-no-graphics --merge
1185 to identify the NUMA node to which the PCIe adapter is connected.
1187 4. If more than one adapter is used, and root complex capabilities allow
1188 to put both adapters on the same NUMA node without PCI bandwidth degradation,
1189 it is recommended to locate both adapters on the same NUMA node.
1190 This in order to forward packets from one to the other without
1191 NUMA performance penalty.
1193 5. Disable pause frames::
1195 ethtool -A <netdev> rx off tx off
1197 6. Verify IO non-posted prefetch is disabled by default. This can be checked
1198 via the BIOS configuration. Please contact you server provider for more
1199 information about the settings.
1203 On some machines, depends on the machine integrator, it is beneficial
1204 to set the PCI max read request parameter to 1K. This can be
1205 done in the following way:
1207 To query the read request size use::
1209 setpci -s <NIC PCI address> 68.w
1211 If the output is different than 3XXX, set it by::
1213 setpci -s <NIC PCI address> 68.w=3XXX
1215 The XXX can be different on different systems. Make sure to configure
1216 according to the setpci output.
1218 7. To minimize overhead of searching Memory Regions:
1220 - '--socket-mem' is recommended to pin memory by predictable amount.
1221 - Configure per-lcore cache when creating Mempools for packet buffer.
1222 - Refrain from dynamically allocating/freeing memory in run-time.
1227 There are multiple Rx burst functions with different advantages and limitations.
1229 .. table:: Rx burst functions
1231 +-------------------+------------------------+---------+-----------------+------+-------+
1232 || Function Name || Enabler || Scatter|| Error Recovery || CQE || Large|
1233 | | | | || comp|| MTU |
1234 +===================+========================+=========+=================+======+=======+
1235 | rx_burst | rx_vec_en=0 | Yes | Yes | Yes | Yes |
1236 +-------------------+------------------------+---------+-----------------+------+-------+
1237 | rx_burst_vec | rx_vec_en=1 (default) | No | if CQE comp off | Yes | No |
1238 +-------------------+------------------------+---------+-----------------+------+-------+
1239 | rx_burst_mprq || mprq_en=1 | No | Yes | Yes | Yes |
1240 | || RxQs >= rxqs_min_mprq | | | | |
1241 +-------------------+------------------------+---------+-----------------+------+-------+
1242 | rx_burst_mprq_vec || rx_vec_en=1 (default) | No | if CQE comp off | Yes | Yes |
1243 | || mprq_en=1 | | | | |
1244 | || RxQs >= rxqs_min_mprq | | | | |
1245 +-------------------+------------------------+---------+-----------------+------+-------+
1247 .. _mlx5_offloads_support:
1249 Supported hardware offloads
1250 ---------------------------
1252 .. table:: Minimal SW/HW versions for queue offloads
1254 ============== ===== ===== ========= ===== ========== =============
1255 Offload DPDK Linux rdma-core OFED firmware hardware
1256 ============== ===== ===== ========= ===== ========== =============
1257 common base 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1258 checksums 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1259 Rx timestamp 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1260 TSO 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1261 LRO 19.08 N/A N/A 4.6-4 16.25.6406 ConnectX-5
1262 Tx scheduling 20.08 N/A N/A 5.1-2 22.28.2006 ConnectX-6 Dx
1263 Buffer Split 20.11 N/A N/A 5.1-2 16.28.2006 ConnectX-5
1264 ============== ===== ===== ========= ===== ========== =============
1266 .. table:: Minimal SW/HW versions for rte_flow offloads
1268 +-----------------------+-----------------+-----------------+
1269 | Offload | with E-Switch | with NIC |
1270 +=======================+=================+=================+
1271 | Count | | DPDK 19.05 | | DPDK 19.02 |
1272 | | | OFED 4.6 | | OFED 4.6 |
1273 | | | rdma-core 24 | | rdma-core 23 |
1274 | | | ConnectX-5 | | ConnectX-5 |
1275 +-----------------------+-----------------+-----------------+
1276 | Drop | | DPDK 19.05 | | DPDK 18.11 |
1277 | | | OFED 4.6 | | OFED 4.5 |
1278 | | | rdma-core 24 | | rdma-core 23 |
1279 | | | ConnectX-5 | | ConnectX-4 |
1280 +-----------------------+-----------------+-----------------+
1281 | Queue / RSS | | | | DPDK 18.11 |
1282 | | | N/A | | OFED 4.5 |
1283 | | | | | rdma-core 23 |
1284 | | | | | ConnectX-4 |
1285 +-----------------------+-----------------+-----------------+
1286 | Shared action | | | | |
1287 | | | :numref:`sact`| | :numref:`sact`|
1290 +-----------------------+-----------------+-----------------+
1291 | | VLAN | | DPDK 19.11 | | DPDK 19.11 |
1292 | | (of_pop_vlan / | | OFED 4.7-1 | | OFED 4.7-1 |
1293 | | of_push_vlan / | | ConnectX-5 | | ConnectX-5 |
1294 | | of_set_vlan_pcp / | | | | |
1295 | | of_set_vlan_vid) | | | | |
1296 +-----------------------+-----------------+-----------------+
1297 | | VLAN | | DPDK 21.05 | | |
1298 | | ingress and / | | OFED 5.3 | | N/A |
1299 | | of_push_vlan / | | ConnectX-6 Dx | | |
1300 +-----------------------+-----------------+-----------------+
1301 | | VLAN | | DPDK 21.05 | | |
1302 | | egress and / | | OFED 5.3 | | N/A |
1303 | | of_pop_vlan / | | ConnectX-6 Dx | | |
1304 +-----------------------+-----------------+-----------------+
1305 | Encapsulation | | DPDK 19.05 | | DPDK 19.02 |
1306 | (VXLAN / NVGRE / RAW) | | OFED 4.7-1 | | OFED 4.6 |
1307 | | | rdma-core 24 | | rdma-core 23 |
1308 | | | ConnectX-5 | | ConnectX-5 |
1309 +-----------------------+-----------------+-----------------+
1310 | Encapsulation | | DPDK 19.11 | | DPDK 19.11 |
1311 | GENEVE | | OFED 4.7-3 | | OFED 4.7-3 |
1312 | | | rdma-core 27 | | rdma-core 27 |
1313 | | | ConnectX-5 | | ConnectX-5 |
1314 +-----------------------+-----------------+-----------------+
1315 | Tunnel Offload | | DPDK 20.11 | | DPDK 20.11 |
1316 | | | OFED 5.1-2 | | OFED 5.1-2 |
1317 | | | rdma-core 32 | | N/A |
1318 | | | ConnectX-5 | | ConnectX-5 |
1319 +-----------------------+-----------------+-----------------+
1320 | | Header rewrite | | DPDK 19.05 | | DPDK 19.02 |
1321 | | (set_ipv4_src / | | OFED 4.7-1 | | OFED 4.7-1 |
1322 | | set_ipv4_dst / | | rdma-core 24 | | rdma-core 24 |
1323 | | set_ipv6_src / | | ConnectX-5 | | ConnectX-5 |
1324 | | set_ipv6_dst / | | | | |
1325 | | set_tp_src / | | | | |
1326 | | set_tp_dst / | | | | |
1327 | | dec_ttl / | | | | |
1328 | | set_ttl / | | | | |
1329 | | set_mac_src / | | | | |
1330 | | set_mac_dst) | | | | |
1331 +-----------------------+-----------------+-----------------+
1332 | | Header rewrite | | DPDK 20.02 | | DPDK 20.02 |
1333 | | (set_dscp) | | OFED 5.0 | | OFED 5.0 |
1334 | | | | rdma-core 24 | | rdma-core 24 |
1335 | | | | ConnectX-5 | | ConnectX-5 |
1336 +-----------------------+-----------------+-----------------+
1337 | Jump | | DPDK 19.05 | | DPDK 19.02 |
1338 | | | OFED 4.7-1 | | OFED 4.7-1 |
1339 | | | rdma-core 24 | | N/A |
1340 | | | ConnectX-5 | | ConnectX-5 |
1341 +-----------------------+-----------------+-----------------+
1342 | Mark / Flag | | DPDK 19.05 | | DPDK 18.11 |
1343 | | | OFED 4.6 | | OFED 4.5 |
1344 | | | rdma-core 24 | | rdma-core 23 |
1345 | | | ConnectX-5 | | ConnectX-4 |
1346 +-----------------------+-----------------+-----------------+
1347 | Meta data | | DPDK 19.11 | | DPDK 19.11 |
1348 | | | OFED 4.7-3 | | OFED 4.7-3 |
1349 | | | rdma-core 26 | | rdma-core 26 |
1350 | | | ConnectX-5 | | ConnectX-5 |
1351 +-----------------------+-----------------+-----------------+
1352 | Port ID | | DPDK 19.05 | | N/A |
1353 | | | OFED 4.7-1 | | N/A |
1354 | | | rdma-core 24 | | N/A |
1355 | | | ConnectX-5 | | N/A |
1356 +-----------------------+-----------------+-----------------+
1357 | Hairpin | | | | DPDK 19.11 |
1358 | | | N/A | | OFED 4.7-3 |
1359 | | | | | rdma-core 26 |
1360 | | | | | ConnectX-5 |
1361 +-----------------------+-----------------+-----------------+
1362 | 2-port Hairpin | | | | DPDK 20.11 |
1363 | | | N/A | | OFED 5.1-2 |
1365 | | | | | ConnectX-5 |
1366 +-----------------------+-----------------+-----------------+
1367 | Metering | | DPDK 19.11 | | DPDK 19.11 |
1368 | | | OFED 4.7-3 | | OFED 4.7-3 |
1369 | | | rdma-core 26 | | rdma-core 26 |
1370 | | | ConnectX-5 | | ConnectX-5 |
1371 +-----------------------+-----------------+-----------------+
1372 | ASO Metering | | DPDK 21.05 | | DPDK 21.05 |
1373 | | | OFED 5.3 | | OFED 5.3 |
1374 | | | rdma-core 33 | | rdma-core 33 |
1375 | | | ConnectX-6 Dx| | ConnectX-6 Dx |
1376 +-----------------------+-----------------+-----------------+
1377 | Metering Hierarchy | | DPDK 21.08 | | DPDK 21.08 |
1378 | | | OFED 5.3 | | OFED 5.3 |
1380 | | | ConnectX-6 Dx| | ConnectX-6 Dx |
1381 +-----------------------+-----------------+-----------------+
1382 | Sampling | | DPDK 20.11 | | DPDK 20.11 |
1383 | | | OFED 5.1-2 | | OFED 5.1-2 |
1384 | | | rdma-core 32 | | N/A |
1385 | | | ConnectX-5 | | ConnectX-5 |
1386 +-----------------------+-----------------+-----------------+
1387 | Encapsulation | | DPDK 21.02 | | DPDK 21.02 |
1388 | GTP PSC | | OFED 5.2 | | OFED 5.2 |
1389 | | | rdma-core 35 | | rdma-core 35 |
1390 | | | ConnectX-6 Dx| | ConnectX-6 Dx |
1391 +-----------------------+-----------------+-----------------+
1392 | Encapsulation | | DPDK 21.02 | | DPDK 21.02 |
1393 | GENEVE TLV option | | OFED 5.2 | | OFED 5.2 |
1394 | | | rdma-core 34 | | rdma-core 34 |
1395 | | | ConnectX-6 Dx | | ConnectX-6 Dx |
1396 +-----------------------+-----------------+-----------------+
1397 | Modify Field | | DPDK 21.02 | | DPDK 21.02 |
1398 | | | OFED 5.2 | | OFED 5.2 |
1399 | | | rdma-core 35 | | rdma-core 35 |
1400 | | | ConnectX-5 | | ConnectX-5 |
1401 +-----------------------+-----------------+-----------------+
1402 | Connection tracking | | | | DPDK 21.05 |
1403 | | | N/A | | OFED 5.3 |
1404 | | | | | rdma-core 35 |
1405 | | | | | ConnectX-6 Dx |
1406 +-----------------------+-----------------+-----------------+
1408 .. table:: Minimal SW/HW versions for shared action offload
1411 +-----------------------+-----------------+-----------------+
1412 | Shared Action | with E-Switch | with NIC |
1413 +=======================+=================+=================+
1414 | RSS | | | | DPDK 20.11 |
1415 | | | N/A | | OFED 5.2 |
1416 | | | | | rdma-core 33 |
1417 | | | | | ConnectX-5 |
1418 +-----------------------+-----------------+-----------------+
1419 | Age | | DPDK 20.11 | | DPDK 20.11 |
1420 | | | OFED 5.2 | | OFED 5.2 |
1421 | | | rdma-core 32 | | rdma-core 32 |
1422 | | | ConnectX-6 Dx | | ConnectX-6 Dx |
1423 +-----------------------+-----------------+-----------------+
1424 | Count | | DPDK 21.05 | | DPDK 21.05 |
1425 | | | OFED 4.6 | | OFED 4.6 |
1426 | | | rdma-core 24 | | rdma-core 23 |
1427 | | | ConnectX-5 | | ConnectX-5 |
1428 +-----------------------+-----------------+-----------------+
1433 MARK and META items are interrelated with datapath - they might move from/to
1434 the applications in mbuf fields. Hence, zero value for these items has the
1435 special meaning - it means "no metadata are provided", not zero values are
1436 treated by applications and PMD as valid ones.
1438 Moreover in the flow engine domain the value zero is acceptable to match and
1439 set, and we should allow to specify zero values as rte_flow parameters for the
1440 META and MARK items and actions. In the same time zero mask has no meaning and
1441 should be rejected on validation stage.
1446 Flows are not cached in the driver.
1447 When stopping a device port, all the flows created on this port from the
1448 application will be flushed automatically in the background.
1449 After stopping the device port, all flows on this port become invalid and
1450 not represented in the system.
1451 All references to these flows held by the application should be discarded
1452 directly but neither destroyed nor flushed.
1454 The application should re-create the flows as required after the port restart.
1459 Compared to librte_net_mlx4 that implements a single RSS configuration per
1460 port, librte_net_mlx5 supports per-protocol RSS configuration.
1462 Since ``testpmd`` defaults to IP RSS mode and there is currently no
1463 command-line parameter to enable additional protocols (UDP and TCP as well
1464 as IP), the following commands must be entered from its CLI to get the same
1465 behavior as librte_net_mlx4::
1468 > port config all rss all
1474 This section demonstrates how to launch **testpmd** with Mellanox
1475 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices managed by librte_net_mlx5.
1477 #. Load the kernel modules::
1479 modprobe -a ib_uverbs mlx5_core mlx5_ib
1481 Alternatively if MLNX_OFED/MLNX_EN is fully installed, the following script
1484 /etc/init.d/openibd restart
1488 User space I/O kernel modules (uio and igb_uio) are not used and do
1489 not have to be loaded.
1491 #. Make sure Ethernet interfaces are in working order and linked to kernel
1492 verbs. Related sysfs entries should be present::
1494 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
1503 #. Optionally, retrieve their PCI bus addresses for to be used with the allow list::
1506 for intf in eth2 eth3 eth4 eth5;
1508 (cd "/sys/class/net/${intf}/device/" && pwd -P);
1511 sed -n 's,.*/\(.*\),-a \1,p'
1520 #. Request huge pages::
1522 dpdk-hugepages.py --setup 2G
1524 #. Start testpmd with basic parameters::
1526 dpdk-testpmd -l 8-15 -n 4 -a 05:00.0 -a 05:00.1 -a 06:00.0 -a 06:00.1 -- --rxq=2 --txq=2 -i
1531 EAL: PCI device 0000:05:00.0 on NUMA socket 0
1532 EAL: probe driver: 15b3:1013 librte_net_mlx5
1533 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
1534 PMD: librte_net_mlx5: 1 port(s) detected
1535 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
1536 EAL: PCI device 0000:05:00.1 on NUMA socket 0
1537 EAL: probe driver: 15b3:1013 librte_net_mlx5
1538 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
1539 PMD: librte_net_mlx5: 1 port(s) detected
1540 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
1541 EAL: PCI device 0000:06:00.0 on NUMA socket 0
1542 EAL: probe driver: 15b3:1013 librte_net_mlx5
1543 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
1544 PMD: librte_net_mlx5: 1 port(s) detected
1545 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
1546 EAL: PCI device 0000:06:00.1 on NUMA socket 0
1547 EAL: probe driver: 15b3:1013 librte_net_mlx5
1548 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
1549 PMD: librte_net_mlx5: 1 port(s) detected
1550 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
1551 Interactive-mode selected
1552 Configuring Port 0 (socket 0)
1553 PMD: librte_net_mlx5: 0x8cba80: TX queues number update: 0 -> 2
1554 PMD: librte_net_mlx5: 0x8cba80: RX queues number update: 0 -> 2
1555 Port 0: E4:1D:2D:E7:0C:FE
1556 Configuring Port 1 (socket 0)
1557 PMD: librte_net_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
1558 PMD: librte_net_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
1559 Port 1: E4:1D:2D:E7:0C:FF
1560 Configuring Port 2 (socket 0)
1561 PMD: librte_net_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
1562 PMD: librte_net_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
1563 Port 2: E4:1D:2D:E7:0C:FA
1564 Configuring Port 3 (socket 0)
1565 PMD: librte_net_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
1566 PMD: librte_net_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
1567 Port 3: E4:1D:2D:E7:0C:FB
1568 Checking link statuses...
1569 Port 0 Link Up - speed 40000 Mbps - full-duplex
1570 Port 1 Link Up - speed 40000 Mbps - full-duplex
1571 Port 2 Link Up - speed 10000 Mbps - full-duplex
1572 Port 3 Link Up - speed 10000 Mbps - full-duplex
1579 This section demonstrates how to dump flows. Currently, it's possible to dump
1580 all flows with assistance of external tools.
1582 #. 2 ways to get flow raw file:
1584 - Using testpmd CLI:
1586 .. code-block:: console
1589 testpmd> flow dump <port> all <output_file>
1591 testpmd> flow dump <port> rule <rule_id> <output_file>
1593 - call rte_flow_dev_dump api:
1595 .. code-block:: console
1597 rte_flow_dev_dump(port, flow, file, NULL);
1599 #. Dump human-readable flows from raw file:
1601 Get flow parsing tool from: https://github.com/Mellanox/mlx_steering_dump
1603 .. code-block:: console
1605 mlx_steering_dump.py -f <output_file> -flowptr <flow_ptr>
1607 How to share a meter between ports in the same switch domain
1608 ------------------------------------------------------------
1610 This section demonstrates how to use the shared meter. A meter M can be created
1611 on port X and to be shared with a port Y on the same switch domain by the next way:
1613 .. code-block:: console
1615 flow create X ingress transfer pattern eth / port_id id is Y / end actions meter mtr_id M / end
1617 How to use meter hierarchy
1618 --------------------------
1620 This section demonstrates how to create and use a meter hierarchy.
1621 A termination meter M can be the policy green action of another termination meter N.
1622 The two meters are chained together as a chain. Using meter N in a flow will apply
1623 both the meters in hierarchy on that flow.
1625 .. code-block:: console
1627 add port meter policy 0 1 g_actions queue index 0 / end y_actions end r_actions drop / end
1628 create port meter 0 M 1 1 yes 0xffff 1 0
1629 add port meter policy 0 2 g_actions meter mtr_id M / end y_actions end r_actions drop / end
1630 create port meter 0 N 2 2 yes 0xffff 1 0
1631 flow create 0 ingress group 1 pattern eth / end actions meter mtr_id N / end
1633 How to configure a VF as trusted
1634 --------------------------------
1636 This section demonstrates how to configure a virtual function (VF) interface as trusted.
1637 Trusted VF is needed to offload rules with rte_flow to a group that is bigger than 0.
1638 The configuration is done in two parts: driver and FW.
1640 The procedure below is an example of using a ConnectX-5 adapter card (pf0) with 2 VFs:
1642 #. Create 2 VFs on the PF pf0 when in Legacy SR-IOV mode::
1644 $ echo 2 > /sys/class/net/pf0/device/mlx5_num_vfs
1646 #. Verify the VFs are created:
1648 .. code-block:: console
1650 $ lspci | grep Mellanox
1651 82:00.0 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]
1652 82:00.1 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]
1653 82:00.2 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5 Virtual Function]
1654 82:00.3 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5 Virtual Function]
1656 #. Unbind all VFs. For each VF PCIe, using the following command to unbind the driver::
1658 $ echo "0000:82:00.2" >> /sys/bus/pci/drivers/mlx5_core/unbind
1660 #. Set the VFs to be trusted for the kernel by using one of the methods below:
1662 - Using sysfs file::
1664 $ echo ON | tee /sys/class/net/pf0/device/sriov/0/trust
1665 $ echo ON | tee /sys/class/net/pf0/device/sriov/1/trust
1667 - Using “ip link” command::
1669 $ ip link set p0 vf 0 trust on
1670 $ ip link set p0 vf 1 trust on
1672 #. Configure all VFs using mlxreg::
1674 $ mlxreg -d /dev/mst/mt4121_pciconf0 --reg_name VHCA_TRUST_LEVEL --yes --set "all_vhca=0x1,trust_level=0x1"
1678 Firmware version used must be >= xx.29.1016 and MFT >= 4.18
1680 #. For each VF PCIe, using the following command to bind the driver::
1682 $ echo "0000:82:00.2" >> /sys/bus/pci/drivers/mlx5_core/bind