1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox Technologies, Ltd
5 .. include:: <isonum.txt>
10 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
11 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** , **Mellanox
12 ConnectX-5**, **Mellanox ConnectX-6**, **Mellanox ConnectX-6 Dx** and
13 **Mellanox BlueField** families of 10/25/40/50/100/200 Gb/s adapters
14 as well as their virtual functions (VF) in SR-IOV context.
16 Information and documentation about these adapters can be found on the
17 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
18 `Mellanox community <http://community.mellanox.com/welcome>`__.
20 There is also a `section dedicated to this poll mode driver
21 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
25 Due to external dependencies, this driver is disabled in default configuration
26 of the "make" build. It can be enabled with ``CONFIG_RTE_LIBRTE_MLX5_PMD=y``
27 or by using "meson" build system which will detect dependencies.
32 Besides its dependency on libibverbs (that implies libmlx5 and associated
33 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
34 operations such as querying/updating the MTU and flow control parameters.
36 For security reasons and robustness, this driver only deals with virtual
37 memory addresses. The way resources allocations are handled by the kernel,
38 combined with hardware specifications that allow to handle virtual memory
39 addresses directly, ensure that DPDK applications cannot access random
40 physical memory (or memory that does not belong to the current process).
42 This capability allows the PMD to coexist with kernel network interfaces
43 which remain functional, although they stop receiving unicast packets as
44 long as they share the same MAC address.
45 This means legacy linux control tools (for example: ethtool, ifconfig and
46 more) can operate on the same network interfaces that owned by the DPDK
49 The PMD can use libibverbs and libmlx5 to access the device firmware
50 or directly the hardware components.
51 There are different levels of objects and bypassing abilities
52 to get the best performances:
54 - Verbs is a complete high-level generic API
55 - Direct Verbs is a device-specific API
56 - DevX allows to access firmware objects
57 - Direct Rules manages flow steering at low-level hardware layer
59 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
65 - Multi arch support: x86_64, POWER8, ARMv8, i686.
66 - Multiple TX and RX queues.
67 - Support for scattered TX and RX frames.
68 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
69 - RSS using different combinations of fields: L3 only, L4 only or both,
70 and source only, destination only or both.
71 - Several RSS hash keys, one for each flow type.
72 - Default RSS operation with no hash key specification.
73 - Configurable RETA table.
74 - Link flow control (pause frame).
75 - Support for multiple MAC addresses.
79 - RX CRC stripping configuration.
80 - Promiscuous mode on PF and VF.
81 - Multicast promiscuous mode on PF and VF.
82 - Hardware checksum offloads.
83 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
85 - Flow API, including :ref:`flow_isolated_mode`.
87 - KVM and VMware ESX SR-IOV modes are supported.
88 - RSS hash result is supported.
89 - Hardware TSO for generic IP or UDP tunnel, including VXLAN and GRE.
90 - Hardware checksum Tx offload for generic IP or UDP tunnel, including VXLAN and GRE.
92 - Statistics query including Basic, Extended and per queue.
94 - Tunnel types: VXLAN, L3 VXLAN, VXLAN-GPE, GRE, MPLSoGRE, MPLSoUDP, IP-in-IP, Geneve, GTP.
95 - Tunnel HW offloads: packet type, inner/outer RSS, IP and UDP checksum verification.
96 - NIC HW offloads: encapsulation (vxlan, gre, mplsoudp, mplsogre), NAT, routing, TTL
97 increment/decrement, count, drop, mark. For details please see :ref:`mlx5_offloads_support`.
98 - Flow insertion rate of more then million flows per second, when using Direct Rules.
99 - Support for multiple rte_flow groups.
100 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
107 - For secondary process:
109 - Forked secondary process not supported.
110 - External memory unregistered in EAL memseg list cannot be used for DMA
111 unless such memory has been registered by ``mlx5_mr_update_ext_mp()`` in
112 primary process and remapped to the same virtual address in secondary
113 process. If the external memory is registered by primary process but has
114 different virtual address in secondary process, unexpected error may happen.
116 - When using Verbs flow engine (``dv_flow_en`` = 0), flow pattern without any
117 specific VLAN will match for VLAN packets as well:
119 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
120 Meaning, the flow rule::
122 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
124 Will only match vlan packets with vid=3. and the flow rule::
126 flow create 0 ingress pattern eth / ipv4 / end ...
128 Will match any ipv4 packet (VLAN included).
130 - When using DV flow engine (``dv_flow_en`` = 1), flow pattern without VLAN item
131 will match untagged packets only.
134 flow create 0 ingress pattern eth / ipv4 / end ...
136 Will match untagged packets only.
139 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
141 Will match tagged packets only, with any VLAN ID value.
144 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
146 Will only match tagged packets with VLAN ID 3.
148 - VLAN pop offload command:
150 - Flow rules having a VLAN pop offload command as one of their actions and
151 are lacking a match on VLAN as one of their items are not supported.
152 - The command is not supported on egress traffic.
154 - VLAN push offload is not supported on ingress traffic.
156 - VLAN set PCP offload is not supported on existing headers.
158 - A multi segment packet must have not more segments than reported by dev_infos_get()
159 in tx_desc_lim.nb_seg_max field. This value depends on maximal supported Tx descriptor
160 size and ``txq_inline_min`` settings and may be from 2 (worst case forced by maximal
161 inline settings) to 58.
163 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
164 to 0 are not supported.
166 - L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with MPLSoGRE and MPLSoUDP.
168 - Match on Geneve header supports the following fields only:
174 Currently, the only supported options length value is 0.
176 - VF: flow rules created on VF devices can only match traffic targeted at the
177 configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).
179 - Match on GTP tunnel header item supports the following fields only:
181 - v_pt_rsv_flags: E flag, S flag, PN flag
185 - No Tx metadata go to the E-Switch steering domain for the Flow group 0.
186 The flows within group 0 and set metadata action are rejected by hardware.
190 MAC addresses not already present in the bridge table of the associated
191 kernel network device will be added and cleaned up by the PMD when closing
192 the device. In case of ungraceful program termination, some entries may
193 remain present and should be removed manually by other means.
195 - When Multi-Packet Rx queue is configured (``mprq_en``), a Rx packet can be
196 externally attached to a user-provided mbuf with having EXT_ATTACHED_MBUF in
197 ol_flags. As the mempool for the external buffer is managed by PMD, all the
198 Rx mbufs must be freed before the device is closed. Otherwise, the mempool of
199 the external buffers will be freed by PMD and the application which still
200 holds the external buffers may be corrupted.
202 - If Multi-Packet Rx queue is configured (``mprq_en``) and Rx CQE compression is
203 enabled (``rxq_cqe_comp_en``) at the same time, RSS hash result is not fully
204 supported. Some Rx packets may not have PKT_RX_RSS_HASH.
206 - IPv6 Multicast messages are not supported on VM, while promiscuous mode
207 and allmulticast mode are both set to off.
208 To receive IPv6 Multicast messages on VM, explicitly set the relevant
209 MAC address using rte_eth_dev_mac_addr_add() API.
211 - To support a mixed traffic pattern (some buffers from local host memory, some
212 buffers from other devices) with high bandwidth, a mbuf flag is used.
214 An application hints the PMD whether or not it should try to inline the
215 given mbuf data buffer. PMD should do the best effort to act upon this request.
217 The hint flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE`` is dynamic,
218 registered by application with rte_mbuf_dynflag_register(). This flag is
219 purely driver-specific and declared in PMD specific header ``rte_pmd_mlx5.h``,
220 which is intended to be used by the application.
222 To query the supported specific flags in runtime,
223 the function ``rte_pmd_mlx5_get_dyn_flag_names`` returns the array of
224 currently (over present hardware and configuration) supported specific flags.
225 The "not inline hint" feature operating flow is the following one:
228 - probe the devices, ports are created
229 - query the port capabilities
230 - if port supporting the feature is found
231 - register dynamic flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE``
232 - application starts the ports
233 - on ``dev_start()`` PMD checks whether the feature flag is registered and
234 enables the feature support in datapath
235 - application might set the registered flag bit in ``ol_flags`` field
236 of mbuf being sent and PMD will handle ones appropriately.
238 - The amount of descriptors in Tx queue may be limited by data inline settings.
239 Inline data require the more descriptor building blocks and overall block
240 amount may exceed the hardware supported limits. The application should
241 reduce the requested Tx size or adjust data inline settings with
242 ``txq_inline_max`` and ``txq_inline_mpw`` devargs keys.
244 - To provide the packet send scheduling on mbuf timestamps the ``tx_pp``
245 parameter should be specified, RTE_MBUF_DYNFIELD_TIMESTAMP_NAME and
246 RTE_MBUF_DYNFLAG_TIMESTAMP_NAME should be registered by application.
247 When PMD sees the RTE_MBUF_DYNFLAG_TIMESTAMP_NAME set on the packet
248 being sent it tries to synchronize the time of packet appearing on
249 the wire with the specified packet timestamp. It the specified one
250 is in the past it should be ignored, if one is in the distant future
251 it should be capped with some reasonable value (in range of seconds).
252 These specific cases ("too late" and "distant future") can be optionally
253 reported via device xstats to assist applications to detect the
254 time-related problems.
256 There is no any packet reordering according timestamps is supposed,
257 neither within packet burst, nor between packets, it is an entirely
258 application responsibility to generate packets and its timestamps
259 in desired order. The timestamps can be put only in the first packet
260 in the burst providing the entire burst scheduling.
262 - E-Switch decapsulation Flow:
264 - can be applied to PF port only.
265 - must specify VF port action (packet redirection from PF to VF).
266 - optionally may specify tunnel inner source and destination MAC addresses.
268 - E-Switch encapsulation Flow:
270 - can be applied to VF ports only.
271 - must specify PF port action (packet redirection from VF to PF).
275 - The input buffer, used as outer header, is not validated.
279 - The decapsulation is always done up to the outermost tunnel detected by the HW.
280 - The input buffer, providing the removal size, is not validated.
281 - The buffer size must match the length of the headers to be removed.
283 - ICMP/ICMP6 code/type matching, IP-in-IP and MPLS flow matching are all
284 mutually exclusive features which cannot be supported together
285 (see :ref:`mlx5_firmware_config`).
289 - Requires DevX and DV flow to be enabled.
290 - KEEP_CRC offload cannot be supported with LRO.
291 - The first mbuf length, without head-room, must be big enough to include the
293 - Rx queue with LRO offload enabled, receiving a non-LRO packet, can forward
294 it with size limited to max LRO size, not to max RX packet length.
295 - LRO can be used with outer header of TCP packets of the standard format:
296 eth (with or without vlan) / ipv4 or ipv6 / tcp / payload
298 Other TCP packets (e.g. with MPLS label) received on Rx queue with LRO enabled, will be received with bad checksum.
302 - ``DEV_RX_OFFLOAD_KEEP_CRC`` cannot be supported with decapsulation
303 for some NICs (such as ConnectX-6 Dx and BlueField 2).
304 The capability bit ``scatter_fcs_w_decap_disable`` shows NIC support.
309 MLX5 supports various methods to report statistics:
311 Port statistics can be queried using ``rte_eth_stats_get()``. The received and sent statistics are through SW only and counts the number of packets received or sent successfully by the PMD. The imissed counter is the amount of packets that could not be delivered to SW because a queue was full. Packets not received due to congestion in the bus or on the NIC can be queried via the rx_discards_phy xstats counter.
313 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
315 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
323 These options can be modified in the ``.config`` file.
325 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
327 Toggle compilation of librte_pmd_mlx5 itself.
329 - ``CONFIG_RTE_IBVERBS_LINK_DLOPEN`` (default **n**)
331 Build PMD with additional code to make it loadable without hard
332 dependencies on **libibverbs** nor **libmlx5**, which may not be installed
333 on the target system.
335 In this mode, their presence is still required for it to run properly,
336 however their absence won't prevent a DPDK application from starting (with
337 ``CONFIG_RTE_BUILD_SHARED_LIB`` disabled) and they won't show up as
338 missing with ``ldd(1)``.
340 It works by moving these dependencies to a purpose-built rdma-core "glue"
341 plug-in which must either be installed in a directory whose name is based
342 on ``CONFIG_RTE_EAL_PMD_PATH`` suffixed with ``-glue`` if set, or in a
343 standard location for the dynamic linker (e.g. ``/lib``) if left to the
344 default empty string (``""``).
346 This option has no performance impact.
348 - ``CONFIG_RTE_IBVERBS_LINK_STATIC`` (default **n**)
350 Embed static flavor of the dependencies **libibverbs** and **libmlx5**
351 in the PMD shared library or the executable static binary.
353 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
355 Toggle debugging code and stricter compilation flags. Enabling this option
356 adds additional run-time checks and debugging messages at the cost of
361 For BlueField, target should be set to ``arm64-bluefield-linux-gcc``. This
362 will enable ``CONFIG_RTE_LIBRTE_MLX5_PMD`` and set ``RTE_CACHE_LINE_SIZE`` to
363 64. Default armv8a configuration of make build and meson build set it to 128
364 then brings performance degradation.
366 This option is available in meson:
368 - ``ibverbs_link`` can be ``static``, ``shared``, or ``dlopen``.
370 Environment variables
371 ~~~~~~~~~~~~~~~~~~~~~
375 A list of directories in which to search for the rdma-core "glue" plug-in,
376 separated by colons or semi-colons.
378 Only matters when compiled with ``CONFIG_RTE_IBVERBS_LINK_DLOPEN``
379 enabled and most useful when ``CONFIG_RTE_EAL_PMD_PATH`` is also set,
380 since ``LD_LIBRARY_PATH`` has no effect in this case.
382 - ``MLX5_SHUT_UP_BF``
384 Configures HW Tx doorbell register as IO-mapped.
386 By default, the HW Tx doorbell is configured as a write-combining register.
387 The register would be flushed to HW usually when the write-combining buffer
388 becomes full, but it depends on CPU design.
390 Except for vectorized Tx burst routines, a write memory barrier is enforced
391 after updating the register so that the update can be immediately visible to
394 When vectorized Tx burst is called, the barrier is set only if the burst size
395 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
396 variable will bring better latency even though the maximum throughput can
399 Run-time configuration
400 ~~~~~~~~~~~~~~~~~~~~~~
402 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
403 because it is affected by their state. Forcing them down prevents packets
406 - **ethtool** operations on related kernel interfaces also affect the PMD.
411 In order to run as a non-root user,
412 some capabilities must be granted to the application::
414 setcap cap_sys_admin,cap_net_admin,cap_net_raw,cap_ipc_lock+ep <dpdk-app>
416 Below are the reasons of the need for each capability:
419 When using physical addresses (PA mode), with Linux >= 4.0,
420 for access to ``/proc/self/pagemap``.
423 For device configuration.
426 For raw ethernet queue allocation through kernel driver.
429 For DMA memory pinning.
434 - ``rxq_cqe_comp_en`` parameter [int]
436 A nonzero value enables the compression of CQE on RX side. This feature
437 allows to save PCI bandwidth and improve performance. Enabled by default.
441 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx
443 - POWER9 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx
446 - ``rxq_cqe_pad_en`` parameter [int]
448 A nonzero value enables 128B padding of CQE on RX side. The size of CQE
449 is aligned with the size of a cacheline of the core. If cacheline size is
450 128B, the CQE size is configured to be 128B even though the device writes
451 only 64B data on the cacheline. This is to avoid unnecessary cache
452 invalidation by device's two consecutive writes on to one cacheline.
453 However in some architecture, it is more beneficial to update entire
454 cacheline with padding the rest 64B rather than striding because
455 read-modify-write could drop performance a lot. On the other hand,
456 writing extra data will consume more PCIe bandwidth and could also drop
457 the maximum throughput. It is recommended to empirically set this
458 parameter. Disabled by default.
462 - CPU having 128B cacheline with ConnectX-5 and BlueField.
464 - ``rxq_pkt_pad_en`` parameter [int]
466 A nonzero value enables padding Rx packet to the size of cacheline on PCI
467 transaction. This feature would waste PCI bandwidth but could improve
468 performance by avoiding partial cacheline write which may cause costly
469 read-modify-copy in memory transaction on some architectures. Disabled by
474 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx
476 - POWER8 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx
479 - ``mprq_en`` parameter [int]
481 A nonzero value enables configuring Multi-Packet Rx queues. Rx queue is
482 configured as Multi-Packet RQ if the total number of Rx queues is
483 ``rxqs_min_mprq`` or more. Disabled by default.
485 Multi-Packet Rx Queue (MPRQ a.k.a Striding RQ) can further save PCIe bandwidth
486 by posting a single large buffer for multiple packets. Instead of posting a
487 buffers per a packet, one large buffer is posted in order to receive multiple
488 packets on the buffer. A MPRQ buffer consists of multiple fixed-size strides
489 and each stride receives one packet. MPRQ can improve throughput for
490 small-packet traffic.
492 When MPRQ is enabled, max_rx_pkt_len can be larger than the size of
493 user-provided mbuf even if DEV_RX_OFFLOAD_SCATTER isn't enabled. PMD will
494 configure large stride size enough to accommodate max_rx_pkt_len as long as
495 device allows. Note that this can waste system memory compared to enabling Rx
496 scatter and multi-segment packet.
498 - ``mprq_log_stride_num`` parameter [int]
500 Log 2 of the number of strides for Multi-Packet Rx queue. Configuring more
501 strides can reduce PCIe traffic further. If configured value is not in the
502 range of device capability, the default value will be set with a warning
503 message. The default value is 4 which is 16 strides per a buffer, valid only
504 if ``mprq_en`` is set.
506 The size of Rx queue should be bigger than the number of strides.
508 - ``mprq_log_stride_size`` parameter [int]
510 Log 2 of the size of a stride for Multi-Packet Rx queue. Configuring a smaller
511 stride size can save some memory and reduce probability of a depletion of all
512 available strides due to unreleased packets by an application. If configured
513 value is not in the range of device capability, the default value will be set
514 with a warning message. The default value is 11 which is 2048 bytes per a
515 stride, valid only if ``mprq_en`` is set. With ``mprq_log_stride_size`` set
516 it is possible for a packet to span across multiple strides. This mode allows
517 support of jumbo frames (9K) with MPRQ. The memcopy of some packets (or part
518 of a packet if Rx scatter is configured) may be required in case there is no
519 space left for a head room at the end of a stride which incurs some
522 - ``mprq_max_memcpy_len`` parameter [int]
524 The maximum length of packet to memcpy in case of Multi-Packet Rx queue. Rx
525 packet is mem-copied to a user-provided mbuf if the size of Rx packet is less
526 than or equal to this parameter. Otherwise, PMD will attach the Rx packet to
527 the mbuf by external buffer attachment - ``rte_pktmbuf_attach_extbuf()``.
528 A mempool for external buffers will be allocated and managed by PMD. If Rx
529 packet is externally attached, ol_flags field of the mbuf will have
530 EXT_ATTACHED_MBUF and this flag must be preserved. ``RTE_MBUF_HAS_EXTBUF()``
531 checks the flag. The default value is 128, valid only if ``mprq_en`` is set.
533 - ``rxqs_min_mprq`` parameter [int]
535 Configure Rx queues as Multi-Packet RQ if the total number of Rx queues is
536 greater or equal to this value. The default value is 12, valid only if
539 - ``txq_inline`` parameter [int]
541 Amount of data to be inlined during TX operations. This parameter is
542 deprecated and converted to the new parameter ``txq_inline_max`` providing
543 partial compatibility.
545 - ``txqs_min_inline`` parameter [int]
547 Enable inline data send only when the number of TX queues is greater or equal
550 This option should be used in combination with ``txq_inline_max`` and
551 ``txq_inline_mpw`` below and does not affect ``txq_inline_min`` settings above.
553 If this option is not specified the default value 16 is used for BlueField
554 and 8 for other platforms
556 The data inlining consumes the CPU cycles, so this option is intended to
557 auto enable inline data if we have enough Tx queues, which means we have
558 enough CPU cores and PCI bandwidth is getting more critical and CPU
559 is not supposed to be bottleneck anymore.
561 The copying data into WQE improves latency and can improve PPS performance
562 when PCI back pressure is detected and may be useful for scenarios involving
563 heavy traffic on many queues.
565 Because additional software logic is necessary to handle this mode, this
566 option should be used with care, as it may lower performance when back
567 pressure is not expected.
569 If inline data are enabled it may affect the maximal size of Tx queue in
570 descriptors because the inline data increase the descriptor size and
571 queue size limits supported by hardware may be exceeded.
573 - ``txq_inline_min`` parameter [int]
575 Minimal amount of data to be inlined into WQE during Tx operations. NICs
576 may require this minimal data amount to operate correctly. The exact value
577 may depend on NIC operation mode, requested offloads, etc. It is strongly
578 recommended to omit this parameter and use the default values. Anyway,
579 applications using this parameter should take into consideration that
580 specifying an inconsistent value may prevent the NIC from sending packets.
582 If ``txq_inline_min`` key is present the specified value (may be aligned
583 by the driver in order not to exceed the limits and provide better descriptor
584 space utilization) will be used by the driver and it is guaranteed that
585 requested amount of data bytes are inlined into the WQE beside other inline
586 settings. This key also may update ``txq_inline_max`` value (default
587 or specified explicitly in devargs) to reserve the space for inline data.
589 If ``txq_inline_min`` key is not present, the value may be queried by the
590 driver from the NIC via DevX if this feature is available. If there is no DevX
591 enabled/supported the value 18 (supposing L2 header including VLAN) is set
592 for ConnectX-4 and ConnectX-4 Lx, and 0 is set by default for ConnectX-5
593 and newer NICs. If packet is shorter the ``txq_inline_min`` value, the entire
596 For ConnectX-4 NIC, driver does not allow specifying value below 18
597 (minimal L2 header, including VLAN), error will be raised.
599 For ConnectX-4 Lx NIC, it is allowed to specify values below 18, but
600 it is not recommended and may prevent NIC from sending packets over
603 Please, note, this minimal data inlining disengages eMPW feature (Enhanced
604 Multi-Packet Write), because last one does not support partial packet inlining.
605 This is not very critical due to minimal data inlining is mostly required
606 by ConnectX-4 and ConnectX-4 Lx, these NICs do not support eMPW feature.
608 - ``txq_inline_max`` parameter [int]
610 Specifies the maximal packet length to be completely inlined into WQE
611 Ethernet Segment for ordinary SEND method. If packet is larger than specified
612 value, the packet data won't be copied by the driver at all, data buffer
613 is addressed with a pointer. If packet length is less or equal all packet
614 data will be copied into WQE. This may improve PCI bandwidth utilization for
615 short packets significantly but requires the extra CPU cycles.
617 The data inline feature is controlled by number of Tx queues, if number of Tx
618 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
619 is engaged, if there are not enough Tx queues (which means not enough CPU cores
620 and CPU resources are scarce), data inline is not performed by the driver.
621 Assigning ``txqs_min_inline`` with zero always enables the data inline.
623 The default ``txq_inline_max`` value is 290. The specified value may be adjusted
624 by the driver in order not to exceed the limit (930 bytes) and to provide better
625 WQE space filling without gaps, the adjustment is reflected in the debug log.
626 Also, the default value (290) may be decreased in run-time if the large transmit
627 queue size is requested and hardware does not support enough descriptor
628 amount, in this case warning is emitted. If ``txq_inline_max`` key is
629 specified and requested inline settings can not be satisfied then error
632 - ``txq_inline_mpw`` parameter [int]
634 Specifies the maximal packet length to be completely inlined into WQE for
635 Enhanced MPW method. If packet is large the specified value, the packet data
636 won't be copied, and data buffer is addressed with pointer. If packet length
637 is less or equal, all packet data will be copied into WQE. This may improve PCI
638 bandwidth utilization for short packets significantly but requires the extra
641 The data inline feature is controlled by number of TX queues, if number of Tx
642 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
643 is engaged, if there are not enough Tx queues (which means not enough CPU cores
644 and CPU resources are scarce), data inline is not performed by the driver.
645 Assigning ``txqs_min_inline`` with zero always enables the data inline.
647 The default ``txq_inline_mpw`` value is 268. The specified value may be adjusted
648 by the driver in order not to exceed the limit (930 bytes) and to provide better
649 WQE space filling without gaps, the adjustment is reflected in the debug log.
650 Due to multiple packets may be included to the same WQE with Enhanced Multi
651 Packet Write Method and overall WQE size is limited it is not recommended to
652 specify large values for the ``txq_inline_mpw``. Also, the default value (268)
653 may be decreased in run-time if the large transmit queue size is requested
654 and hardware does not support enough descriptor amount, in this case warning
655 is emitted. If ``txq_inline_mpw`` key is specified and requested inline
656 settings can not be satisfied then error will be raised.
658 - ``txqs_max_vec`` parameter [int]
660 Enable vectorized Tx only when the number of TX queues is less than or
661 equal to this value. This parameter is deprecated and ignored, kept
662 for compatibility issue to not prevent driver from probing.
664 - ``txq_mpw_hdr_dseg_en`` parameter [int]
666 A nonzero value enables including two pointers in the first block of TX
667 descriptor. The parameter is deprecated and ignored, kept for compatibility
670 - ``txq_max_inline_len`` parameter [int]
672 Maximum size of packet to be inlined. This limits the size of packet to
673 be inlined. If the size of a packet is larger than configured value, the
674 packet isn't inlined even though there's enough space remained in the
675 descriptor. Instead, the packet is included with pointer. This parameter
676 is deprecated and converted directly to ``txq_inline_mpw`` providing full
677 compatibility. Valid only if eMPW feature is engaged.
679 - ``txq_mpw_en`` parameter [int]
681 A nonzero value enables Enhanced Multi-Packet Write (eMPW) for ConnectX-5,
682 ConnectX-6, ConnectX-6 Dx and BlueField. eMPW allows the TX burst function to pack
683 up multiple packets in a single descriptor session in order to save PCI bandwidth
684 and improve performance at the cost of a slightly higher CPU usage. When
685 ``txq_inline_mpw`` is set along with ``txq_mpw_en``, TX burst function copies
686 entire packet data on to TX descriptor instead of including pointer of packet.
688 The Enhanced Multi-Packet Write feature is enabled by default if NIC supports
689 it, can be disabled by explicit specifying 0 value for ``txq_mpw_en`` option.
690 Also, if minimal data inlining is requested by non-zero ``txq_inline_min``
691 option or reported by the NIC, the eMPW feature is disengaged.
693 - ``tx_db_nc`` parameter [int]
695 The rdma core library can map doorbell register in two ways, depending on the
696 environment variable "MLX5_SHUT_UP_BF":
698 - As regular cached memory (usually with write combining attribute), if the
699 variable is either missing or set to zero.
700 - As non-cached memory, if the variable is present and set to not "0" value.
702 The type of mapping may slightly affect the Tx performance, the optimal choice
703 is strongly relied on the host architecture and should be deduced practically.
705 If ``tx_db_nc`` is set to zero, the doorbell is forced to be mapped to regular
706 memory (with write combining), the PMD will perform the extra write memory barrier
707 after writing to doorbell, it might increase the needed CPU clocks per packet
708 to send, but latency might be improved.
710 If ``tx_db_nc`` is set to one, the doorbell is forced to be mapped to non
711 cached memory, the PMD will not perform the extra write memory barrier
712 after writing to doorbell, on some architectures it might improve the
715 If ``tx_db_nc`` is set to two, the doorbell is forced to be mapped to regular
716 memory, the PMD will use heuristics to decide whether write memory barrier
717 should be performed. For bursts with size multiple of recommended one (64 pkts)
718 it is supposed the next burst is coming and no need to issue the extra memory
719 barrier (it is supposed to be issued in the next coming burst, at least after
720 descriptor writing). It might increase latency (on some hosts till next
721 packets transmit) and should be used with care.
723 If ``tx_db_nc`` is omitted or set to zero, the preset (if any) environment
724 variable "MLX5_SHUT_UP_BF" value is used. If there is no "MLX5_SHUT_UP_BF",
725 the default ``tx_db_nc`` value is zero for ARM64 hosts and one for others.
727 - ``tx_pp`` parameter [int]
729 If a nonzero value is specified the driver creates all necessary internal
730 objects to provide accurate packet send scheduling on mbuf timestamps.
731 The positive value specifies the scheduling granularity in nanoseconds,
732 the packet send will be accurate up to specified digits. The allowed range is
733 from 500 to 1 million of nanoseconds. The negative value specifies the module
734 of granularity and engages the special test mode the check the schedule rate.
735 By default (if the ``tx_pp`` is not specified) send scheduling on timestamps
738 - ``tx_skew`` parameter [int]
740 The parameter adjusts the send packet scheduling on timestamps and represents
741 the average delay between beginning of the transmitting descriptor processing
742 by the hardware and appearance of actual packet data on the wire. The value
743 should be provided in nanoseconds and is valid only if ``tx_pp`` parameter is
744 specified. The default value is zero.
746 - ``tx_vec_en`` parameter [int]
748 A nonzero value enables Tx vector on ConnectX-5, ConnectX-6, ConnectX-6 Dx
749 and BlueField NICs if the number of global Tx queues on the port is less than
750 ``txqs_max_vec``. The parameter is deprecated and ignored.
752 - ``rx_vec_en`` parameter [int]
754 A nonzero value enables Rx vector if the port is not configured in
755 multi-segment otherwise this parameter is ignored.
759 - ``vf_nl_en`` parameter [int]
761 A nonzero value enables Netlink requests from the VF to add/remove MAC
762 addresses or/and enable/disable promiscuous/all multicast on the Netdevice.
763 Otherwise the relevant configuration must be run with Linux iproute2 tools.
764 This is a prerequisite to receive this kind of traffic.
766 Enabled by default, valid only on VF devices ignored otherwise.
768 - ``l3_vxlan_en`` parameter [int]
770 A nonzero value allows L3 VXLAN and VXLAN-GPE flow creation. To enable
771 L3 VXLAN or VXLAN-GPE, users has to configure firmware and enable this
772 parameter. This is a prerequisite to receive this kind of traffic.
776 - ``dv_xmeta_en`` parameter [int]
778 A nonzero value enables extensive flow metadata support if device is
779 capable and driver supports it. This can enable extensive support of
780 ``MARK`` and ``META`` item of ``rte_flow``. The newly introduced
781 ``SET_TAG`` and ``SET_META`` actions do not depend on ``dv_xmeta_en``.
783 There are some possible configurations, depending on parameter value:
785 - 0, this is default value, defines the legacy mode, the ``MARK`` and
786 ``META`` related actions and items operate only within NIC Tx and
787 NIC Rx steering domains, no ``MARK`` and ``META`` information crosses
788 the domain boundaries. The ``MARK`` item is 24 bits wide, the ``META``
789 item is 32 bits wide and match supported on egress only.
791 - 1, this engages extensive metadata mode, the ``MARK`` and ``META``
792 related actions and items operate within all supported steering domains,
793 including FDB, ``MARK`` and ``META`` information may cross the domain
794 boundaries. The ``MARK`` item is 24 bits wide, the ``META`` item width
795 depends on kernel and firmware configurations and might be 0, 16 or
796 32 bits. Within NIC Tx domain ``META`` data width is 32 bits for
797 compatibility, the actual width of data transferred to the FDB domain
798 depends on kernel configuration and may be vary. The actual supported
799 width can be retrieved in runtime by series of rte_flow_validate()
802 - 2, this engages extensive metadata mode, the ``MARK`` and ``META``
803 related actions and items operate within all supported steering domains,
804 including FDB, ``MARK`` and ``META`` information may cross the domain
805 boundaries. The ``META`` item is 32 bits wide, the ``MARK`` item width
806 depends on kernel and firmware configurations and might be 0, 16 or
807 24 bits. The actual supported width can be retrieved in runtime by
808 series of rte_flow_validate() trials.
810 +------+-----------+-----------+-------------+-------------+
811 | Mode | ``MARK`` | ``META`` | ``META`` Tx | FDB/Through |
812 +======+===========+===========+=============+=============+
813 | 0 | 24 bits | 32 bits | 32 bits | no |
814 +------+-----------+-----------+-------------+-------------+
815 | 1 | 24 bits | vary 0-32 | 32 bits | yes |
816 +------+-----------+-----------+-------------+-------------+
817 | 2 | vary 0-32 | 32 bits | 32 bits | yes |
818 +------+-----------+-----------+-------------+-------------+
820 If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
821 ignored and the device is configured to operate in legacy mode (0).
823 Disabled by default (set to 0).
825 The Direct Verbs/Rules (engaged with ``dv_flow_en`` = 1) supports all
826 of the extensive metadata features. The legacy Verbs supports FLAG and
827 MARK metadata actions over NIC Rx steering domain only.
829 - ``dv_flow_en`` parameter [int]
831 A nonzero value enables the DV flow steering assuming it is supported
832 by the driver (RDMA Core library version is rdma-core-24.0 or higher).
834 Enabled by default if supported.
836 - ``dv_esw_en`` parameter [int]
838 A nonzero value enables E-Switch using Direct Rules.
840 Enabled by default if supported.
842 - ``lacp_by_user`` parameter [int]
844 A nonzero value enables the control of LACP traffic by the user application.
845 When a bond exists in the driver, by default it should be managed by the
846 kernel and therefore LACP traffic should be steered to the kernel.
847 If this devarg is set to 1 it will allow the user to manage the bond by
848 itself and not steer LACP traffic to the kernel.
850 Disabled by default (set to 0).
852 - ``mr_ext_memseg_en`` parameter [int]
854 A nonzero value enables extending memseg when registering DMA memory. If
855 enabled, the number of entries in MR (Memory Region) lookup table on datapath
856 is minimized and it benefits performance. On the other hand, it worsens memory
857 utilization because registered memory is pinned by kernel driver. Even if a
858 page in the extended chunk is freed, that doesn't become reusable until the
859 entire memory is freed.
863 - ``representor`` parameter [list]
865 This parameter can be used to instantiate DPDK Ethernet devices from
866 existing port (or VF) representors configured on the device.
868 It is a standard parameter whose format is described in
869 :ref:`ethernet_device_standard_device_arguments`.
871 For instance, to probe port representors 0 through 2::
875 - ``max_dump_files_num`` parameter [int]
877 The maximum number of files per PMD entity that may be created for debug information.
878 The files will be created in /var/log directory or in current directory.
880 set to 128 by default.
882 - ``lro_timeout_usec`` parameter [int]
884 The maximum allowed duration of an LRO session, in micro-seconds.
885 PMD will set the nearest value supported by HW, which is not bigger than
886 the input ``lro_timeout_usec`` value.
887 If this parameter is not specified, by default PMD will set
888 the smallest value supported by HW.
890 - ``hp_buf_log_sz`` parameter [int]
892 The total data buffer size of a hairpin queue (logarithmic form), in bytes.
893 PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
894 The capacity of the value is specified by the firmware and the initialization
895 will get a failure if it is out of scope.
896 The range of the value is from 11 to 19 right now, and the supported frame
897 size of a single packet for hairpin is from 512B to 128KB. It might change if
898 different firmware release is being used. By using a small value, it could
899 reduce memory consumption but not work with a large frame. If the value is
900 too large, the memory consumption will be high and some potential performance
901 degradation will be introduced.
902 By default, the PMD will set this value to 16, which means that 9KB jumbo
903 frames will be supported.
905 - ``reclaim_mem_mode`` parameter [int]
907 Cache some resources in flow destroy will help flow recreation more efficient.
908 While some systems may require the all the resources can be reclaimed after
910 The parameter ``reclaim_mem_mode`` provides the option for user to configure
911 if the resource cache is needed or not.
913 There are three options to choose:
915 - 0. It means the flow resources will be cached as usual. The resources will
916 be cached, helpful with flow insertion rate.
918 - 1. It will only enable the DPDK PMD level resources reclaim.
920 - 2. Both DPDK PMD level and rdma-core low level will be configured as
923 By default, the PMD will set this value to 0.
925 - ``sys_mem_en`` parameter [int]
927 A non-zero value enables the PMD memory management allocating memory
928 from system by default, without explicit rte memory flag.
930 By default, the PMD will set this value to 0.
932 .. _mlx5_firmware_config:
934 Firmware configuration
935 ~~~~~~~~~~~~~~~~~~~~~~
937 Firmware features can be configured as key/value pairs.
939 The command to set a value is::
941 mlxconfig -d <device> set <key>=<value>
943 The command to query a value is::
945 mlxconfig -d <device> query | grep <key>
947 The device name for the command ``mlxconfig`` can be either the PCI address,
948 or the mst device name found with::
952 Below are some firmware configurations listed.
958 value: 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
964 - maximum number of SR-IOV virtual functions::
968 - enable DevX (required by Direct Rules and other features)::
972 - aggressive CQE zipping::
976 - L3 VXLAN and VXLAN-GPE destination UDP port::
979 IP_OVER_VXLAN_PORT=<udp dport>
981 - enable VXLAN-GPE tunnel flow matching::
983 FLEX_PARSER_PROFILE_ENABLE=0
985 FLEX_PARSER_PROFILE_ENABLE=2
987 - enable IP-in-IP tunnel flow matching::
989 FLEX_PARSER_PROFILE_ENABLE=0
991 - enable MPLS flow matching::
993 FLEX_PARSER_PROFILE_ENABLE=1
995 - enable ICMP/ICMP6 code/type fields matching::
997 FLEX_PARSER_PROFILE_ENABLE=2
999 - enable Geneve flow matching::
1001 FLEX_PARSER_PROFILE_ENABLE=0
1003 FLEX_PARSER_PROFILE_ENABLE=1
1005 - enable GTP flow matching::
1007 FLEX_PARSER_PROFILE_ENABLE=3
1009 - enable eCPRI flow matching::
1011 FLEX_PARSER_PROFILE_ENABLE=4
1017 This driver relies on external libraries and kernel drivers for resources
1018 allocations and initialization. The following dependencies are not part of
1019 DPDK and must be installed separately:
1023 User space Verbs framework used by librte_pmd_mlx5. This library provides
1024 a generic interface between the kernel and low-level user space drivers
1027 It allows slow and privileged operations (context initialization, hardware
1028 resources allocations) to be managed by the kernel and fast operations to
1029 never leave user space.
1033 Low-level user space driver library for Mellanox
1034 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices, it is automatically loaded
1037 This library basically implements send/receive calls to the hardware
1040 - **Kernel modules**
1042 They provide the kernel-side Verbs API and low level device drivers that
1043 manage actual hardware initialization and resources sharing with user
1046 Unlike most other PMDs, these modules must remain loaded and bound to
1049 - mlx5_core: hardware driver managing Mellanox
1050 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices and related Ethernet kernel
1052 - mlx5_ib: InifiniBand device driver.
1053 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
1055 - **Firmware update**
1057 Mellanox OFED/EN releases include firmware updates for
1058 ConnectX-4/ConnectX-5/ConnectX-6/BlueField adapters.
1060 Because each release provides new features, these updates must be applied to
1061 match the kernel modules and libraries they come with.
1065 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
1071 Either RDMA Core library with a recent enough Linux kernel release
1072 (recommended) or Mellanox OFED/EN, which provides compatibility with older
1075 RDMA Core with Linux Kernel
1076 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
1078 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
1079 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
1080 (see `RDMA Core installation documentation`_)
1081 - When building for i686 use:
1083 - rdma-core version 18.0 or above built with 32bit support.
1084 - Kernel version 4.14.41 or above.
1086 - Starting with rdma-core v21, static libraries can be built::
1089 CFLAGS=-fPIC cmake -DIN_PLACE=1 -DENABLE_STATIC=1 -GNinja ..
1092 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
1093 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
1095 If rdma-core libraries are built but not installed, DPDK makefile can link them,
1096 thanks to these environment variables:
1098 - ``EXTRA_CFLAGS=-I/path/to/rdma-core/build/include``
1099 - ``EXTRA_LDFLAGS=-L/path/to/rdma-core/build/lib``
1100 - ``PKG_CONFIG_PATH=/path/to/rdma-core/build/lib/pkgconfig``
1105 - Mellanox OFED version: **4.5** and above /
1106 Mellanox EN version: **4.5** and above
1109 - ConnectX-4: **12.21.1000** and above.
1110 - ConnectX-4 Lx: **14.21.1000** and above.
1111 - ConnectX-5: **16.21.1000** and above.
1112 - ConnectX-5 Ex: **16.21.1000** and above.
1113 - ConnectX-6: **20.27.0090** and above.
1114 - ConnectX-6 Dx: **22.27.0090** and above.
1115 - BlueField: **18.25.1010** and above.
1117 While these libraries and kernel modules are available on OpenFabrics
1118 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
1119 managers on most distributions, this PMD requires Ethernet extensions that
1120 may not be supported at the moment (this is a work in progress).
1123 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__ and
1125 <http://www.mellanox.com/page/products_dyn?product_family=27&mtag=linux>`__
1126 include the necessary support and should be used in the meantime. For DPDK,
1127 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
1128 required from that distribution.
1132 Several versions of Mellanox OFED/EN are available. Installing the version
1133 this DPDK release was developed and tested against is strongly
1134 recommended. Please check the `prerequisites`_.
1139 The following Mellanox device families are supported by the same mlx5 driver:
1149 Below are detailed device names:
1151 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX4111A-XCAT (1x10G)
1152 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX412A-XCAT (2x10G)
1153 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX4111A-ACAT (1x25G)
1154 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX412A-ACAT (2x25G)
1155 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX413A-BCAT (1x40G)
1156 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX4131A-BCAT (1x40G)
1157 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX415A-BCAT (1x40G)
1158 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX413A-GCAT (1x50G)
1159 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX4131A-GCAT (1x50G)
1160 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX414A-BCAT (2x50G)
1161 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-GCAT (1x50G)
1162 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-BCAT (2x50G)
1163 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-GCAT (2x50G)
1164 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-CCAT (1x100G)
1165 * Mellanox\ |reg| ConnectX\ |reg|-4 100G MCX416A-CCAT (2x100G)
1166 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4111A-XCAT (1x10G)
1167 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4121A-XCAT (2x10G)
1168 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4111A-ACAT (1x25G)
1169 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4121A-ACAT (2x25G)
1170 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 40G MCX4131A-BCAT (1x40G)
1171 * Mellanox\ |reg| ConnectX\ |reg|-5 100G MCX556A-ECAT (2x100G)
1172 * Mellanox\ |reg| ConnectX\ |reg|-5 Ex EN 100G MCX516A-CDAT (2x100G)
1173 * Mellanox\ |reg| ConnectX\ |reg|-6 200G MCX654106A-HCAT (2x200G)
1174 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 100G MCX623106AN-CDAT (2x100G)
1175 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 200G MCX623105AN-VDAT (1x200G)
1177 Quick Start Guide on OFED/EN
1178 ----------------------------
1180 1. Download latest Mellanox OFED/EN. For more info check the `prerequisites`_.
1183 2. Install the required libraries and kernel modules either by installing
1184 only the required set, or by installing the entire Mellanox OFED/EN::
1186 ./mlnxofedinstall --upstream-libs --dpdk
1188 3. Verify the firmware is the correct one::
1192 4. Verify all ports links are set to Ethernet::
1194 mlxconfig -d <mst device> query | grep LINK_TYPE
1198 Link types may have to be configured to Ethernet::
1200 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
1202 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
1204 For hypervisors, verify SR-IOV is enabled on the NIC::
1206 mlxconfig -d <mst device> query | grep SRIOV_EN
1209 If needed, configure SR-IOV::
1211 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
1212 mlxfwreset -d <mst device> reset
1214 5. Restart the driver::
1216 /etc/init.d/openibd restart
1220 service openibd restart
1222 If link type was changed, firmware must be reset as well::
1224 mlxfwreset -d <mst device> reset
1226 For hypervisors, after reset write the sysfs number of virtual functions
1229 To dynamically instantiate a given number of virtual functions (VFs)::
1231 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
1233 6. Compile DPDK and you are ready to go. See instructions on
1234 :ref:`Development Kit Build System <Development_Kit_Build_System>`
1236 Enable switchdev mode
1237 ---------------------
1239 Switchdev mode is a mode in E-Switch, that binds between representor and VF.
1240 Representor is a port in DPDK that is connected to a VF in such a way
1241 that assuming there are no offload flows, each packet that is sent from the VF
1242 will be received by the corresponding representor. While each packet that is
1243 sent to a representor will be received by the VF.
1244 This is very useful in case of SRIOV mode, where the first packet that is sent
1245 by the VF will be received by the DPDK application which will decide if this
1246 flow should be offloaded to the E-Switch. After offloading the flow packet
1247 that the VF that are matching the flow will not be received any more by
1248 the DPDK application.
1250 1. Enable SRIOV mode::
1252 mlxconfig -d <mst device> set SRIOV_EN=true
1254 2. Configure the max number of VFs::
1256 mlxconfig -d <mst device> set NUM_OF_VFS=<num of vfs>
1260 mlxfwreset -d <mst device> reset
1262 3. Configure the actual number of VFs::
1264 echo <num of vfs > /sys/class/net/<net device>/device/sriov_numvfs
1266 4. Unbind the device (can be rebind after the switchdev mode)::
1268 echo -n "<device pci address" > /sys/bus/pci/drivers/mlx5_core/unbind
1270 5. Enbale switchdev mode::
1272 echo switchdev > /sys/class/net/<net device>/compat/devlink/mode
1277 1. Configure aggressive CQE Zipping for maximum performance::
1279 mlxconfig -d <mst device> s CQE_COMPRESSION=1
1281 To set it back to the default CQE Zipping mode use::
1283 mlxconfig -d <mst device> s CQE_COMPRESSION=0
1285 2. In case of virtualization:
1287 - Make sure that hypervisor kernel is 3.16 or newer.
1288 - Configure boot with ``iommu=pt``.
1289 - Use 1G huge pages.
1290 - Make sure to allocate a VM on huge pages.
1291 - Make sure to set CPU pinning.
1293 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
1294 for better performance. For VMs, verify that the right CPU
1295 and NUMA node are pinned according to the above. Run::
1299 to identify the NUMA node to which the PCIe adapter is connected.
1301 4. If more than one adapter is used, and root complex capabilities allow
1302 to put both adapters on the same NUMA node without PCI bandwidth degradation,
1303 it is recommended to locate both adapters on the same NUMA node.
1304 This in order to forward packets from one to the other without
1305 NUMA performance penalty.
1307 5. Disable pause frames::
1309 ethtool -A <netdev> rx off tx off
1311 6. Verify IO non-posted prefetch is disabled by default. This can be checked
1312 via the BIOS configuration. Please contact you server provider for more
1313 information about the settings.
1317 On some machines, depends on the machine integrator, it is beneficial
1318 to set the PCI max read request parameter to 1K. This can be
1319 done in the following way:
1321 To query the read request size use::
1323 setpci -s <NIC PCI address> 68.w
1325 If the output is different than 3XXX, set it by::
1327 setpci -s <NIC PCI address> 68.w=3XXX
1329 The XXX can be different on different systems. Make sure to configure
1330 according to the setpci output.
1332 7. To minimize overhead of searching Memory Regions:
1334 - '--socket-mem' is recommended to pin memory by predictable amount.
1335 - Configure per-lcore cache when creating Mempools for packet buffer.
1336 - Refrain from dynamically allocating/freeing memory in run-time.
1338 .. _mlx5_offloads_support:
1340 Supported hardware offloads
1341 ---------------------------
1343 .. table:: Minimal SW/HW versions for queue offloads
1345 ============== ===== ===== ========= ===== ========== ==========
1346 Offload DPDK Linux rdma-core OFED firmware hardware
1347 ============== ===== ===== ========= ===== ========== ==========
1348 common base 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1349 checksums 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1350 Rx timestamp 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1351 TSO 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1352 LRO 19.08 N/A N/A 4.6-4 16.25.6406 ConnectX-5
1353 ============== ===== ===== ========= ===== ========== ==========
1355 .. table:: Minimal SW/HW versions for rte_flow offloads
1357 +-----------------------+-----------------+-----------------+
1358 | Offload | with E-Switch | with NIC |
1359 +=======================+=================+=================+
1360 | Count | | DPDK 19.05 | | DPDK 19.02 |
1361 | | | OFED 4.6 | | OFED 4.6 |
1362 | | | rdma-core 24 | | rdma-core 23 |
1363 | | | ConnectX-5 | | ConnectX-5 |
1364 +-----------------------+-----------------+-----------------+
1365 | Drop | | DPDK 19.05 | | DPDK 18.11 |
1366 | | | OFED 4.6 | | OFED 4.5 |
1367 | | | rdma-core 24 | | rdma-core 23 |
1368 | | | ConnectX-5 | | ConnectX-4 |
1369 +-----------------------+-----------------+-----------------+
1370 | Queue / RSS | | | | DPDK 18.11 |
1371 | | | N/A | | OFED 4.5 |
1372 | | | | | rdma-core 23 |
1373 | | | | | ConnectX-4 |
1374 +-----------------------+-----------------+-----------------+
1375 | Encapsulation | | DPDK 19.05 | | DPDK 19.02 |
1376 | (VXLAN / NVGRE / RAW) | | OFED 4.7-1 | | OFED 4.6 |
1377 | | | rdma-core 24 | | rdma-core 23 |
1378 | | | ConnectX-5 | | ConnectX-5 |
1379 +-----------------------+-----------------+-----------------+
1380 | Encapsulation | | DPDK 19.11 | | DPDK 19.11 |
1381 | GENEVE | | OFED 4.7-3 | | OFED 4.7-3 |
1382 | | | rdma-core 27 | | rdma-core 27 |
1383 | | | ConnectX-5 | | ConnectX-5 |
1384 +-----------------------+-----------------+-----------------+
1385 | | Header rewrite | | DPDK 19.05 | | DPDK 19.02 |
1386 | | (set_ipv4_src / | | OFED 4.7-1 | | OFED 4.7-1 |
1387 | | set_ipv4_dst / | | rdma-core 24 | | rdma-core 24 |
1388 | | set_ipv6_src / | | ConnectX-5 | | ConnectX-5 |
1389 | | set_ipv6_dst / | | | | |
1390 | | set_tp_src / | | | | |
1391 | | set_tp_dst / | | | | |
1392 | | dec_ttl / | | | | |
1393 | | set_ttl / | | | | |
1394 | | set_mac_src / | | | | |
1395 | | set_mac_dst) | | | | |
1396 +-----------------------+-----------------+-----------------+
1397 | | Header rewrite | | DPDK 20.02 | | DPDK 20.02 |
1398 | | (set_dscp) | | OFED 5.0 | | OFED 5.0 |
1399 | | | | rdma-core 24 | | rdma-core 24 |
1400 | | | | ConnectX-5 | | ConnectX-5 |
1401 +-----------------------+-----------------+-----------------+
1402 | Jump | | DPDK 19.05 | | DPDK 19.02 |
1403 | | | OFED 4.7-1 | | OFED 4.7-1 |
1404 | | | rdma-core 24 | | N/A |
1405 | | | ConnectX-5 | | ConnectX-5 |
1406 +-----------------------+-----------------+-----------------+
1407 | Mark / Flag | | DPDK 19.05 | | DPDK 18.11 |
1408 | | | OFED 4.6 | | OFED 4.5 |
1409 | | | rdma-core 24 | | rdma-core 23 |
1410 | | | ConnectX-5 | | ConnectX-4 |
1411 +-----------------------+-----------------+-----------------+
1412 | Port ID | | DPDK 19.05 | | N/A |
1413 | | | OFED 4.7-1 | | N/A |
1414 | | | rdma-core 24 | | N/A |
1415 | | | ConnectX-5 | | N/A |
1416 +-----------------------+-----------------+-----------------+
1417 | | VLAN | | DPDK 19.11 | | DPDK 19.11 |
1418 | | (of_pop_vlan / | | OFED 4.7-1 | | OFED 4.7-1 |
1419 | | of_push_vlan / | | ConnectX-5 | | ConnectX-5 |
1420 | | of_set_vlan_pcp / | | | | |
1421 | | of_set_vlan_vid) | | | | |
1422 +-----------------------+-----------------+-----------------+
1423 | Hairpin | | | | DPDK 19.11 |
1424 | | | N/A | | OFED 4.7-3 |
1425 | | | | | rdma-core 26 |
1426 | | | | | ConnectX-5 |
1427 +-----------------------+-----------------+-----------------+
1428 | Meta data | | DPDK 19.11 | | DPDK 19.11 |
1429 | | | OFED 4.7-3 | | OFED 4.7-3 |
1430 | | | rdma-core 26 | | rdma-core 26 |
1431 | | | ConnectX-5 | | ConnectX-5 |
1432 +-----------------------+-----------------+-----------------+
1433 | Metering | | DPDK 19.11 | | DPDK 19.11 |
1434 | | | OFED 4.7-3 | | OFED 4.7-3 |
1435 | | | rdma-core 26 | | rdma-core 26 |
1436 | | | ConnectX-5 | | ConnectX-5 |
1437 +-----------------------+-----------------+-----------------+
1442 MARK and META items are interrelated with datapath - they might move from/to
1443 the applications in mbuf fields. Hence, zero value for these items has the
1444 special meaning - it means "no metadata are provided", not zero values are
1445 treated by applications and PMD as valid ones.
1447 Moreover in the flow engine domain the value zero is acceptable to match and
1448 set, and we should allow to specify zero values as rte_flow parameters for the
1449 META and MARK items and actions. In the same time zero mask has no meaning and
1450 should be rejected on validation stage.
1455 Flows are not cached in the driver.
1456 When stopping a device port, all the flows created on this port from the
1457 application will be flushed automatically in the background.
1458 After stopping the device port, all flows on this port become invalid and
1459 not represented in the system.
1460 All references to these flows held by the application should be discarded
1461 directly but neither destroyed nor flushed.
1463 The application should re-create the flows as required after the port restart.
1468 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
1469 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
1471 Since ``testpmd`` defaults to IP RSS mode and there is currently no
1472 command-line parameter to enable additional protocols (UDP and TCP as well
1473 as IP), the following commands must be entered from its CLI to get the same
1474 behavior as librte_pmd_mlx4::
1477 > port config all rss all
1483 This section demonstrates how to launch **testpmd** with Mellanox
1484 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices managed by librte_pmd_mlx5.
1486 #. Load the kernel modules::
1488 modprobe -a ib_uverbs mlx5_core mlx5_ib
1490 Alternatively if MLNX_OFED/MLNX_EN is fully installed, the following script
1493 /etc/init.d/openibd restart
1497 User space I/O kernel modules (uio and igb_uio) are not used and do
1498 not have to be loaded.
1500 #. Make sure Ethernet interfaces are in working order and linked to kernel
1501 verbs. Related sysfs entries should be present::
1503 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
1512 #. Optionally, retrieve their PCI bus addresses for whitelisting::
1515 for intf in eth2 eth3 eth4 eth5;
1517 (cd "/sys/class/net/${intf}/device/" && pwd -P);
1520 sed -n 's,.*/\(.*\),-w \1,p'
1529 #. Request huge pages::
1531 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
1533 #. Start testpmd with basic parameters::
1535 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
1540 EAL: PCI device 0000:05:00.0 on NUMA socket 0
1541 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1542 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
1543 PMD: librte_pmd_mlx5: 1 port(s) detected
1544 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
1545 EAL: PCI device 0000:05:00.1 on NUMA socket 0
1546 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1547 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
1548 PMD: librte_pmd_mlx5: 1 port(s) detected
1549 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
1550 EAL: PCI device 0000:06:00.0 on NUMA socket 0
1551 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1552 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
1553 PMD: librte_pmd_mlx5: 1 port(s) detected
1554 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
1555 EAL: PCI device 0000:06:00.1 on NUMA socket 0
1556 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1557 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
1558 PMD: librte_pmd_mlx5: 1 port(s) detected
1559 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
1560 Interactive-mode selected
1561 Configuring Port 0 (socket 0)
1562 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
1563 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
1564 Port 0: E4:1D:2D:E7:0C:FE
1565 Configuring Port 1 (socket 0)
1566 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
1567 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
1568 Port 1: E4:1D:2D:E7:0C:FF
1569 Configuring Port 2 (socket 0)
1570 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
1571 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
1572 Port 2: E4:1D:2D:E7:0C:FA
1573 Configuring Port 3 (socket 0)
1574 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
1575 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
1576 Port 3: E4:1D:2D:E7:0C:FB
1577 Checking link statuses...
1578 Port 0 Link Up - speed 40000 Mbps - full-duplex
1579 Port 1 Link Up - speed 40000 Mbps - full-duplex
1580 Port 2 Link Up - speed 10000 Mbps - full-duplex
1581 Port 3 Link Up - speed 10000 Mbps - full-duplex
1588 This section demonstrates how to dump flows. Currently, it's possible to dump
1589 all flows with assistance of external tools.
1591 #. 2 ways to get flow raw file:
1593 - Using testpmd CLI:
1595 .. code-block:: console
1597 testpmd> flow dump <port> <output_file>
1599 - call rte_flow_dev_dump api:
1601 .. code-block:: console
1603 rte_flow_dev_dump(port, file, NULL);
1605 #. Dump human-readable flows from raw file:
1607 Get flow parsing tool from: https://github.com/Mellanox/mlx_steering_dump
1609 .. code-block:: console
1611 mlx_steering_dump.py -f <output_file>