1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox Technologies, Ltd
8 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
9 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** , **Mellanox
10 ConnectX-5** and **Mellanox Bluefield** families of 10/25/40/50/100 Gb/s
11 adapters as well as their virtual functions (VF) in SR-IOV context.
13 Information and documentation about these adapters can be found on the
14 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
15 `Mellanox community <http://community.mellanox.com/welcome>`__.
17 There is also a `section dedicated to this poll mode driver
18 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
22 Due to external dependencies, this driver is disabled by default. It must
23 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
26 Implementation details
27 ----------------------
29 Besides its dependency on libibverbs (that implies libmlx5 and associated
30 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
31 operations such as querying/updating the MTU and flow control parameters.
33 For security reasons and robustness, this driver only deals with virtual
34 memory addresses. The way resources allocations are handled by the kernel
35 combined with hardware specifications that allow it to handle virtual memory
36 addresses directly ensure that DPDK applications cannot access random
37 physical memory (or memory that does not belong to the current process).
39 This capability allows the PMD to coexist with kernel network interfaces
40 which remain functional, although they stop receiving unicast packets as
41 long as they share the same MAC address.
42 This means legacy linux control tools (for example: ethtool, ifconfig and
43 more) can operate on the same network interfaces that owned by the DPDK
46 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
52 - Multi arch support: x86_64, POWER8, ARMv8, i686.
53 - Multiple TX and RX queues.
54 - Support for scattered TX and RX frames.
55 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
56 - Several RSS hash keys, one for each flow type.
57 - Configurable RETA table.
58 - Support for multiple MAC addresses.
62 - RX CRC stripping configuration.
64 - Multicast promiscuous mode.
65 - Hardware checksum offloads.
66 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
70 - KVM and VMware ESX SR-IOV modes are supported.
71 - RSS hash result is supported.
72 - Hardware TSO for generic IP or UDP tunnel, including VXLAN and GRE.
73 - Hardware checksum Tx offload for generic IP or UDP tunnel, including VXLAN and GRE.
75 - Statistics query including Basic, Extended and per queue.
77 - Tunnel types: VXLAN, L3 VXLAN, VXLAN-GPE, GRE, MPLSoGRE, MPLSoUDP.
78 - Tunnel HW offloads: packet type, inner/outer RSS, IP and UDP checksum verification.
83 - For secondary process:
85 - Forked secondary process not supported.
86 - All mempools must be initialized before rte_eth_dev_start().
88 - Flow pattern without any specific vlan will match for vlan packets as well:
90 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
91 Meaning, the flow rule::
93 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
95 Will only match vlan packets with vid=3. and the flow rules::
97 flow create 0 ingress pattern eth / ipv4 / end ...
101 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
103 Will match any ipv4 packet (VLAN included).
105 - A multi segment packet must have less than 6 segments in case the Tx burst function
106 is set to multi-packet send or Enhanced multi-packet send. Otherwise it must have
107 less than 50 segments.
109 - Count action for RTE flow is **only supported in Mellanox OFED**.
111 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
112 to 0 are not supported.
114 - VXLAN TSO and checksum offloads are not supported on VM.
116 - L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with MPLSoGRE and MPLSoUDP.
118 - VF: flow rules created on VF devices can only match traffic targeted at the
119 configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).
123 MAC addresses not already present in the bridge table of the associated
124 kernel network device will be added and cleaned up by the PMD when closing
125 the device. In case of ungraceful program termination, some entries may
126 remain present and should be removed manually by other means.
128 - When Multi-Packet Rx queue is configured (``mprq_en``), a Rx packet can be
129 externally attached to a user-provided mbuf with having EXT_ATTACHED_MBUF in
130 ol_flags. As the mempool for the external buffer is managed by PMD, all the
131 Rx mbufs must be freed before the device is closed. Otherwise, the mempool of
132 the external buffers will be freed by PMD and the application which still
133 holds the external buffers may be corrupted.
135 - If Multi-Packet Rx queue is configured (``mprq_en``) and Rx CQE compression is
136 enabled (``rxq_cqe_comp_en``) at the same time, RSS hash result is not fully
137 supported. Some Rx packets may not have PKT_RX_RSS_HASH.
142 MLX5 supports various of methods to report statistics:
144 Port statistics can be queried using ``rte_eth_stats_get()``. The port statistics are through SW only and counts the number of packets received or sent successfully by the PMD.
146 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
148 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
156 These options can be modified in the ``.config`` file.
158 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
160 Toggle compilation of librte_pmd_mlx5 itself.
162 - ``CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS`` (default **n**)
164 Build PMD with additional code to make it loadable without hard
165 dependencies on **libibverbs** nor **libmlx5**, which may not be installed
166 on the target system.
168 In this mode, their presence is still required for it to run properly,
169 however their absence won't prevent a DPDK application from starting (with
170 ``CONFIG_RTE_BUILD_SHARED_LIB`` disabled) and they won't show up as
171 missing with ``ldd(1)``.
173 It works by moving these dependencies to a purpose-built rdma-core "glue"
174 plug-in which must either be installed in a directory whose name is based
175 on ``CONFIG_RTE_EAL_PMD_PATH`` suffixed with ``-glue`` if set, or in a
176 standard location for the dynamic linker (e.g. ``/lib``) if left to the
177 default empty string (``""``).
179 This option has no performance impact.
181 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
183 Toggle debugging code and stricter compilation flags. Enabling this option
184 adds additional run-time checks and debugging messages at the cost of
187 Environment variables
188 ~~~~~~~~~~~~~~~~~~~~~
192 A list of directories in which to search for the rdma-core "glue" plug-in,
193 separated by colons or semi-colons.
195 Only matters when compiled with ``CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS``
196 enabled and most useful when ``CONFIG_RTE_EAL_PMD_PATH`` is also set,
197 since ``LD_LIBRARY_PATH`` has no effect in this case.
199 - ``MLX5_PMD_ENABLE_PADDING``
201 Enables HW packet padding in PCI bus transactions.
203 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
204 bytes are written to the PCI bus. Enabling padding makes such packets
207 In cases where PCI bandwidth is the bottleneck, padding can improve
210 This is disabled by default since this can also decrease performance for
211 unaligned packet sizes.
213 - ``MLX5_SHUT_UP_BF``
215 Configures HW Tx doorbell register as IO-mapped.
217 By default, the HW Tx doorbell is configured as a write-combining register.
218 The register would be flushed to HW usually when the write-combining buffer
219 becomes full, but it depends on CPU design.
221 Except for vectorized Tx burst routines, a write memory barrier is enforced
222 after updating the register so that the update can be immediately visible to
225 When vectorized Tx burst is called, the barrier is set only if the burst size
226 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
227 variable will bring better latency even though the maximum throughput can
230 Run-time configuration
231 ~~~~~~~~~~~~~~~~~~~~~~
233 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
234 because it is affected by their state. Forcing them down prevents packets
237 - **ethtool** operations on related kernel interfaces also affect the PMD.
239 - ``rxq_cqe_comp_en`` parameter [int]
241 A nonzero value enables the compression of CQE on RX side. This feature
242 allows to save PCI bandwidth and improve performance. Enabled by default.
246 - x86_64 with ConnectX-4, ConnectX-4 LX, ConnectX-5 and Bluefield.
247 - POWER8 and ARMv8 with ConnectX-4 LX, ConnectX-5 and Bluefield.
249 - ``rxq_cqe_pad_en`` parameter [int]
251 A nonzero value enables 128B padding of CQE on RX side. The size of CQE
252 is aligned with the size of a cacheline of the core. If cacheline size is
253 128B, the CQE size is configured to be 128B even though the device writes
254 only 64B data on the cacheline. This is to avoid unnecessary cache
255 invalidation by device's two consecutive writes on to one cacheline.
256 However in some architecture, it is more beneficial to update entire
257 cacheline with padding the rest 64B rather than striding because
258 read-modify-write could drop performance a lot. On the other hand,
259 writing extra data will consume more PCIe bandwidth and could also drop
260 the maximum throughput. It is recommended to empirically set this
261 parameter. Disabled by default.
265 - CPU having 128B cacheline with ConnectX-5 and Bluefield.
267 - ``mprq_en`` parameter [int]
269 A nonzero value enables configuring Multi-Packet Rx queues. Rx queue is
270 configured as Multi-Packet RQ if the total number of Rx queues is
271 ``rxqs_min_mprq`` or more and Rx scatter isn't configured. Disabled by
274 Multi-Packet Rx Queue (MPRQ a.k.a Striding RQ) can further save PCIe bandwidth
275 by posting a single large buffer for multiple packets. Instead of posting a
276 buffers per a packet, one large buffer is posted in order to receive multiple
277 packets on the buffer. A MPRQ buffer consists of multiple fixed-size strides
278 and each stride receives one packet. MPRQ can improve throughput for
279 small-packet tarffic.
281 When MPRQ is enabled, max_rx_pkt_len can be larger than the size of
282 user-provided mbuf even if DEV_RX_OFFLOAD_SCATTER isn't enabled. PMD will
283 configure large stride size enough to accommodate max_rx_pkt_len as long as
284 device allows. Note that this can waste system memory compared to enabling Rx
285 scatter and multi-segment packet.
287 - ``mprq_log_stride_num`` parameter [int]
289 Log 2 of the number of strides for Multi-Packet Rx queue. Configuring more
290 strides can reduce PCIe tarffic further. If configured value is not in the
291 range of device capability, the default value will be set with a warning
292 message. The default value is 4 which is 16 strides per a buffer, valid only
293 if ``mprq_en`` is set.
295 The size of Rx queue should be bigger than the number of strides.
297 - ``mprq_max_memcpy_len`` parameter [int]
299 The maximum length of packet to memcpy in case of Multi-Packet Rx queue. Rx
300 packet is mem-copied to a user-provided mbuf if the size of Rx packet is less
301 than or equal to this parameter. Otherwise, PMD will attach the Rx packet to
302 the mbuf by external buffer attachment - ``rte_pktmbuf_attach_extbuf()``.
303 A mempool for external buffers will be allocated and managed by PMD. If Rx
304 packet is externally attached, ol_flags field of the mbuf will have
305 EXT_ATTACHED_MBUF and this flag must be preserved. ``RTE_MBUF_HAS_EXTBUF()``
306 checks the flag. The default value is 128, valid only if ``mprq_en`` is set.
308 - ``rxqs_min_mprq`` parameter [int]
310 Configure Rx queues as Multi-Packet RQ if the total number of Rx queues is
311 greater or equal to this value. The default value is 12, valid only if
314 - ``txq_inline`` parameter [int]
316 Amount of data to be inlined during TX operations. Improves latency.
317 Can improve PPS performance when PCI back pressure is detected and may be
318 useful for scenarios involving heavy traffic on many queues.
320 Because additional software logic is necessary to handle this mode, this
321 option should be used with care, as it can lower performance when back
322 pressure is not expected.
324 - ``txqs_min_inline`` parameter [int]
326 Enable inline send only when the number of TX queues is greater or equal
329 This option should be used in combination with ``txq_inline`` above.
331 On ConnectX-4, ConnectX-4 LX, ConnectX-5 and Bluefield without
334 - Disabled by default.
335 - In case ``txq_inline`` is set recommendation is 4.
337 On ConnectX-5 and Bluefield with Enhanced MPW:
339 - Set to 8 by default.
341 - ``txqs_max_vec`` parameter [int]
343 Enable vectorized Tx only when the number of TX queues is less than or
344 equal to this value. Effective only when ``tx_vec_en`` is enabled.
348 - Set to 8 by default on ARMv8.
349 - Set to 4 by default otherwise.
353 - Set to 16 by default.
355 - ``txq_mpw_en`` parameter [int]
357 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
358 enhanced multi-packet send (Enhanced MPS) for ConnectX-5 and Bluefield.
359 MPS allows the TX burst function to pack up multiple packets in a
360 single descriptor session in order to save PCI bandwidth and improve
361 performance at the cost of a slightly higher CPU usage. When
362 ``txq_inline`` is set along with ``txq_mpw_en``, TX burst function tries
363 to copy entire packet data on to TX descriptor instead of including
364 pointer of packet only if there is enough room remained in the
365 descriptor. ``txq_inline`` sets per-descriptor space for either pointers
366 or inlined packets. In addition, Enhanced MPS supports hybrid mode -
367 mixing inlined packets and pointers in the same descriptor.
369 This option cannot be used with certain offloads such as ``DEV_TX_OFFLOAD_TCP_TSO,
370 DEV_TX_OFFLOAD_VXLAN_TNL_TSO, DEV_TX_OFFLOAD_GRE_TNL_TSO, DEV_TX_OFFLOAD_VLAN_INSERT``.
371 When those offloads are requested the MPS send function will not be used.
373 It is currently only supported on the ConnectX-4 Lx, ConnectX-5 and Bluefield
374 families of adapters.
375 On ConnectX-4 Lx the MPW is considered un-secure hence disabled by default.
376 Users which enable the MPW should be aware that application which provides incorrect
377 mbuf descriptors in the Tx burst can lead to serious errors in the host including, on some cases,
379 On ConnectX-5 and Bluefield the MPW is secure and enabled by default.
381 - ``txq_mpw_hdr_dseg_en`` parameter [int]
383 A nonzero value enables including two pointers in the first block of TX
384 descriptor. This can be used to lessen CPU load for memory copy.
386 Effective only when Enhanced MPS is supported. Disabled by default.
388 - ``txq_max_inline_len`` parameter [int]
390 Maximum size of packet to be inlined. This limits the size of packet to
391 be inlined. If the size of a packet is larger than configured value, the
392 packet isn't inlined even though there's enough space remained in the
393 descriptor. Instead, the packet is included with pointer.
395 Effective only when Enhanced MPS is supported. The default value is 256.
397 - ``tx_vec_en`` parameter [int]
399 A nonzero value enables Tx vector on ConnectX-5 and Bluefield NICs if the number of
400 global Tx queues on the port is less than ``txqs_max_vec``.
402 This option cannot be used with certain offloads such as ``DEV_TX_OFFLOAD_TCP_TSO,
403 DEV_TX_OFFLOAD_VXLAN_TNL_TSO, DEV_TX_OFFLOAD_GRE_TNL_TSO, DEV_TX_OFFLOAD_VLAN_INSERT``.
404 When those offloads are requested the MPS send function will not be used.
406 Enabled by default on ConnectX-5 and Bluefield.
408 - ``rx_vec_en`` parameter [int]
410 A nonzero value enables Rx vector if the port is not configured in
411 multi-segment otherwise this parameter is ignored.
415 - ``vf_nl_en`` parameter [int]
417 A nonzero value enables Netlink requests from the VF to add/remove MAC
418 addresses or/and enable/disable promiscuous/all multicast on the Netdevice.
419 Otherwise the relevant configuration must be run with Linux iproute2 tools.
420 This is a prerequisite to receive this kind of traffic.
422 Enabled by default, valid only on VF devices ignored otherwise.
424 - ``l3_vxlan_en`` parameter [int]
426 A nonzero value allows L3 VXLAN and VXLAN-GPE flow creation. To enable
427 L3 VXLAN or VXLAN-GPE, users has to configure firmware and enable this
428 parameter. This is a prerequisite to receive this kind of traffic.
432 - ``dv_flow_en`` parameter [int]
434 A nonzero value enables the DV flow steering assuming it is supported
439 - ``representor`` parameter [list]
441 This parameter can be used to instantiate DPDK Ethernet devices from
442 existing port (or VF) representors configured on the device.
444 It is a standard parameter whose format is described in
445 :ref:`ethernet_device_standard_device_arguments`.
447 For instance, to probe port representors 0 through 2::
451 Firmware configuration
452 ~~~~~~~~~~~~~~~~~~~~~~
454 - L3 VXLAN and VXLAN-GPE destination UDP port
456 .. code-block:: console
458 mlxconfig -d <mst device> set IP_OVER_VXLAN_EN=1
459 mlxconfig -d <mst device> set IP_OVER_VXLAN_PORT=<udp dport>
461 Verify configurations are set:
463 .. code-block:: console
465 mlxconfig -d <mst device> query | grep IP_OVER_VXLAN
466 IP_OVER_VXLAN_EN True(1)
467 IP_OVER_VXLAN_PORT <udp dport>
472 This driver relies on external libraries and kernel drivers for resources
473 allocations and initialization. The following dependencies are not part of
474 DPDK and must be installed separately:
478 User space Verbs framework used by librte_pmd_mlx5. This library provides
479 a generic interface between the kernel and low-level user space drivers
482 It allows slow and privileged operations (context initialization, hardware
483 resources allocations) to be managed by the kernel and fast operations to
484 never leave user space.
488 Low-level user space driver library for Mellanox
489 ConnectX-4/ConnectX-5/Bluefield devices, it is automatically loaded
492 This library basically implements send/receive calls to the hardware
497 Minimalistic Netlink library mainly relied on to manage E-Switch flow
498 rules (i.e. those with the "transfer" attribute and typically involving
503 They provide the kernel-side Verbs API and low level device drivers that
504 manage actual hardware initialization and resources sharing with user
507 Unlike most other PMDs, these modules must remain loaded and bound to
510 - mlx5_core: hardware driver managing Mellanox
511 ConnectX-4/ConnectX-5/Bluefield devices and related Ethernet kernel
513 - mlx5_ib: InifiniBand device driver.
514 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
516 - **Firmware update**
518 Mellanox OFED releases include firmware updates for
519 ConnectX-4/ConnectX-5/Bluefield adapters.
521 Because each release provides new features, these updates must be applied to
522 match the kernel modules and libraries they come with.
526 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
532 Either RDMA Core library with a recent enough Linux kernel release
533 (recommended) or Mellanox OFED, which provides compatibility with older
536 RMDA Core with Linux Kernel
537 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
539 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
540 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
541 (see `RDMA Core installation documentation`_)
542 - When building for i686 use:
544 - rdma-core version 18.0 or above built with 32bit support.
545 - Kernel version 4.14.41 or above.
547 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
548 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
553 - Mellanox OFED version: **4.3, 4.4**.
556 - ConnectX-4: **12.21.1000** and above.
557 - ConnectX-4 Lx: **14.21.1000** and above.
558 - ConnectX-5: **16.21.1000** and above.
559 - ConnectX-5 Ex: **16.21.1000** and above.
560 - Bluefield: **18.99.3950** and above.
562 While these libraries and kernel modules are available on OpenFabrics
563 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
564 managers on most distributions, this PMD requires Ethernet extensions that
565 may not be supported at the moment (this is a work in progress).
568 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
569 includes the necessary support and should be used in the meantime. For DPDK,
570 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
571 required from that distribution.
575 Several versions of Mellanox OFED are available. Installing the version
576 this DPDK release was developed and tested against is strongly
577 recommended. Please check the `prerequisites`_.
582 Minimal version for libmnl is **1.0.3**.
584 As a dependency of the **iproute2** suite, this library is often installed
585 by default. It is otherwise readily available through standard system
588 Its development headers must be installed in order to compile this PMD.
589 These packages are usually named **libmnl-dev** or **libmnl-devel**
590 depending on the Linux distribution.
595 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
596 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
597 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
598 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
599 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
600 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
601 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
602 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
603 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
604 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
605 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
606 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
607 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
608 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
609 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
610 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
611 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
612 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
613 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
615 Quick Start Guide on OFED
616 -------------------------
618 1. Download latest Mellanox OFED. For more info check the `prerequisites`_.
621 2. Install the required libraries and kernel modules either by installing
622 only the required set, or by installing the entire Mellanox OFED:
624 .. code-block:: console
626 ./mlnxofedinstall --upstream-libs --dpdk
628 3. Verify the firmware is the correct one:
630 .. code-block:: console
634 4. Verify all ports links are set to Ethernet:
636 .. code-block:: console
638 mlxconfig -d <mst device> query | grep LINK_TYPE
642 Link types may have to be configured to Ethernet:
644 .. code-block:: console
646 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
648 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
650 For hypervisors verify SR-IOV is enabled on the NIC:
652 .. code-block:: console
654 mlxconfig -d <mst device> query | grep SRIOV_EN
657 If needed, set enable the set the relevant fields:
659 .. code-block:: console
661 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
662 mlxfwreset -d <mst device> reset
664 5. Restart the driver:
666 .. code-block:: console
668 /etc/init.d/openibd restart
672 .. code-block:: console
674 service openibd restart
676 If link type was changed, firmware must be reset as well:
678 .. code-block:: console
680 mlxfwreset -d <mst device> reset
682 For hypervisors, after reset write the sysfs number of virtual functions
685 To dynamically instantiate a given number of virtual functions (VFs):
687 .. code-block:: console
689 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
691 6. Compile DPDK and you are ready to go. See instructions on
692 :ref:`Development Kit Build System <Development_Kit_Build_System>`
697 1. Configure aggressive CQE Zipping for maximum performance:
699 .. code-block:: console
701 mlxconfig -d <mst device> s CQE_COMPRESSION=1
703 To set it back to the default CQE Zipping mode use:
705 .. code-block:: console
707 mlxconfig -d <mst device> s CQE_COMPRESSION=0
709 2. In case of virtualization:
711 - Make sure that hypervisor kernel is 3.16 or newer.
712 - Configure boot with ``iommu=pt``.
714 - Make sure to allocate a VM on huge pages.
715 - Make sure to set CPU pinning.
717 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
718 for better performance. For VMs, verify that the right CPU
719 and NUMA node are pinned according to the above. Run:
721 .. code-block:: console
725 to identify the NUMA node to which the PCIe adapter is connected.
727 4. If more than one adapter is used, and root complex capabilities allow
728 to put both adapters on the same NUMA node without PCI bandwidth degradation,
729 it is recommended to locate both adapters on the same NUMA node.
730 This in order to forward packets from one to the other without
731 NUMA performance penalty.
733 5. Disable pause frames:
735 .. code-block:: console
737 ethtool -A <netdev> rx off tx off
739 6. Verify IO non-posted prefetch is disabled by default. This can be checked
740 via the BIOS configuration. Please contact you server provider for more
741 information about the settings.
745 On some machines, depends on the machine integrator, it is beneficial
746 to set the PCI max read request parameter to 1K. This can be
747 done in the following way:
749 To query the read request size use:
751 .. code-block:: console
753 setpci -s <NIC PCI address> 68.w
755 If the output is different than 3XXX, set it by:
757 .. code-block:: console
759 setpci -s <NIC PCI address> 68.w=3XXX
761 The XXX can be different on different systems. Make sure to configure
762 according to the setpci output.
764 7. To minimize overhead of searching Memory Regions:
766 - '--socket-mem' is recommended to pin memory by predictable amount.
767 - Configure per-lcore cache when creating Mempools for packet buffer.
768 - Refrain from dynamically allocating/freeing memory in run-time.
773 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
774 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
776 Since ``testpmd`` defaults to IP RSS mode and there is currently no
777 command-line parameter to enable additional protocols (UDP and TCP as well
778 as IP), the following commands must be entered from its CLI to get the same
779 behavior as librte_pmd_mlx4:
781 .. code-block:: console
784 > port config all rss all
790 This section demonstrates how to launch **testpmd** with Mellanox
791 ConnectX-4/ConnectX-5/Bluefield devices managed by librte_pmd_mlx5.
793 #. Load the kernel modules:
795 .. code-block:: console
797 modprobe -a ib_uverbs mlx5_core mlx5_ib
799 Alternatively if MLNX_OFED is fully installed, the following script can
802 .. code-block:: console
804 /etc/init.d/openibd restart
808 User space I/O kernel modules (uio and igb_uio) are not used and do
809 not have to be loaded.
811 #. Make sure Ethernet interfaces are in working order and linked to kernel
812 verbs. Related sysfs entries should be present:
814 .. code-block:: console
816 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
820 .. code-block:: console
827 #. Optionally, retrieve their PCI bus addresses for whitelisting:
829 .. code-block:: console
832 for intf in eth2 eth3 eth4 eth5;
834 (cd "/sys/class/net/${intf}/device/" && pwd -P);
837 sed -n 's,.*/\(.*\),-w \1,p'
841 .. code-block:: console
848 #. Request huge pages:
850 .. code-block:: console
852 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
854 #. Start testpmd with basic parameters:
856 .. code-block:: console
858 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
862 .. code-block:: console
865 EAL: PCI device 0000:05:00.0 on NUMA socket 0
866 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
867 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
868 PMD: librte_pmd_mlx5: 1 port(s) detected
869 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
870 EAL: PCI device 0000:05:00.1 on NUMA socket 0
871 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
872 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
873 PMD: librte_pmd_mlx5: 1 port(s) detected
874 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
875 EAL: PCI device 0000:06:00.0 on NUMA socket 0
876 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
877 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
878 PMD: librte_pmd_mlx5: 1 port(s) detected
879 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
880 EAL: PCI device 0000:06:00.1 on NUMA socket 0
881 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
882 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
883 PMD: librte_pmd_mlx5: 1 port(s) detected
884 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
885 Interactive-mode selected
886 Configuring Port 0 (socket 0)
887 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
888 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
889 Port 0: E4:1D:2D:E7:0C:FE
890 Configuring Port 1 (socket 0)
891 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
892 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
893 Port 1: E4:1D:2D:E7:0C:FF
894 Configuring Port 2 (socket 0)
895 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
896 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
897 Port 2: E4:1D:2D:E7:0C:FA
898 Configuring Port 3 (socket 0)
899 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
900 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
901 Port 3: E4:1D:2D:E7:0C:FB
902 Checking link statuses...
903 Port 0 Link Up - speed 40000 Mbps - full-duplex
904 Port 1 Link Up - speed 40000 Mbps - full-duplex
905 Port 2 Link Up - speed 10000 Mbps - full-duplex
906 Port 3 Link Up - speed 10000 Mbps - full-duplex