1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox Technologies, Ltd
8 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
9 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** and **Mellanox
10 ConnectX-5** families of 10/25/40/50/100 Gb/s adapters as well as their
11 virtual functions (VF) in SR-IOV context.
13 Information and documentation about these adapters can be found on the
14 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
15 `Mellanox community <http://community.mellanox.com/welcome>`__.
17 There is also a `section dedicated to this poll mode driver
18 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
22 Due to external dependencies, this driver is disabled by default. It must
23 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
26 Implementation details
27 ----------------------
29 Besides its dependency on libibverbs (that implies libmlx5 and associated
30 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
31 operations such as querying/updating the MTU and flow control parameters.
33 For security reasons and robustness, this driver only deals with virtual
34 memory addresses. The way resources allocations are handled by the kernel
35 combined with hardware specifications that allow it to handle virtual memory
36 addresses directly ensure that DPDK applications cannot access random
37 physical memory (or memory that does not belong to the current process).
39 This capability allows the PMD to coexist with kernel network interfaces
40 which remain functional, although they stop receiving unicast packets as
41 long as they share the same MAC address.
42 This means legacy linux control tools (for example: ethtool, ifconfig and
43 more) can operate on the same network interfaces that owned by the DPDK
46 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
52 - Multi arch support: x86_64, POWER8, ARMv8.
53 - Multiple TX and RX queues.
54 - Support for scattered TX and RX frames.
55 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
56 - Several RSS hash keys, one for each flow type.
57 - Configurable RETA table.
58 - Support for multiple MAC addresses.
62 - RX CRC stripping configuration.
64 - Multicast promiscuous mode.
65 - Hardware checksum offloads.
66 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
70 - KVM and VMware ESX SR-IOV modes are supported.
71 - RSS hash result is supported.
72 - Hardware TSO for generic IP or UDP tunnel, including VXLAN and GRE.
73 - Hardware checksum Tx offload for generic IP or UDP tunnel, including VXLAN and GRE.
75 - Statistics query including Basic, Extended and per queue.
77 - Tunnel types: VXLAN, L3 VXLAN, VXLAN-GPE, GRE.
78 - Tunnel HW offloads: packet type, inner/outer RSS, IP and UDP checksum verification.
83 - For secondary process:
85 - Forked secondary process not supported.
86 - All mempools must be initialized before rte_eth_dev_start().
88 - Flow pattern without any specific vlan will match for vlan packets as well:
90 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
91 Meaning, the flow rule::
93 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
95 Will only match vlan packets with vid=3. and the flow rules::
97 flow create 0 ingress pattern eth / ipv4 / end ...
101 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
103 Will match any ipv4 packet (VLAN included).
105 - A multi segment packet must have less than 6 segments in case the Tx burst function
106 is set to multi-packet send or Enhanced multi-packet send. Otherwise it must have
107 less than 50 segments.
108 - Count action for RTE flow is **only supported in Mellanox OFED**.
109 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
110 to 0 are not supported.
111 - VXLAN TSO and checksum offloads are not supported on VM.
112 - VF: flow rules created on VF devices can only match traffic targeted at the
113 configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).
117 MAC addresses not already present in the bridge table of the associated
118 kernel network device will be added and cleaned up by the PMD when closing
119 the device. In case of ungraceful program termination, some entries may
120 remain present and should be removed manually by other means.
125 MLX5 supports various of methods to report statistics:
127 Port statistics can be queried using ``rte_eth_stats_get()``. The port statistics are through SW only and counts the number of packets received or sent successfully by the PMD.
129 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
131 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
139 These options can be modified in the ``.config`` file.
141 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
143 Toggle compilation of librte_pmd_mlx5 itself.
145 - ``CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS`` (default **n**)
147 Build PMD with additional code to make it loadable without hard
148 dependencies on **libibverbs** nor **libmlx5**, which may not be installed
149 on the target system.
151 In this mode, their presence is still required for it to run properly,
152 however their absence won't prevent a DPDK application from starting (with
153 ``CONFIG_RTE_BUILD_SHARED_LIB`` disabled) and they won't show up as
154 missing with ``ldd(1)``.
156 It works by moving these dependencies to a purpose-built rdma-core "glue"
157 plug-in which must either be installed in a directory whose name is based
158 on ``CONFIG_RTE_EAL_PMD_PATH`` suffixed with ``-glue`` if set, or in a
159 standard location for the dynamic linker (e.g. ``/lib``) if left to the
160 default empty string (``""``).
162 This option has no performance impact.
164 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
166 Toggle debugging code and stricter compilation flags. Enabling this option
167 adds additional run-time checks and debugging messages at the cost of
170 Environment variables
171 ~~~~~~~~~~~~~~~~~~~~~
175 A list of directories in which to search for the rdma-core "glue" plug-in,
176 separated by colons or semi-colons.
178 Only matters when compiled with ``CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS``
179 enabled and most useful when ``CONFIG_RTE_EAL_PMD_PATH`` is also set,
180 since ``LD_LIBRARY_PATH`` has no effect in this case.
182 - ``MLX5_PMD_ENABLE_PADDING``
184 Enables HW packet padding in PCI bus transactions.
186 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
187 bytes are written to the PCI bus. Enabling padding makes such packets
190 In cases where PCI bandwidth is the bottleneck, padding can improve
193 This is disabled by default since this can also decrease performance for
194 unaligned packet sizes.
196 - ``MLX5_SHUT_UP_BF``
198 Configures HW Tx doorbell register as IO-mapped.
200 By default, the HW Tx doorbell is configured as a write-combining register.
201 The register would be flushed to HW usually when the write-combining buffer
202 becomes full, but it depends on CPU design.
204 Except for vectorized Tx burst routines, a write memory barrier is enforced
205 after updating the register so that the update can be immediately visible to
208 When vectorized Tx burst is called, the barrier is set only if the burst size
209 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
210 variable will bring better latency even though the maximum throughput can
213 Run-time configuration
214 ~~~~~~~~~~~~~~~~~~~~~~
216 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
217 because it is affected by their state. Forcing them down prevents packets
220 - **ethtool** operations on related kernel interfaces also affect the PMD.
222 - ``rxq_cqe_comp_en`` parameter [int]
224 A nonzero value enables the compression of CQE on RX side. This feature
225 allows to save PCI bandwidth and improve performance. Enabled by default.
229 - x86_64 with ConnectX-4, ConnectX-4 LX and ConnectX-5.
230 - POWER8 and ARMv8 with ConnectX-4 LX and ConnectX-5.
232 - ``txq_inline`` parameter [int]
234 Amount of data to be inlined during TX operations. Improves latency.
235 Can improve PPS performance when PCI back pressure is detected and may be
236 useful for scenarios involving heavy traffic on many queues.
238 Because additional software logic is necessary to handle this mode, this
239 option should be used with care, as it can lower performance when back
240 pressure is not expected.
242 - ``txqs_min_inline`` parameter [int]
244 Enable inline send only when the number of TX queues is greater or equal
247 This option should be used in combination with ``txq_inline`` above.
249 On ConnectX-4, ConnectX-4 LX and ConnectX-5 without Enhanced MPW:
251 - Disabled by default.
252 - In case ``txq_inline`` is set recommendation is 4.
254 On ConnectX-5 with Enhanced MPW:
256 - Set to 8 by default.
258 - ``txq_mpw_en`` parameter [int]
260 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
261 enhanced multi-packet send (Enhanced MPS) for ConnectX-5. MPS allows the
262 TX burst function to pack up multiple packets in a single descriptor
263 session in order to save PCI bandwidth and improve performance at the
264 cost of a slightly higher CPU usage. When ``txq_inline`` is set along
265 with ``txq_mpw_en``, TX burst function tries to copy entire packet data
266 on to TX descriptor instead of including pointer of packet only if there
267 is enough room remained in the descriptor. ``txq_inline`` sets
268 per-descriptor space for either pointers or inlined packets. In addition,
269 Enhanced MPS supports hybrid mode - mixing inlined packets and pointers
270 in the same descriptor.
272 This option cannot be used with certain offloads such as ``DEV_TX_OFFLOAD_TCP_TSO,
273 DEV_TX_OFFLOAD_VXLAN_TNL_TSO, DEV_TX_OFFLOAD_GRE_TNL_TSO, DEV_TX_OFFLOAD_VLAN_INSERT``.
274 When those offloads are requested the MPS send function will not be used.
276 It is currently only supported on the ConnectX-4 Lx and ConnectX-5
277 families of adapters. Enabled by default.
279 - ``txq_mpw_hdr_dseg_en`` parameter [int]
281 A nonzero value enables including two pointers in the first block of TX
282 descriptor. This can be used to lessen CPU load for memory copy.
284 Effective only when Enhanced MPS is supported. Disabled by default.
286 - ``txq_max_inline_len`` parameter [int]
288 Maximum size of packet to be inlined. This limits the size of packet to
289 be inlined. If the size of a packet is larger than configured value, the
290 packet isn't inlined even though there's enough space remained in the
291 descriptor. Instead, the packet is included with pointer.
293 Effective only when Enhanced MPS is supported. The default value is 256.
295 - ``tx_vec_en`` parameter [int]
297 A nonzero value enables Tx vector on ConnectX-5 only NIC if the number of
298 global Tx queues on the port is lesser than MLX5_VPMD_MIN_TXQS.
300 This option cannot be used with certain offloads such as ``DEV_TX_OFFLOAD_TCP_TSO,
301 DEV_TX_OFFLOAD_VXLAN_TNL_TSO, DEV_TX_OFFLOAD_GRE_TNL_TSO, DEV_TX_OFFLOAD_VLAN_INSERT``.
302 When those offloads are requested the MPS send function will not be used.
304 Enabled by default on ConnectX-5.
306 - ``rx_vec_en`` parameter [int]
308 A nonzero value enables Rx vector if the port is not configured in
309 multi-segment otherwise this parameter is ignored.
313 - ``vf_nl_en`` parameter [int]
315 A nonzero value enables Netlink requests from the VF to add/remove MAC
316 addresses or/and enable/disable promiscuous/all multicast on the Netdevice.
317 Otherwise the relevant configuration must be run with Linux iproute2 tools.
318 This is a prerequisite to receive this kind of traffic.
320 Enabled by default, valid only on VF devices ignored otherwise.
322 - ``l3_vxlan_en`` parameter [int]
324 A nonzero value allows L3 VXLAN and VXLAN-GPE flow creation. To enable
325 L3 VXLAN or VXLAN-GPE, users has to configure firmware and enable this
326 parameter. This is a prerequisite to receive this kind of traffic.
330 Firmware configuration
331 ~~~~~~~~~~~~~~~~~~~~~~
333 - L3 VXLAN and VXLAN-GPE destination UDP port
335 .. code-block:: console
337 mlxconfig -d <mst device> set IP_OVER_VXLAN_EN=1
338 mlxconfig -d <mst device> set IP_OVER_VXLAN_PORT=<udp dport>
340 Verify configurations are set:
342 .. code-block:: console
344 mlxconfig -d <mst device> query | grep IP_OVER_VXLAN
345 IP_OVER_VXLAN_EN True(1)
346 IP_OVER_VXLAN_PORT <udp dport>
351 This driver relies on external libraries and kernel drivers for resources
352 allocations and initialization. The following dependencies are not part of
353 DPDK and must be installed separately:
357 User space Verbs framework used by librte_pmd_mlx5. This library provides
358 a generic interface between the kernel and low-level user space drivers
361 It allows slow and privileged operations (context initialization, hardware
362 resources allocations) to be managed by the kernel and fast operations to
363 never leave user space.
367 Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5
368 devices, it is automatically loaded by libibverbs.
370 This library basically implements send/receive calls to the hardware
375 They provide the kernel-side Verbs API and low level device drivers that
376 manage actual hardware initialization and resources sharing with user
379 Unlike most other PMDs, these modules must remain loaded and bound to
382 - mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5
383 devices and related Ethernet kernel network devices.
384 - mlx5_ib: InifiniBand device driver.
385 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
387 - **Firmware update**
389 Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5
392 Because each release provides new features, these updates must be applied to
393 match the kernel modules and libraries they come with.
397 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
403 Either RDMA Core library with a recent enough Linux kernel release
404 (recommended) or Mellanox OFED, which provides compatibility with older
407 RMDA Core with Linux Kernel
408 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
410 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
411 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
412 (see `RDMA Core installation documentation`_)
414 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
415 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
420 - Mellanox OFED version: **4.2, 4.3**.
423 - ConnectX-4: **12.21.1000** and above.
424 - ConnectX-4 Lx: **14.21.1000** and above.
425 - ConnectX-5: **16.21.1000** and above.
426 - ConnectX-5 Ex: **16.21.1000** and above.
428 While these libraries and kernel modules are available on OpenFabrics
429 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
430 managers on most distributions, this PMD requires Ethernet extensions that
431 may not be supported at the moment (this is a work in progress).
434 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
435 includes the necessary support and should be used in the meantime. For DPDK,
436 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
437 required from that distribution.
441 Several versions of Mellanox OFED are available. Installing the version
442 this DPDK release was developed and tested against is strongly
443 recommended. Please check the `prerequisites`_.
448 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
449 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
450 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
451 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
452 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
453 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
454 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
455 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
456 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
457 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
458 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
459 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
460 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
461 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
462 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
463 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
464 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
465 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
466 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
468 Quick Start Guide on OFED
469 -------------------------
471 1. Download latest Mellanox OFED. For more info check the `prerequisites`_.
474 2. Install the required libraries and kernel modules either by installing
475 only the required set, or by installing the entire Mellanox OFED:
477 .. code-block:: console
479 ./mlnxofedinstall --upstream-libs --dpdk
481 3. Verify the firmware is the correct one:
483 .. code-block:: console
487 4. Verify all ports links are set to Ethernet:
489 .. code-block:: console
491 mlxconfig -d <mst device> query | grep LINK_TYPE
495 Link types may have to be configured to Ethernet:
497 .. code-block:: console
499 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
501 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
503 For hypervisors verify SR-IOV is enabled on the NIC:
505 .. code-block:: console
507 mlxconfig -d <mst device> query | grep SRIOV_EN
510 If needed, set enable the set the relevant fields:
512 .. code-block:: console
514 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
515 mlxfwreset -d <mst device> reset
517 5. Restart the driver:
519 .. code-block:: console
521 /etc/init.d/openibd restart
525 .. code-block:: console
527 service openibd restart
529 If link type was changed, firmware must be reset as well:
531 .. code-block:: console
533 mlxfwreset -d <mst device> reset
535 For hypervisors, after reset write the sysfs number of virtual functions
538 To dynamically instantiate a given number of virtual functions (VFs):
540 .. code-block:: console
542 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
544 6. Compile DPDK and you are ready to go. See instructions on
545 :ref:`Development Kit Build System <Development_Kit_Build_System>`
550 1. Configure aggressive CQE Zipping for maximum performance:
552 .. code-block:: console
554 mlxconfig -d <mst device> s CQE_COMPRESSION=1
556 To set it back to the default CQE Zipping mode use:
558 .. code-block:: console
560 mlxconfig -d <mst device> s CQE_COMPRESSION=0
562 2. In case of virtualization:
564 - Make sure that hypervisor kernel is 3.16 or newer.
565 - Configure boot with ``iommu=pt``.
567 - Make sure to allocate a VM on huge pages.
568 - Make sure to set CPU pinning.
570 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
571 for better performance. For VMs, verify that the right CPU
572 and NUMA node are pinned according to the above. Run:
574 .. code-block:: console
578 to identify the NUMA node to which the PCIe adapter is connected.
580 4. If more than one adapter is used, and root complex capabilities allow
581 to put both adapters on the same NUMA node without PCI bandwidth degradation,
582 it is recommended to locate both adapters on the same NUMA node.
583 This in order to forward packets from one to the other without
584 NUMA performance penalty.
586 5. Disable pause frames:
588 .. code-block:: console
590 ethtool -A <netdev> rx off tx off
592 6. Verify IO non-posted prefetch is disabled by default. This can be checked
593 via the BIOS configuration. Please contact you server provider for more
594 information about the settings.
598 On some machines, depends on the machine integrator, it is beneficial
599 to set the PCI max read request parameter to 1K. This can be
600 done in the following way:
602 To query the read request size use:
604 .. code-block:: console
606 setpci -s <NIC PCI address> 68.w
608 If the output is different than 3XXX, set it by:
610 .. code-block:: console
612 setpci -s <NIC PCI address> 68.w=3XXX
614 The XXX can be different on different systems. Make sure to configure
615 according to the setpci output.
617 7. To minimize overhead of searching Memory Regions:
619 - '--socket-mem' is recommended to pin memory by predictable amount.
620 - Configure per-lcore cache when creating Mempools for packet buffer.
621 - Refrain from dynamically allocating/freeing memory in run-time.
626 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
627 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
629 Since ``testpmd`` defaults to IP RSS mode and there is currently no
630 command-line parameter to enable additional protocols (UDP and TCP as well
631 as IP), the following commands must be entered from its CLI to get the same
632 behavior as librte_pmd_mlx4:
634 .. code-block:: console
637 > port config all rss all
643 This section demonstrates how to launch **testpmd** with Mellanox
644 ConnectX-4/ConnectX-5 devices managed by librte_pmd_mlx5.
646 #. Load the kernel modules:
648 .. code-block:: console
650 modprobe -a ib_uverbs mlx5_core mlx5_ib
652 Alternatively if MLNX_OFED is fully installed, the following script can
655 .. code-block:: console
657 /etc/init.d/openibd restart
661 User space I/O kernel modules (uio and igb_uio) are not used and do
662 not have to be loaded.
664 #. Make sure Ethernet interfaces are in working order and linked to kernel
665 verbs. Related sysfs entries should be present:
667 .. code-block:: console
669 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
673 .. code-block:: console
680 #. Optionally, retrieve their PCI bus addresses for whitelisting:
682 .. code-block:: console
685 for intf in eth2 eth3 eth4 eth5;
687 (cd "/sys/class/net/${intf}/device/" && pwd -P);
690 sed -n 's,.*/\(.*\),-w \1,p'
694 .. code-block:: console
701 #. Request huge pages:
703 .. code-block:: console
705 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
707 #. Start testpmd with basic parameters:
709 .. code-block:: console
711 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
715 .. code-block:: console
718 EAL: PCI device 0000:05:00.0 on NUMA socket 0
719 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
720 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
721 PMD: librte_pmd_mlx5: 1 port(s) detected
722 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
723 EAL: PCI device 0000:05:00.1 on NUMA socket 0
724 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
725 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
726 PMD: librte_pmd_mlx5: 1 port(s) detected
727 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
728 EAL: PCI device 0000:06:00.0 on NUMA socket 0
729 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
730 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
731 PMD: librte_pmd_mlx5: 1 port(s) detected
732 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
733 EAL: PCI device 0000:06:00.1 on NUMA socket 0
734 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
735 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
736 PMD: librte_pmd_mlx5: 1 port(s) detected
737 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
738 Interactive-mode selected
739 Configuring Port 0 (socket 0)
740 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
741 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
742 Port 0: E4:1D:2D:E7:0C:FE
743 Configuring Port 1 (socket 0)
744 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
745 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
746 Port 1: E4:1D:2D:E7:0C:FF
747 Configuring Port 2 (socket 0)
748 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
749 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
750 Port 2: E4:1D:2D:E7:0C:FA
751 Configuring Port 3 (socket 0)
752 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
753 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
754 Port 3: E4:1D:2D:E7:0C:FB
755 Checking link statuses...
756 Port 0 Link Up - speed 40000 Mbps - full-duplex
757 Port 1 Link Up - speed 40000 Mbps - full-duplex
758 Port 2 Link Up - speed 10000 Mbps - full-duplex
759 Port 3 Link Up - speed 10000 Mbps - full-duplex