1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox Technologies, Ltd
5 .. include:: <isonum.txt>
10 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
11 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** , **Mellanox
12 ConnectX-5**, **Mellanox ConnectX-6**, **Mellanox ConnectX-6 Dx** and
13 **Mellanox BlueField** families of 10/25/40/50/100/200 Gb/s adapters
14 as well as their virtual functions (VF) in SR-IOV context.
16 Information and documentation about these adapters can be found on the
17 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
18 `Mellanox community <http://community.mellanox.com/welcome>`__.
20 There is also a `section dedicated to this poll mode driver
21 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
25 Due to external dependencies, this driver is disabled in default configuration
26 of the "make" build. It can be enabled with ``CONFIG_RTE_LIBRTE_MLX5_PMD=y``
27 or by using "meson" build system which will detect dependencies.
32 Besides its dependency on libibverbs (that implies libmlx5 and associated
33 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
34 operations such as querying/updating the MTU and flow control parameters.
36 For security reasons and robustness, this driver only deals with virtual
37 memory addresses. The way resources allocations are handled by the kernel,
38 combined with hardware specifications that allow to handle virtual memory
39 addresses directly, ensure that DPDK applications cannot access random
40 physical memory (or memory that does not belong to the current process).
42 This capability allows the PMD to coexist with kernel network interfaces
43 which remain functional, although they stop receiving unicast packets as
44 long as they share the same MAC address.
45 This means legacy linux control tools (for example: ethtool, ifconfig and
46 more) can operate on the same network interfaces that owned by the DPDK
49 The PMD can use libibverbs and libmlx5 to access the device firmware
50 or directly the hardware components.
51 There are different levels of objects and bypassing abilities
52 to get the best performances:
54 - Verbs is a complete high-level generic API
55 - Direct Verbs is a device-specific API
56 - DevX allows to access firmware objects
57 - Direct Rules manages flow steering at low-level hardware layer
59 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
65 - Multi arch support: x86_64, POWER8, ARMv8, i686.
66 - Multiple TX and RX queues.
67 - Support for scattered TX and RX frames.
68 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
69 - RSS using different combinations of fields: L3 only, L4 only or both,
70 and source only, destination only or both.
71 - Several RSS hash keys, one for each flow type.
72 - Default RSS operation with no hash key specification.
73 - Configurable RETA table.
74 - Link flow control (pause frame).
75 - Support for multiple MAC addresses.
79 - RX CRC stripping configuration.
80 - Promiscuous mode on PF and VF.
81 - Multicast promiscuous mode on PF and VF.
82 - Hardware checksum offloads.
83 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
85 - Flow API, including :ref:`flow_isolated_mode`.
87 - KVM and VMware ESX SR-IOV modes are supported.
88 - RSS hash result is supported.
89 - Hardware TSO for generic IP or UDP tunnel, including VXLAN and GRE.
90 - Hardware checksum Tx offload for generic IP or UDP tunnel, including VXLAN and GRE.
92 - Statistics query including Basic, Extended and per queue.
94 - Tunnel types: VXLAN, L3 VXLAN, VXLAN-GPE, GRE, MPLSoGRE, MPLSoUDP, IP-in-IP, Geneve, GTP.
95 - Tunnel HW offloads: packet type, inner/outer RSS, IP and UDP checksum verification.
96 - NIC HW offloads: encapsulation (vxlan, gre, mplsoudp, mplsogre), NAT, routing, TTL
97 increment/decrement, count, drop, mark. For details please see :ref:`mlx5_offloads_support`.
98 - Flow insertion rate of more then million flows per second, when using Direct Rules.
99 - Support for multiple rte_flow groups.
100 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
107 - For secondary process:
109 - Forked secondary process not supported.
110 - External memory unregistered in EAL memseg list cannot be used for DMA
111 unless such memory has been registered by ``mlx5_mr_update_ext_mp()`` in
112 primary process and remapped to the same virtual address in secondary
113 process. If the external memory is registered by primary process but has
114 different virtual address in secondary process, unexpected error may happen.
116 - When using Verbs flow engine (``dv_flow_en`` = 0), flow pattern without any
117 specific VLAN will match for VLAN packets as well:
119 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
120 Meaning, the flow rule::
122 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
124 Will only match vlan packets with vid=3. and the flow rule::
126 flow create 0 ingress pattern eth / ipv4 / end ...
128 Will match any ipv4 packet (VLAN included).
130 - VLAN pop offload command:
132 - Flow rules having a VLAN pop offload command as one of their actions and
133 are lacking a match on VLAN as one of their items are not supported.
134 - The command is not supported on egress traffic.
136 - VLAN push offload is not supported on ingress traffic.
138 - VLAN set PCP offload is not supported on existing headers.
140 - A multi segment packet must have not more segments than reported by dev_infos_get()
141 in tx_desc_lim.nb_seg_max field. This value depends on maximal supported Tx descriptor
142 size and ``txq_inline_min`` settings and may be from 2 (worst case forced by maximal
143 inline settings) to 58.
145 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
146 to 0 are not supported.
148 - VXLAN TSO and checksum offloads are not supported on VM.
150 - L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with MPLSoGRE and MPLSoUDP.
152 - Match on Geneve header supports the following fields only:
158 Currently, the only supported options length value is 0.
160 - VF: flow rules created on VF devices can only match traffic targeted at the
161 configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).
163 - Match on GTP tunnel header item supports the following fields only:
168 - No Tx metadata go to the E-Switch steering domain for the Flow group 0.
169 The flows within group 0 and set metadata action are rejected by hardware.
173 MAC addresses not already present in the bridge table of the associated
174 kernel network device will be added and cleaned up by the PMD when closing
175 the device. In case of ungraceful program termination, some entries may
176 remain present and should be removed manually by other means.
178 - When Multi-Packet Rx queue is configured (``mprq_en``), a Rx packet can be
179 externally attached to a user-provided mbuf with having EXT_ATTACHED_MBUF in
180 ol_flags. As the mempool for the external buffer is managed by PMD, all the
181 Rx mbufs must be freed before the device is closed. Otherwise, the mempool of
182 the external buffers will be freed by PMD and the application which still
183 holds the external buffers may be corrupted.
185 - If Multi-Packet Rx queue is configured (``mprq_en``) and Rx CQE compression is
186 enabled (``rxq_cqe_comp_en``) at the same time, RSS hash result is not fully
187 supported. Some Rx packets may not have PKT_RX_RSS_HASH.
189 - IPv6 Multicast messages are not supported on VM, while promiscuous mode
190 and allmulticast mode are both set to off.
191 To receive IPv6 Multicast messages on VM, explicitly set the relevant
192 MAC address using rte_eth_dev_mac_addr_add() API.
194 - To support a mixed traffic pattern (some buffers from local host memory, some
195 buffers from other devices) with high bandwidth, a mbuf flag is used.
197 An application hints the PMD whether or not it should try to inline the
198 given mbuf data buffer. PMD should do the best effort to act upon this request.
200 The hint flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE`` is dynamic,
201 registered by application with rte_mbuf_dynflag_register(). This flag is
202 purely driver-specific and declared in PMD specific header ``rte_pmd_mlx5.h``,
203 which is intended to be used by the application.
205 To query the supported specific flags in runtime,
206 the function ``rte_pmd_mlx5_get_dyn_flag_names`` returns the array of
207 currently (over present hardware and configuration) supported specific flags.
208 The "not inline hint" feature operating flow is the following one:
211 - probe the devices, ports are created
212 - query the port capabilities
213 - if port supporting the feature is found
214 - register dynamic flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE``
215 - application starts the ports
216 - on ``dev_start()`` PMD checks whether the feature flag is registered and
217 enables the feature support in datapath
218 - application might set the registered flag bit in ``ol_flags`` field
219 of mbuf being sent and PMD will handle ones appropriately.
221 - The amount of descriptors in Tx queue may be limited by data inline settings.
222 Inline data require the more descriptor building blocks and overall block
223 amount may exceed the hardware supported limits. The application should
224 reduce the requested Tx size or adjust data inline settings with
225 ``txq_inline_max`` and ``txq_inline_mpw`` devargs keys.
227 - E-Switch decapsulation Flow:
229 - can be applied to PF port only.
230 - must specify VF port action (packet redirection from PF to VF).
231 - optionally may specify tunnel inner source and destination MAC addresses.
233 - E-Switch encapsulation Flow:
235 - can be applied to VF ports only.
236 - must specify PF port action (packet redirection from VF to PF).
240 - The input buffer, used as outer header, is not validated.
244 - The decapsulation is always done up to the outermost tunnel detected by the HW.
245 - The input buffer, providing the removal size, is not validated.
246 - The buffer size must match the length of the headers to be removed.
248 - ICMP/ICMP6 code/type matching, IP-in-IP and MPLS flow matching are all
249 mutually exclusive features which cannot be supported together
250 (see :ref:`mlx5_firmware_config`).
254 - Requires DevX and DV flow to be enabled.
255 - KEEP_CRC offload cannot be supported with LRO.
256 - The first mbuf length, without head-room, must be big enough to include the
258 - Rx queue with LRO offload enabled, receiving a non-LRO packet, can forward
259 it with size limited to max LRO size, not to max RX packet length.
264 MLX5 supports various methods to report statistics:
266 Port statistics can be queried using ``rte_eth_stats_get()``. The received and sent statistics are through SW only and counts the number of packets received or sent successfully by the PMD. The imissed counter is the amount of packets that could not be delivered to SW because a queue was full. Packets not received due to congestion in the bus or on the NIC can be queried via the rx_discards_phy xstats counter.
268 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
270 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
278 These options can be modified in the ``.config`` file.
280 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
282 Toggle compilation of librte_pmd_mlx5 itself.
284 - ``CONFIG_RTE_IBVERBS_LINK_DLOPEN`` (default **n**)
286 Build PMD with additional code to make it loadable without hard
287 dependencies on **libibverbs** nor **libmlx5**, which may not be installed
288 on the target system.
290 In this mode, their presence is still required for it to run properly,
291 however their absence won't prevent a DPDK application from starting (with
292 ``CONFIG_RTE_BUILD_SHARED_LIB`` disabled) and they won't show up as
293 missing with ``ldd(1)``.
295 It works by moving these dependencies to a purpose-built rdma-core "glue"
296 plug-in which must either be installed in a directory whose name is based
297 on ``CONFIG_RTE_EAL_PMD_PATH`` suffixed with ``-glue`` if set, or in a
298 standard location for the dynamic linker (e.g. ``/lib``) if left to the
299 default empty string (``""``).
301 This option has no performance impact.
303 - ``CONFIG_RTE_IBVERBS_LINK_STATIC`` (default **n**)
305 Embed static flavor of the dependencies **libibverbs** and **libmlx5**
306 in the PMD shared library or the executable static binary.
308 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
310 Toggle debugging code and stricter compilation flags. Enabling this option
311 adds additional run-time checks and debugging messages at the cost of
316 For BlueField, target should be set to ``arm64-bluefield-linux-gcc``. This
317 will enable ``CONFIG_RTE_LIBRTE_MLX5_PMD`` and set ``RTE_CACHE_LINE_SIZE`` to
318 64. Default armv8a configuration of make build and meson build set it to 128
319 then brings performance degradation.
321 This option is available in meson:
323 - ``ibverbs_link`` can be ``static``, ``shared``, or ``dlopen``.
325 Environment variables
326 ~~~~~~~~~~~~~~~~~~~~~
330 A list of directories in which to search for the rdma-core "glue" plug-in,
331 separated by colons or semi-colons.
333 Only matters when compiled with ``CONFIG_RTE_IBVERBS_LINK_DLOPEN``
334 enabled and most useful when ``CONFIG_RTE_EAL_PMD_PATH`` is also set,
335 since ``LD_LIBRARY_PATH`` has no effect in this case.
337 - ``MLX5_SHUT_UP_BF``
339 Configures HW Tx doorbell register as IO-mapped.
341 By default, the HW Tx doorbell is configured as a write-combining register.
342 The register would be flushed to HW usually when the write-combining buffer
343 becomes full, but it depends on CPU design.
345 Except for vectorized Tx burst routines, a write memory barrier is enforced
346 after updating the register so that the update can be immediately visible to
349 When vectorized Tx burst is called, the barrier is set only if the burst size
350 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
351 variable will bring better latency even though the maximum throughput can
354 Run-time configuration
355 ~~~~~~~~~~~~~~~~~~~~~~
357 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
358 because it is affected by their state. Forcing them down prevents packets
361 - **ethtool** operations on related kernel interfaces also affect the PMD.
363 - ``rxq_cqe_comp_en`` parameter [int]
365 A nonzero value enables the compression of CQE on RX side. This feature
366 allows to save PCI bandwidth and improve performance. Enabled by default.
370 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx
372 - POWER9 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx
375 - ``rxq_cqe_pad_en`` parameter [int]
377 A nonzero value enables 128B padding of CQE on RX side. The size of CQE
378 is aligned with the size of a cacheline of the core. If cacheline size is
379 128B, the CQE size is configured to be 128B even though the device writes
380 only 64B data on the cacheline. This is to avoid unnecessary cache
381 invalidation by device's two consecutive writes on to one cacheline.
382 However in some architecture, it is more beneficial to update entire
383 cacheline with padding the rest 64B rather than striding because
384 read-modify-write could drop performance a lot. On the other hand,
385 writing extra data will consume more PCIe bandwidth and could also drop
386 the maximum throughput. It is recommended to empirically set this
387 parameter. Disabled by default.
391 - CPU having 128B cacheline with ConnectX-5 and BlueField.
393 - ``rxq_pkt_pad_en`` parameter [int]
395 A nonzero value enables padding Rx packet to the size of cacheline on PCI
396 transaction. This feature would waste PCI bandwidth but could improve
397 performance by avoiding partial cacheline write which may cause costly
398 read-modify-copy in memory transaction on some architectures. Disabled by
403 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx
405 - POWER8 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx
408 - ``mprq_en`` parameter [int]
410 A nonzero value enables configuring Multi-Packet Rx queues. Rx queue is
411 configured as Multi-Packet RQ if the total number of Rx queues is
412 ``rxqs_min_mprq`` or more. Disabled by default.
414 Multi-Packet Rx Queue (MPRQ a.k.a Striding RQ) can further save PCIe bandwidth
415 by posting a single large buffer for multiple packets. Instead of posting a
416 buffers per a packet, one large buffer is posted in order to receive multiple
417 packets on the buffer. A MPRQ buffer consists of multiple fixed-size strides
418 and each stride receives one packet. MPRQ can improve throughput for
419 small-packet traffic.
421 When MPRQ is enabled, max_rx_pkt_len can be larger than the size of
422 user-provided mbuf even if DEV_RX_OFFLOAD_SCATTER isn't enabled. PMD will
423 configure large stride size enough to accommodate max_rx_pkt_len as long as
424 device allows. Note that this can waste system memory compared to enabling Rx
425 scatter and multi-segment packet.
427 - ``mprq_log_stride_num`` parameter [int]
429 Log 2 of the number of strides for Multi-Packet Rx queue. Configuring more
430 strides can reduce PCIe traffic further. If configured value is not in the
431 range of device capability, the default value will be set with a warning
432 message. The default value is 4 which is 16 strides per a buffer, valid only
433 if ``mprq_en`` is set.
435 The size of Rx queue should be bigger than the number of strides.
437 - ``mprq_log_stride_size`` parameter [int]
439 Log 2 of the size of a stride for Multi-Packet Rx queue. Configuring a smaller
440 stride size can save some memory and reduce probability of a depletion of all
441 available strides due to unreleased packets by an application. If configured
442 value is not in the range of device capability, the default value will be set
443 with a warning message. The default value is 11 which is 2048 bytes per a
444 stride, valid only if ``mprq_en`` is set. With ``mprq_log_stride_size`` set
445 it is possible for a pcaket to span across multiple strides. This mode allows
446 support of jumbo frames (9K) with MPRQ. The memcopy of some packets (or part
447 of a packet if Rx scatter is configured) may be required in case there is no
448 space left for a head room at the end of a stride which incurs some
451 - ``mprq_max_memcpy_len`` parameter [int]
453 The maximum length of packet to memcpy in case of Multi-Packet Rx queue. Rx
454 packet is mem-copied to a user-provided mbuf if the size of Rx packet is less
455 than or equal to this parameter. Otherwise, PMD will attach the Rx packet to
456 the mbuf by external buffer attachment - ``rte_pktmbuf_attach_extbuf()``.
457 A mempool for external buffers will be allocated and managed by PMD. If Rx
458 packet is externally attached, ol_flags field of the mbuf will have
459 EXT_ATTACHED_MBUF and this flag must be preserved. ``RTE_MBUF_HAS_EXTBUF()``
460 checks the flag. The default value is 128, valid only if ``mprq_en`` is set.
462 - ``rxqs_min_mprq`` parameter [int]
464 Configure Rx queues as Multi-Packet RQ if the total number of Rx queues is
465 greater or equal to this value. The default value is 12, valid only if
468 - ``txq_inline`` parameter [int]
470 Amount of data to be inlined during TX operations. This parameter is
471 deprecated and converted to the new parameter ``txq_inline_max`` providing
472 partial compatibility.
474 - ``txqs_min_inline`` parameter [int]
476 Enable inline data send only when the number of TX queues is greater or equal
479 This option should be used in combination with ``txq_inline_max`` and
480 ``txq_inline_mpw`` below and does not affect ``txq_inline_min`` settings above.
482 If this option is not specified the default value 16 is used for BlueField
483 and 8 for other platforms
485 The data inlining consumes the CPU cycles, so this option is intended to
486 auto enable inline data if we have enough Tx queues, which means we have
487 enough CPU cores and PCI bandwidth is getting more critical and CPU
488 is not supposed to be bottleneck anymore.
490 The copying data into WQE improves latency and can improve PPS performance
491 when PCI back pressure is detected and may be useful for scenarios involving
492 heavy traffic on many queues.
494 Because additional software logic is necessary to handle this mode, this
495 option should be used with care, as it may lower performance when back
496 pressure is not expected.
498 If inline data are enabled it may affect the maximal size of Tx queue in
499 descriptors because the inline data increase the descriptor size and
500 queue size limits supported by hardware may be exceeded.
502 - ``txq_inline_min`` parameter [int]
504 Minimal amount of data to be inlined into WQE during Tx operations. NICs
505 may require this minimal data amount to operate correctly. The exact value
506 may depend on NIC operation mode, requested offloads, etc. It is strongly
507 recommended to omit this parameter and use the default values. Anyway,
508 applications using this parameter should take into consideration that
509 specifying an inconsistent value may prevent the NIC from sending packets.
511 If ``txq_inline_min`` key is present the specified value (may be aligned
512 by the driver in order not to exceed the limits and provide better descriptor
513 space utilization) will be used by the driver and it is guaranteed that
514 requested amount of data bytes are inlined into the WQE beside other inline
515 settings. This key also may update ``txq_inline_max`` value (default
516 or specified explicitly in devargs) to reserve the space for inline data.
518 If ``txq_inline_min`` key is not present, the value may be queried by the
519 driver from the NIC via DevX if this feature is available. If there is no DevX
520 enabled/supported the value 18 (supposing L2 header including VLAN) is set
521 for ConnectX-4 and ConnectX-4 Lx, and 0 is set by default for ConnectX-5
522 and newer NICs. If packet is shorter the ``txq_inline_min`` value, the entire
525 For ConnectX-4 NIC, driver does not allow specifying value below 18
526 (minimal L2 header, including VLAN), error will be raised.
528 For ConnectX-4 Lx NIC, it is allowed to specify values below 18, but
529 it is not recommended and may prevent NIC from sending packets over
532 Please, note, this minimal data inlining disengages eMPW feature (Enhanced
533 Multi-Packet Write), because last one does not support partial packet inlining.
534 This is not very critical due to minimal data inlining is mostly required
535 by ConnectX-4 and ConnectX-4 Lx, these NICs do not support eMPW feature.
537 - ``txq_inline_max`` parameter [int]
539 Specifies the maximal packet length to be completely inlined into WQE
540 Ethernet Segment for ordinary SEND method. If packet is larger than specified
541 value, the packet data won't be copied by the driver at all, data buffer
542 is addressed with a pointer. If packet length is less or equal all packet
543 data will be copied into WQE. This may improve PCI bandwidth utilization for
544 short packets significantly but requires the extra CPU cycles.
546 The data inline feature is controlled by number of Tx queues, if number of Tx
547 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
548 is engaged, if there are not enough Tx queues (which means not enough CPU cores
549 and CPU resources are scarce), data inline is not performed by the driver.
550 Assigning ``txqs_min_inline`` with zero always enables the data inline.
552 The default ``txq_inline_max`` value is 290. The specified value may be adjusted
553 by the driver in order not to exceed the limit (930 bytes) and to provide better
554 WQE space filling without gaps, the adjustment is reflected in the debug log.
555 Also, the default value (290) may be decreased in run-time if the large transmit
556 queue size is requested and hardware does not support enough descriptor
557 amount, in this case warning is emitted. If ``txq_inline_max`` key is
558 specified and requested inline settings can not be satisfied then error
561 - ``txq_inline_mpw`` parameter [int]
563 Specifies the maximal packet length to be completely inlined into WQE for
564 Enhanced MPW method. If packet is large the specified value, the packet data
565 won't be copied, and data buffer is addressed with pointer. If packet length
566 is less or equal, all packet data will be copied into WQE. This may improve PCI
567 bandwidth utilization for short packets significantly but requires the extra
570 The data inline feature is controlled by number of TX queues, if number of Tx
571 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
572 is engaged, if there are not enough Tx queues (which means not enough CPU cores
573 and CPU resources are scarce), data inline is not performed by the driver.
574 Assigning ``txqs_min_inline`` with zero always enables the data inline.
576 The default ``txq_inline_mpw`` value is 268. The specified value may be adjusted
577 by the driver in order not to exceed the limit (930 bytes) and to provide better
578 WQE space filling without gaps, the adjustment is reflected in the debug log.
579 Due to multiple packets may be included to the same WQE with Enhanced Multi
580 Packet Write Method and overall WQE size is limited it is not recommended to
581 specify large values for the ``txq_inline_mpw``. Also, the default value (268)
582 may be decreased in run-time if the large transmit queue size is requested
583 and hardware does not support enough descriptor amount, in this case warning
584 is emitted. If ``txq_inline_mpw`` key is specified and requested inline
585 settings can not be satisfied then error will be raised.
587 - ``txqs_max_vec`` parameter [int]
589 Enable vectorized Tx only when the number of TX queues is less than or
590 equal to this value. This parameter is deprecated and ignored, kept
591 for compatibility issue to not prevent driver from probing.
593 - ``txq_mpw_hdr_dseg_en`` parameter [int]
595 A nonzero value enables including two pointers in the first block of TX
596 descriptor. The parameter is deprecated and ignored, kept for compatibility
599 - ``txq_max_inline_len`` parameter [int]
601 Maximum size of packet to be inlined. This limits the size of packet to
602 be inlined. If the size of a packet is larger than configured value, the
603 packet isn't inlined even though there's enough space remained in the
604 descriptor. Instead, the packet is included with pointer. This parameter
605 is deprecated and converted directly to ``txq_inline_mpw`` providing full
606 compatibility. Valid only if eMPW feature is engaged.
608 - ``txq_mpw_en`` parameter [int]
610 A nonzero value enables Enhanced Multi-Packet Write (eMPW) for ConnectX-5,
611 ConnectX-6, ConnectX-6 Dx and BlueField. eMPW allows the TX burst function to pack
612 up multiple packets in a single descriptor session in order to save PCI bandwidth
613 and improve performance at the cost of a slightly higher CPU usage. When
614 ``txq_inline_mpw`` is set along with ``txq_mpw_en``, TX burst function copies
615 entire packet data on to TX descriptor instead of including pointer of packet.
617 The Enhanced Multi-Packet Write feature is enabled by default if NIC supports
618 it, can be disabled by explicit specifying 0 value for ``txq_mpw_en`` option.
619 Also, if minimal data inlining is requested by non-zero ``txq_inline_min``
620 option or reported by the NIC, the eMPW feature is disengaged.
622 - ``tx_db_nc`` parameter [int]
624 The rdma core library can map doorbell register in two ways, depending on the
625 environment variable "MLX5_SHUT_UP_BF":
627 - As regular cached memory (usually with write combining attribute), if the
628 variable is either missing or set to zero.
629 - As non-cached memory, if the variable is present and set to not "0" value.
631 The type of mapping may slightly affect the Tx performance, the optimal choice
632 is strongly relied on the host architecture and should be deduced practically.
634 If ``tx_db_nc`` is set to zero, the doorbell is forced to be mapped to regular
635 memory (with write combining), the PMD will perform the extra write memory barrier
636 after writing to doorbell, it might increase the needed CPU clocks per packet
637 to send, but latency might be improved.
639 If ``tx_db_nc`` is set to one, the doorbell is forced to be mapped to non
640 cached memory, the PMD will not perform the extra write memory barrier
641 after writing to doorbell, on some architectures it might improve the
644 If ``tx_db_nc`` is set to two, the doorbell is forced to be mapped to regular
645 memory, the PMD will use heuristics to decide whether write memory barrier
646 should be performed. For bursts with size multiple of recommended one (64 pkts)
647 it is supposed the next burst is coming and no need to issue the extra memory
648 barrier (it is supposed to be issued in the next coming burst, at least after
649 descriptor writing). It might increase latency (on some hosts till next
650 packets transmit) and should be used with care.
652 If ``tx_db_nc`` is omitted or set to zero, the preset (if any) environment
653 variable "MLX5_SHUT_UP_BF" value is used. If there is no "MLX5_SHUT_UP_BF",
654 the default ``tx_db_nc`` value is zero for ARM64 hosts and one for others.
656 - ``tx_vec_en`` parameter [int]
658 A nonzero value enables Tx vector on ConnectX-5, ConnectX-6, ConnectX-6 Dx
659 and BlueField NICs if the number of global Tx queues on the port is less than
660 ``txqs_max_vec``. The parameter is deprecated and ignored.
662 - ``rx_vec_en`` parameter [int]
664 A nonzero value enables Rx vector if the port is not configured in
665 multi-segment otherwise this parameter is ignored.
669 - ``vf_nl_en`` parameter [int]
671 A nonzero value enables Netlink requests from the VF to add/remove MAC
672 addresses or/and enable/disable promiscuous/all multicast on the Netdevice.
673 Otherwise the relevant configuration must be run with Linux iproute2 tools.
674 This is a prerequisite to receive this kind of traffic.
676 Enabled by default, valid only on VF devices ignored otherwise.
678 - ``l3_vxlan_en`` parameter [int]
680 A nonzero value allows L3 VXLAN and VXLAN-GPE flow creation. To enable
681 L3 VXLAN or VXLAN-GPE, users has to configure firmware and enable this
682 parameter. This is a prerequisite to receive this kind of traffic.
686 - ``dv_xmeta_en`` parameter [int]
688 A nonzero value enables extensive flow metadata support if device is
689 capable and driver supports it. This can enable extensive support of
690 ``MARK`` and ``META`` item of ``rte_flow``. The newly introduced
691 ``SET_TAG`` and ``SET_META`` actions do not depend on ``dv_xmeta_en``.
693 There are some possible configurations, depending on parameter value:
695 - 0, this is default value, defines the legacy mode, the ``MARK`` and
696 ``META`` related actions and items operate only within NIC Tx and
697 NIC Rx steering domains, no ``MARK`` and ``META`` information crosses
698 the domain boundaries. The ``MARK`` item is 24 bits wide, the ``META``
699 item is 32 bits wide and match supported on egress only.
701 - 1, this engages extensive metadata mode, the ``MARK`` and ``META``
702 related actions and items operate within all supported steering domains,
703 including FDB, ``MARK`` and ``META`` information may cross the domain
704 boundaries. The ``MARK`` item is 24 bits wide, the ``META`` item width
705 depends on kernel and firmware configurations and might be 0, 16 or
706 32 bits. Within NIC Tx domain ``META`` data width is 32 bits for
707 compatibility, the actual width of data transferred to the FDB domain
708 depends on kernel configuration and may be vary. The actual supported
709 width can be retrieved in runtime by series of rte_flow_validate()
712 - 2, this engages extensive metadata mode, the ``MARK`` and ``META``
713 related actions and items operate within all supported steering domains,
714 including FDB, ``MARK`` and ``META`` information may cross the domain
715 boundaries. The ``META`` item is 32 bits wide, the ``MARK`` item width
716 depends on kernel and firmware configurations and might be 0, 16 or
717 24 bits. The actual supported width can be retrieved in runtime by
718 series of rte_flow_validate() trials.
720 +------+-----------+-----------+-------------+-------------+
721 | Mode | ``MARK`` | ``META`` | ``META`` Tx | FDB/Through |
722 +======+===========+===========+=============+=============+
723 | 0 | 24 bits | 32 bits | 32 bits | no |
724 +------+-----------+-----------+-------------+-------------+
725 | 1 | 24 bits | vary 0-32 | 32 bits | yes |
726 +------+-----------+-----------+-------------+-------------+
727 | 2 | vary 0-32 | 32 bits | 32 bits | yes |
728 +------+-----------+-----------+-------------+-------------+
730 If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
731 ignored and the device is configured to operate in legacy mode (0).
733 Disabled by default (set to 0).
735 The Direct Verbs/Rules (engaged with ``dv_flow_en`` = 1) supports all
736 of the extensive metadata features. The legacy Verbs supports FLAG and
737 MARK metadata actions over NIC Rx steering domain only.
739 - ``dv_flow_en`` parameter [int]
741 A nonzero value enables the DV flow steering assuming it is supported
742 by the driver (RDMA Core library version is rdma-core-24.0 or higher).
744 Enabled by default if supported.
746 - ``dv_esw_en`` parameter [int]
748 A nonzero value enables E-Switch using Direct Rules.
750 Enabled by default if supported.
752 - ``mr_ext_memseg_en`` parameter [int]
754 A nonzero value enables extending memseg when registering DMA memory. If
755 enabled, the number of entries in MR (Memory Region) lookup table on datapath
756 is minimized and it benefits performance. On the other hand, it worsens memory
757 utilization because registered memory is pinned by kernel driver. Even if a
758 page in the extended chunk is freed, that doesn't become reusable until the
759 entire memory is freed.
763 - ``representor`` parameter [list]
765 This parameter can be used to instantiate DPDK Ethernet devices from
766 existing port (or VF) representors configured on the device.
768 It is a standard parameter whose format is described in
769 :ref:`ethernet_device_standard_device_arguments`.
771 For instance, to probe port representors 0 through 2::
775 - ``max_dump_files_num`` parameter [int]
777 The maximum number of files per PMD entity that may be created for debug information.
778 The files will be created in /var/log directory or in current directory.
780 set to 128 by default.
782 - ``lro_timeout_usec`` parameter [int]
784 The maximum allowed duration of an LRO session, in micro-seconds.
785 PMD will set the nearest value supported by HW, which is not bigger than
786 the input ``lro_timeout_usec`` value.
787 If this parameter is not specified, by default PMD will set
788 the smallest value supported by HW.
790 - ``hp_buf_log_sz`` parameter [int]
792 The total data buffer size of a hairpin queue (logarithmic form), in bytes.
793 PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
794 The capacity of the value is specified by the firmware and the initialization
795 will get a failure if it is out of scope.
796 The range of the value is from 11 to 19 right now, and the supported frame
797 size of a single packet for hairpin is from 512B to 128KB. It might change if
798 different firmware release is being used. By using a small value, it could
799 reduce memory consumption but not work with a large frame. If the value is
800 too large, the memory consumption will be high and some potential performance
801 degradation will be introduced.
802 By default, the PMD will set this value to 16, which means that 9KB jumbo
803 frames will be supported.
805 .. _mlx5_firmware_config:
807 Firmware configuration
808 ~~~~~~~~~~~~~~~~~~~~~~
810 Firmware features can be configured as key/value pairs.
812 The command to set a value is::
814 mlxconfig -d <device> set <key>=<value>
816 The command to query a value is::
818 mlxconfig -d <device> query | grep <key>
820 The device name for the command ``mlxconfig`` can be either the PCI address,
821 or the mst device name found with::
825 Below are some firmware configurations listed.
831 value: 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
837 - maximum number of SR-IOV virtual functions::
841 - enable DevX (required by Direct Rules and other features)::
845 - aggressive CQE zipping::
849 - L3 VXLAN and VXLAN-GPE destination UDP port::
852 IP_OVER_VXLAN_PORT=<udp dport>
854 - enable VXLAN-GPE tunnel flow matching::
856 FLEX_PARSER_PROFILE_ENABLE=0
858 FLEX_PARSER_PROFILE_ENABLE=2
860 - enable IP-in-IP tunnel flow matching::
862 FLEX_PARSER_PROFILE_ENABLE=0
864 - enable MPLS flow matching::
866 FLEX_PARSER_PROFILE_ENABLE=1
868 - enable ICMP/ICMP6 code/type fields matching::
870 FLEX_PARSER_PROFILE_ENABLE=2
872 - enable Geneve flow matching::
874 FLEX_PARSER_PROFILE_ENABLE=0
876 FLEX_PARSER_PROFILE_ENABLE=1
878 - enable GTP flow matching::
880 FLEX_PARSER_PROFILE_ENABLE=3
885 This driver relies on external libraries and kernel drivers for resources
886 allocations and initialization. The following dependencies are not part of
887 DPDK and must be installed separately:
891 User space Verbs framework used by librte_pmd_mlx5. This library provides
892 a generic interface between the kernel and low-level user space drivers
895 It allows slow and privileged operations (context initialization, hardware
896 resources allocations) to be managed by the kernel and fast operations to
897 never leave user space.
901 Low-level user space driver library for Mellanox
902 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices, it is automatically loaded
905 This library basically implements send/receive calls to the hardware
910 They provide the kernel-side Verbs API and low level device drivers that
911 manage actual hardware initialization and resources sharing with user
914 Unlike most other PMDs, these modules must remain loaded and bound to
917 - mlx5_core: hardware driver managing Mellanox
918 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices and related Ethernet kernel
920 - mlx5_ib: InifiniBand device driver.
921 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
923 - **Firmware update**
925 Mellanox OFED/EN releases include firmware updates for
926 ConnectX-4/ConnectX-5/ConnectX-6/BlueField adapters.
928 Because each release provides new features, these updates must be applied to
929 match the kernel modules and libraries they come with.
933 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
939 Either RDMA Core library with a recent enough Linux kernel release
940 (recommended) or Mellanox OFED/EN, which provides compatibility with older
943 RDMA Core with Linux Kernel
944 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
946 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
947 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
948 (see `RDMA Core installation documentation`_)
949 - When building for i686 use:
951 - rdma-core version 18.0 or above built with 32bit support.
952 - Kernel version 4.14.41 or above.
954 - Starting with rdma-core v21, static libraries can be built::
957 CFLAGS=-fPIC cmake -DIN_PLACE=1 -DENABLE_STATIC=1 -GNinja ..
960 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
961 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
963 If rdma-core libraries are built but not installed, DPDK makefile can link them,
964 thanks to these environment variables:
966 - ``EXTRA_CFLAGS=-I/path/to/rdma-core/build/include``
967 - ``EXTRA_LDFLAGS=-L/path/to/rdma-core/build/lib``
968 - ``PKG_CONFIG_PATH=/path/to/rdma-core/build/lib/pkgconfig``
973 - Mellanox OFED version: **4.5** and above /
974 Mellanox EN version: **4.5** and above
977 - ConnectX-4: **12.21.1000** and above.
978 - ConnectX-4 Lx: **14.21.1000** and above.
979 - ConnectX-5: **16.21.1000** and above.
980 - ConnectX-5 Ex: **16.21.1000** and above.
981 - ConnectX-6: **20.27.0090** and above.
982 - ConnectX-6 Dx: **22.27.0090** and above.
983 - BlueField: **18.25.1010** and above.
985 While these libraries and kernel modules are available on OpenFabrics
986 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
987 managers on most distributions, this PMD requires Ethernet extensions that
988 may not be supported at the moment (this is a work in progress).
991 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__ and
993 <http://www.mellanox.com/page/products_dyn?product_family=27&mtag=linux>`__
994 include the necessary support and should be used in the meantime. For DPDK,
995 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
996 required from that distribution.
1000 Several versions of Mellanox OFED/EN are available. Installing the version
1001 this DPDK release was developed and tested against is strongly
1002 recommended. Please check the `prerequisites`_.
1007 The following Mellanox device families are supported by the same mlx5 driver:
1017 Below are detailed device names:
1019 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX4111A-XCAT (1x10G)
1020 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX412A-XCAT (2x10G)
1021 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX4111A-ACAT (1x25G)
1022 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX412A-ACAT (2x25G)
1023 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX413A-BCAT (1x40G)
1024 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX4131A-BCAT (1x40G)
1025 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX415A-BCAT (1x40G)
1026 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX413A-GCAT (1x50G)
1027 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX4131A-GCAT (1x50G)
1028 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX414A-BCAT (2x50G)
1029 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-GCAT (1x50G)
1030 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-BCAT (2x50G)
1031 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-GCAT (2x50G)
1032 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-CCAT (1x100G)
1033 * Mellanox\ |reg| ConnectX\ |reg|-4 100G MCX416A-CCAT (2x100G)
1034 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4111A-XCAT (1x10G)
1035 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4121A-XCAT (2x10G)
1036 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4111A-ACAT (1x25G)
1037 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4121A-ACAT (2x25G)
1038 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 40G MCX4131A-BCAT (1x40G)
1039 * Mellanox\ |reg| ConnectX\ |reg|-5 100G MCX556A-ECAT (2x100G)
1040 * Mellanox\ |reg| ConnectX\ |reg|-5 Ex EN 100G MCX516A-CDAT (2x100G)
1041 * Mellanox\ |reg| ConnectX\ |reg|-6 200G MCX654106A-HCAT (2x200G)
1042 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 100G MCX623106AN-CDAT (2x100G)
1043 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 200G MCX623105AN-VDAT (1x200G)
1045 Quick Start Guide on OFED/EN
1046 ----------------------------
1048 1. Download latest Mellanox OFED/EN. For more info check the `prerequisites`_.
1051 2. Install the required libraries and kernel modules either by installing
1052 only the required set, or by installing the entire Mellanox OFED/EN::
1054 ./mlnxofedinstall --upstream-libs --dpdk
1056 3. Verify the firmware is the correct one::
1060 4. Verify all ports links are set to Ethernet::
1062 mlxconfig -d <mst device> query | grep LINK_TYPE
1066 Link types may have to be configured to Ethernet::
1068 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
1070 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
1072 For hypervisors, verify SR-IOV is enabled on the NIC::
1074 mlxconfig -d <mst device> query | grep SRIOV_EN
1077 If needed, configure SR-IOV::
1079 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
1080 mlxfwreset -d <mst device> reset
1082 5. Restart the driver::
1084 /etc/init.d/openibd restart
1088 service openibd restart
1090 If link type was changed, firmware must be reset as well::
1092 mlxfwreset -d <mst device> reset
1094 For hypervisors, after reset write the sysfs number of virtual functions
1097 To dynamically instantiate a given number of virtual functions (VFs)::
1099 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
1101 6. Compile DPDK and you are ready to go. See instructions on
1102 :ref:`Development Kit Build System <Development_Kit_Build_System>`
1104 Enable switchdev mode
1105 ---------------------
1107 Switchdev mode is a mode in E-Switch, that binds between representor and VF.
1108 Representor is a port in DPDK that is connected to a VF in such a way
1109 that assuming there are no offload flows, each packet that is sent from the VF
1110 will be received by the corresponding representor. While each packet that is
1111 sent to a representor will be received by the VF.
1112 This is very useful in case of SRIOV mode, where the first packet that is sent
1113 by the VF will be received by the DPDK application which will decide if this
1114 flow should be offloaded to the E-Switch. After offloading the flow packet
1115 that the VF that are matching the flow will not be received any more by
1116 the DPDK application.
1118 1. Enable SRIOV mode::
1120 mlxconfig -d <mst device> set SRIOV_EN=true
1122 2. Configure the max number of VFs::
1124 mlxconfig -d <mst device> set NUM_OF_VFS=<num of vfs>
1128 mlxfwreset -d <mst device> reset
1130 3. Configure the actual number of VFs::
1132 echo <num of vfs > /sys/class/net/<net device>/device/sriov_numvfs
1134 4. Unbind the device (can be rebind after the switchdev mode)::
1136 echo -n "<device pci address" > /sys/bus/pci/drivers/mlx5_core/unbind
1138 5. Enbale switchdev mode::
1140 echo switchdev > /sys/class/net/<net device>/compat/devlink/mode
1145 1. Configure aggressive CQE Zipping for maximum performance::
1147 mlxconfig -d <mst device> s CQE_COMPRESSION=1
1149 To set it back to the default CQE Zipping mode use::
1151 mlxconfig -d <mst device> s CQE_COMPRESSION=0
1153 2. In case of virtualization:
1155 - Make sure that hypervisor kernel is 3.16 or newer.
1156 - Configure boot with ``iommu=pt``.
1157 - Use 1G huge pages.
1158 - Make sure to allocate a VM on huge pages.
1159 - Make sure to set CPU pinning.
1161 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
1162 for better performance. For VMs, verify that the right CPU
1163 and NUMA node are pinned according to the above. Run::
1167 to identify the NUMA node to which the PCIe adapter is connected.
1169 4. If more than one adapter is used, and root complex capabilities allow
1170 to put both adapters on the same NUMA node without PCI bandwidth degradation,
1171 it is recommended to locate both adapters on the same NUMA node.
1172 This in order to forward packets from one to the other without
1173 NUMA performance penalty.
1175 5. Disable pause frames::
1177 ethtool -A <netdev> rx off tx off
1179 6. Verify IO non-posted prefetch is disabled by default. This can be checked
1180 via the BIOS configuration. Please contact you server provider for more
1181 information about the settings.
1185 On some machines, depends on the machine integrator, it is beneficial
1186 to set the PCI max read request parameter to 1K. This can be
1187 done in the following way:
1189 To query the read request size use::
1191 setpci -s <NIC PCI address> 68.w
1193 If the output is different than 3XXX, set it by::
1195 setpci -s <NIC PCI address> 68.w=3XXX
1197 The XXX can be different on different systems. Make sure to configure
1198 according to the setpci output.
1200 7. To minimize overhead of searching Memory Regions:
1202 - '--socket-mem' is recommended to pin memory by predictable amount.
1203 - Configure per-lcore cache when creating Mempools for packet buffer.
1204 - Refrain from dynamically allocating/freeing memory in run-time.
1206 .. _mlx5_offloads_support:
1208 Supported hardware offloads
1209 ---------------------------
1211 .. table:: Minimal SW/HW versions for queue offloads
1213 ============== ===== ===== ========= ===== ========== ==========
1214 Offload DPDK Linux rdma-core OFED firmware hardware
1215 ============== ===== ===== ========= ===== ========== ==========
1216 common base 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1217 checksums 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1218 Rx timestamp 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1219 TSO 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1220 LRO 19.08 N/A N/A 4.6-4 16.25.6406 ConnectX-5
1221 ============== ===== ===== ========= ===== ========== ==========
1223 .. table:: Minimal SW/HW versions for rte_flow offloads
1225 +-----------------------+-----------------+-----------------+
1226 | Offload | with E-Switch | with NIC |
1227 +=======================+=================+=================+
1228 | Count | | DPDK 19.05 | | DPDK 19.02 |
1229 | | | OFED 4.6 | | OFED 4.6 |
1230 | | | rdma-core 24 | | rdma-core 23 |
1231 | | | ConnectX-5 | | ConnectX-5 |
1232 +-----------------------+-----------------+-----------------+
1233 | Drop | | DPDK 19.05 | | DPDK 18.11 |
1234 | | | OFED 4.6 | | OFED 4.5 |
1235 | | | rdma-core 24 | | rdma-core 23 |
1236 | | | ConnectX-5 | | ConnectX-4 |
1237 +-----------------------+-----------------+-----------------+
1238 | Queue / RSS | | | | DPDK 18.11 |
1239 | | | N/A | | OFED 4.5 |
1240 | | | | | rdma-core 23 |
1241 | | | | | ConnectX-4 |
1242 +-----------------------+-----------------+-----------------+
1243 | Encapsulation | | DPDK 19.05 | | DPDK 19.02 |
1244 | (VXLAN / NVGRE / RAW) | | OFED 4.7-1 | | OFED 4.6 |
1245 | | | rdma-core 24 | | rdma-core 23 |
1246 | | | ConnectX-5 | | ConnectX-5 |
1247 +-----------------------+-----------------+-----------------+
1248 | Encapsulation | | DPDK 19.11 | | DPDK 19.11 |
1249 | GENEVE | | OFED 4.7-3 | | OFED 4.7-3 |
1250 | | | rdma-core 27 | | rdma-core 27 |
1251 | | | ConnectX-5 | | ConnectX-5 |
1252 +-----------------------+-----------------+-----------------+
1253 | | Header rewrite | | DPDK 19.05 | | DPDK 19.02 |
1254 | | (set_ipv4_src / | | OFED 4.7-1 | | OFED 4.7-1 |
1255 | | set_ipv4_dst / | | rdma-core 24 | | rdma-core 24 |
1256 | | set_ipv6_src / | | ConnectX-5 | | ConnectX-5 |
1257 | | set_ipv6_dst / | | | | |
1258 | | set_tp_src / | | | | |
1259 | | set_tp_dst / | | | | |
1260 | | dec_ttl / | | | | |
1261 | | set_ttl / | | | | |
1262 | | set_mac_src / | | | | |
1263 | | set_mac_dst) | | | | |
1264 +-----------------------+-----------------+-----------------+
1265 | | Header rewrite | | DPDK 20.02 | | DPDK 20.02 |
1266 | | (set_dscp) | | OFED 5.0 | | OFED 5.0 |
1267 | | | | rdma-core 24 | | rdma-core 24 |
1268 | | | | ConnectX-5 | | ConnectX-5 |
1269 +-----------------------+-----------------+-----------------+
1270 | Jump | | DPDK 19.05 | | DPDK 19.02 |
1271 | | | OFED 4.7-1 | | OFED 4.7-1 |
1272 | | | rdma-core 24 | | N/A |
1273 | | | ConnectX-5 | | ConnectX-5 |
1274 +-----------------------+-----------------+-----------------+
1275 | Mark / Flag | | DPDK 19.05 | | DPDK 18.11 |
1276 | | | OFED 4.6 | | OFED 4.5 |
1277 | | | rdma-core 24 | | rdma-core 23 |
1278 | | | ConnectX-5 | | ConnectX-4 |
1279 +-----------------------+-----------------+-----------------+
1280 | Port ID | | DPDK 19.05 | | N/A |
1281 | | | OFED 4.7-1 | | N/A |
1282 | | | rdma-core 24 | | N/A |
1283 | | | ConnectX-5 | | N/A |
1284 +-----------------------+-----------------+-----------------+
1285 | | VLAN | | DPDK 19.11 | | DPDK 19.11 |
1286 | | (of_pop_vlan / | | OFED 4.7-1 | | OFED 4.7-1 |
1287 | | of_push_vlan / | | ConnectX-5 | | ConnectX-5 |
1288 | | of_set_vlan_pcp / | | | | |
1289 | | of_set_vlan_vid) | | | | |
1290 +-----------------------+-----------------+-----------------+
1291 | Hairpin | | | | DPDK 19.11 |
1292 | | | N/A | | OFED 4.7-3 |
1293 | | | | | rdma-core 26 |
1294 | | | | | ConnectX-5 |
1295 +-----------------------+-----------------+-----------------+
1296 | Meta data | | DPDK 19.11 | | DPDK 19.11 |
1297 | | | OFED 4.7-3 | | OFED 4.7-3 |
1298 | | | rdma-core 26 | | rdma-core 26 |
1299 | | | ConnectX-5 | | ConnectX-5 |
1300 +-----------------------+-----------------+-----------------+
1301 | Metering | | DPDK 19.11 | | DPDK 19.11 |
1302 | | | OFED 4.7-3 | | OFED 4.7-3 |
1303 | | | rdma-core 26 | | rdma-core 26 |
1304 | | | ConnectX-5 | | ConnectX-5 |
1305 +-----------------------+-----------------+-----------------+
1310 MARK and META items are interrelated with datapath - they might move from/to
1311 the applications in mbuf fields. Hence, zero value for these items has the
1312 special meaning - it means "no metadata are provided", not zero values are
1313 treated by applications and PMD as valid ones.
1315 Moreover in the flow engine domain the value zero is acceptable to match and
1316 set, and we should allow to specify zero values as rte_flow parameters for the
1317 META and MARK items and actions. In the same time zero mask has no meaning and
1318 should be rejected on validation stage.
1323 Flows are not cached in the driver.
1324 When stopping a device port, all the flows created on this port from the
1325 application will be flushed automatically in the background.
1326 After stopping the device port, all flows on this port become invalid and
1327 not represented in the system.
1328 All references to these flows held by the application should be discarded
1329 directly but neither destroyed nor flushed.
1331 The application should re-create the flows as required after the port restart.
1336 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
1337 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
1339 Since ``testpmd`` defaults to IP RSS mode and there is currently no
1340 command-line parameter to enable additional protocols (UDP and TCP as well
1341 as IP), the following commands must be entered from its CLI to get the same
1342 behavior as librte_pmd_mlx4::
1345 > port config all rss all
1351 This section demonstrates how to launch **testpmd** with Mellanox
1352 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices managed by librte_pmd_mlx5.
1354 #. Load the kernel modules::
1356 modprobe -a ib_uverbs mlx5_core mlx5_ib
1358 Alternatively if MLNX_OFED/MLNX_EN is fully installed, the following script
1361 /etc/init.d/openibd restart
1365 User space I/O kernel modules (uio and igb_uio) are not used and do
1366 not have to be loaded.
1368 #. Make sure Ethernet interfaces are in working order and linked to kernel
1369 verbs. Related sysfs entries should be present::
1371 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
1380 #. Optionally, retrieve their PCI bus addresses for whitelisting::
1383 for intf in eth2 eth3 eth4 eth5;
1385 (cd "/sys/class/net/${intf}/device/" && pwd -P);
1388 sed -n 's,.*/\(.*\),-w \1,p'
1397 #. Request huge pages::
1399 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
1401 #. Start testpmd with basic parameters::
1403 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
1408 EAL: PCI device 0000:05:00.0 on NUMA socket 0
1409 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1410 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
1411 PMD: librte_pmd_mlx5: 1 port(s) detected
1412 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
1413 EAL: PCI device 0000:05:00.1 on NUMA socket 0
1414 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1415 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
1416 PMD: librte_pmd_mlx5: 1 port(s) detected
1417 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
1418 EAL: PCI device 0000:06:00.0 on NUMA socket 0
1419 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1420 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
1421 PMD: librte_pmd_mlx5: 1 port(s) detected
1422 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
1423 EAL: PCI device 0000:06:00.1 on NUMA socket 0
1424 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1425 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
1426 PMD: librte_pmd_mlx5: 1 port(s) detected
1427 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
1428 Interactive-mode selected
1429 Configuring Port 0 (socket 0)
1430 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
1431 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
1432 Port 0: E4:1D:2D:E7:0C:FE
1433 Configuring Port 1 (socket 0)
1434 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
1435 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
1436 Port 1: E4:1D:2D:E7:0C:FF
1437 Configuring Port 2 (socket 0)
1438 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
1439 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
1440 Port 2: E4:1D:2D:E7:0C:FA
1441 Configuring Port 3 (socket 0)
1442 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
1443 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
1444 Port 3: E4:1D:2D:E7:0C:FB
1445 Checking link statuses...
1446 Port 0 Link Up - speed 40000 Mbps - full-duplex
1447 Port 1 Link Up - speed 40000 Mbps - full-duplex
1448 Port 2 Link Up - speed 10000 Mbps - full-duplex
1449 Port 3 Link Up - speed 10000 Mbps - full-duplex
1456 This section demonstrates how to dump flows. Currently, it's possible to dump
1457 all flows with assistance of external tools.
1459 #. 2 ways to get flow raw file:
1461 - Using testpmd CLI:
1463 .. code-block:: console
1465 testpmd> flow dump <port> <output_file>
1467 - call rte_flow_dev_dump api:
1469 .. code-block:: console
1471 rte_flow_dev_dump(port, file, NULL);
1473 #. Dump human-readable flows from raw file:
1475 Get flow parsing tool from: https://github.com/Mellanox/mlx_steering_dump
1477 .. code-block:: console
1479 mlx_steering_dump.py -f <output_file>