1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright(C) 2019 Marvell International Ltd.
4 OCTEON TX2 Poll Mode driver
5 ===========================
7 The OCTEON TX2 ETHDEV PMD (**librte_pmd_octeontx2**) provides poll mode ethdev
8 driver support for the inbuilt network device found in **Marvell OCTEON TX2**
9 SoC family as well as for their virtual functions (VF) in SR-IOV context.
11 More information can be found at `Marvell Official Website
12 <https://www.marvell.com/embedded-processors/infrastructure-processors>`_.
17 Features of the OCTEON TX2 Ethdev PMD are:
19 - Packet type information
24 - Multiple queues for TX and RX
25 - Receiver Side Scaling (RSS)
28 - VLAN/QinQ stripping and insertion
29 - Port hardware statistics
30 - Link state information
32 - Scatter-Gather IO support
33 - Vector Poll mode driver
34 - Debug utilities - Context dump and error interrupt support
35 - IEEE1588 timestamping
40 See :doc:`../platform/octeontx2` for setup information.
42 Compile time Config Options
43 ---------------------------
45 The following options may be modified in the ``config`` file.
47 - ``CONFIG_RTE_LIBRTE_OCTEONTX2_PMD`` (default ``y``)
49 Toggle compilation of the ``librte_pmd_octeontx2`` driver.
51 Runtime Config Options
52 ----------------------
54 - ``HW offload ptype parsing disable`` (default ``0``)
56 Packet type parsing is HW offloaded by default and this feature may be toggled
57 using ``ptype_disable`` ``devargs`` parameter.
59 - ``Rx&Tx scalar mode enable`` (default ``0``)
61 Ethdev supports both scalar and vector mode, it may be selected at runtime
62 using ``scalar_enable`` ``devargs`` parameter.
64 - ``RSS reta size`` (default ``64``)
66 RSS redirection table size may be configured during runtime using ``reta_size``
67 ``devargs`` parameter.
71 -w 0002:02:00.0,reta_size=256
73 With the above configuration, reta table of size 256 is populated.
75 - ``Flow priority levels`` (default ``3``)
77 RTE Flow priority levels can be configured during runtime using
78 ``flow_max_priority`` ``devargs`` parameter.
82 -w 0002:02:00.0,flow_max_priority=10
84 With the above configuration, priority level was set to 10 (0-9). Max
85 priority level supported is 32.
87 - ``Reserve Flow entries`` (default ``8``)
89 RTE flow entries can be pre allocated and the size of pre allocation can be
90 selected runtime using ``flow_prealloc_size`` ``devargs`` parameter.
94 -w 0002:02:00.0,flow_prealloc_size=4
96 With the above configuration, pre alloc size was set to 4. Max pre alloc
99 - ``Max SQB buffer count`` (default ``512``)
101 Send queue descriptor buffer count may be limited during runtime using
102 ``max_sqb_count`` ``devargs`` parameter.
106 -w 0002:02:00.0,max_sqb_count=64
108 With the above configuration, each send queue's decscriptor buffer count is
109 limited to a maximum of 64 buffers.
114 Above devarg parameters are configurable per device, user needs to pass the
115 parameters to all the PCIe devices if application requires to configure on
116 all the ethdev ports.
121 The OCTEON TX2 SoC family NIC has support for the following patterns and
126 .. _table_octeontx2_supported_flow_item_types:
128 .. table:: Item types
130 +----+--------------------------------+
132 +====+================================+
133 | 1 | RTE_FLOW_ITEM_TYPE_ETH |
134 +----+--------------------------------+
135 | 2 | RTE_FLOW_ITEM_TYPE_VLAN |
136 +----+--------------------------------+
137 | 3 | RTE_FLOW_ITEM_TYPE_E_TAG |
138 +----+--------------------------------+
139 | 4 | RTE_FLOW_ITEM_TYPE_IPV4 |
140 +----+--------------------------------+
141 | 5 | RTE_FLOW_ITEM_TYPE_IPV6 |
142 +----+--------------------------------+
143 | 6 | RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4|
144 +----+--------------------------------+
145 | 7 | RTE_FLOW_ITEM_TYPE_MPLS |
146 +----+--------------------------------+
147 | 8 | RTE_FLOW_ITEM_TYPE_ICMP |
148 +----+--------------------------------+
149 | 9 | RTE_FLOW_ITEM_TYPE_UDP |
150 +----+--------------------------------+
151 | 10 | RTE_FLOW_ITEM_TYPE_TCP |
152 +----+--------------------------------+
153 | 11 | RTE_FLOW_ITEM_TYPE_SCTP |
154 +----+--------------------------------+
155 | 12 | RTE_FLOW_ITEM_TYPE_ESP |
156 +----+--------------------------------+
157 | 13 | RTE_FLOW_ITEM_TYPE_GRE |
158 +----+--------------------------------+
159 | 14 | RTE_FLOW_ITEM_TYPE_NVGRE |
160 +----+--------------------------------+
161 | 15 | RTE_FLOW_ITEM_TYPE_VXLAN |
162 +----+--------------------------------+
163 | 16 | RTE_FLOW_ITEM_TYPE_GTPC |
164 +----+--------------------------------+
165 | 17 | RTE_FLOW_ITEM_TYPE_GTPU |
166 +----+--------------------------------+
167 | 18 | RTE_FLOW_ITEM_TYPE_GENEVE |
168 +----+--------------------------------+
169 | 19 | RTE_FLOW_ITEM_TYPE_VXLAN_GPE |
170 +----+--------------------------------+
171 | 20 | RTE_FLOW_ITEM_TYPE_VOID |
172 +----+--------------------------------+
173 | 21 | RTE_FLOW_ITEM_TYPE_ANY |
174 +----+--------------------------------+
178 .. _table_octeontx2_supported_ingress_action_types:
180 .. table:: Ingress action types
182 +----+--------------------------------+
184 +====+================================+
185 | 1 | RTE_FLOW_ACTION_TYPE_VOID |
186 +----+--------------------------------+
187 | 2 | RTE_FLOW_ACTION_TYPE_MARK |
188 +----+--------------------------------+
189 | 3 | RTE_FLOW_ACTION_TYPE_FLAG |
190 +----+--------------------------------+
191 | 4 | RTE_FLOW_ACTION_TYPE_COUNT |
192 +----+--------------------------------+
193 | 5 | RTE_FLOW_ACTION_TYPE_DROP |
194 +----+--------------------------------+
195 | 6 | RTE_FLOW_ACTION_TYPE_QUEUE |
196 +----+--------------------------------+
197 | 7 | RTE_FLOW_ACTION_TYPE_RSS |
198 +----+--------------------------------+
199 | 8 | RTE_FLOW_ACTION_TYPE_SECURITY |
200 +----+--------------------------------+
202 .. _table_octeontx2_supported_egress_action_types:
204 .. table:: Egress action types
206 +----+--------------------------------+
208 +====+================================+
209 | 1 | RTE_FLOW_ACTION_TYPE_COUNT |
210 +----+--------------------------------+
211 | 2 | RTE_FLOW_ACTION_TYPE_DROP |
212 +----+--------------------------------+