1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright(c) 2010-2014 Intel Corporation.
4 L3 Forwarding with Power Management Sample Application
5 ======================================================
10 The L3 Forwarding with Power Management application is an example of power-aware packet processing using the DPDK.
11 The application is based on existing L3 Forwarding sample application,
12 with the power management algorithms to control the P-states and
13 C-states of the Intel processor via a power management library.
18 The application demonstrates the use of the Power libraries in the DPDK to implement packet forwarding.
19 The initialization and run-time paths are very similar to those of the :doc:`l3_forward`.
20 The main difference from the L3 Forwarding sample application is that this application introduces power-aware optimization algorithms
21 by leveraging the Power library to control P-state and C-state of processor based on packet load.
23 The DPDK includes poll-mode drivers to configure Intel NIC devices and their receive (Rx) and transmit (Tx) queues.
24 The design principle of this PMD is to access the Rx and Tx descriptors directly without any interrupts to quickly receive,
25 process and deliver packets in the user space.
27 In general, the DPDK executes an endless packet processing loop on dedicated IA cores that include the following steps:
29 * Retrieve input packets through the PMD to poll Rx queue
31 * Process each received packet or provide received packets to other processing cores through software queues
33 * Send pending output packets to Tx queue through the PMD
35 In this way, the PMD achieves better performance than a traditional interrupt-mode driver,
36 at the cost of keeping cores active and running at the highest frequency,
37 hence consuming the maximum power all the time.
38 However, during the period of processing light network traffic,
39 which happens regularly in communication infrastructure systems due to well-known "tidal effect",
40 the PMD is still busy waiting for network packets, which wastes a lot of power.
42 Processor performance states (P-states) are the capability of an Intel processor
43 to switch between different supported operating frequencies and voltages.
44 If configured correctly, according to system workload, this feature provides power savings.
45 CPUFreq is the infrastructure provided by the Linux* kernel to control the processor performance state capability.
46 CPUFreq supports a user space governor that enables setting frequency via manipulating the virtual file device from a user space application.
47 The Power library in the DPDK provides a set of APIs for manipulating a virtual file device to allow user space application
48 to set the CPUFreq governor and set the frequency of specific cores.
50 This application includes a P-state power management algorithm to generate a frequency hint to be sent to CPUFreq.
51 The algorithm uses the number of received and available Rx packets on recent polls to make a heuristic decision to scale frequency up/down.
52 Specifically, some thresholds are checked to see whether a specific core running an DPDK polling thread needs to increase frequency
53 a step up based on the near to full trend of polled Rx queues.
54 Also, it decreases frequency a step if packet processed per loop is far less than the expected threshold
55 or the thread's sleeping time exceeds a threshold.
57 C-States are also known as sleep states.
58 They allow software to put an Intel core into a low power idle state from which it is possible to exit via an event, such as an interrupt.
59 However, there is a tradeoff between the power consumed in the idle state and the time required to wake up from the idle state (exit latency).
60 Therefore, as you go into deeper C-states, the power consumed is lower but the exit latency is increased. Each C-state has a target residency.
61 It is essential that when entering into a C-state, the core remains in this C-state for at least as long as the target residency in order
62 to fully realize the benefits of entering the C-state.
63 CPUIdle is the infrastructure provide by the Linux kernel to control the processor C-state capability.
64 Unlike CPUFreq, CPUIdle does not provide a mechanism that allows the application to change C-state.
65 It actually has its own heuristic algorithms in kernel space to select target C-state to enter by executing privileged instructions like HLT and MWAIT,
66 based on the speculative sleep duration of the core.
67 In this application, we introduce a heuristic algorithm that allows packet processing cores to sleep for a short period
68 if there is no Rx packet received on recent polls.
69 In this way, CPUIdle automatically forces the corresponding cores to enter deeper C-states
70 instead of always running to the C0 state waiting for packets.
74 To fully demonstrate the power saving capability of using C-states,
75 it is recommended to enable deeper C3 and C6 states in the BIOS during system boot up.
77 Compiling the Application
78 -------------------------
80 To compile the sample application see :doc:`compiling`.
82 The application is located in the ``l3fwd-power`` sub-directory.
84 Running the Application
85 -----------------------
87 The application has a number of command line options:
89 .. code-block:: console
91 ./build/l3fwd_power [EAL options] -- -p PORTMASK [-P] --config(port,queue,lcore)[,(port,queue,lcore)] [--enable-jumbo [--max-pkt-len PKTLEN]] [--no-numa]
95 * -p PORTMASK: Hexadecimal bitmask of ports to configure
97 * -P: Sets all ports to promiscuous mode so that packets are accepted regardless of the packet's Ethernet MAC destination address.
98 Without this option, only packets with the Ethernet MAC destination address set to the Ethernet address of the port are accepted.
100 * --config (port,queue,lcore)[,(port,queue,lcore)]: determines which queues from which ports are mapped to which cores.
102 * --enable-jumbo: optional, enables jumbo frames
104 * --max-pkt-len: optional, maximum packet length in decimal (64-9600)
106 * --no-numa: optional, disables numa awareness
108 See :doc:`l3_forward` for details.
109 The L3fwd-power example reuses the L3fwd command line options.
114 The following sections provide some explanation of the sample application code.
115 As mentioned in the overview section,
116 the initialization and run-time paths are identical to those of the L3 forwarding application.
117 The following sections describe aspects that are specific to the L3 Forwarding with Power Management sample application.
119 Power Library Initialization
120 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
122 The Power library is initialized in the main routine.
123 It changes the P-state governor to userspace for specific cores that are under control.
124 The Timer library is also initialized and several timers are created later on,
125 responsible for checking if it needs to scale down frequency at run time by checking CPU utilization statistics.
129 Only the power management related initialization is shown.
133 int main(int argc, char **argv)
135 struct lcore_conf *qconf;
138 uint16_t queueid, portid;
141 uint32_t n_tx_queue, nb_lcores;
142 uint8_t nb_rx_queue, queue, socketid;
146 /* init RTE timer library to be used to initialize per-core timers */
148 rte_timer_subsystem_init();
153 /* per-core initialization */
155 for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
156 if (rte_lcore_is_enabled(lcore_id) == 0)
159 /* init power management library for a specified core */
161 ret = rte_power_init(lcore_id);
163 rte_exit(EXIT_FAILURE, "Power management library "
164 "initialization failed on core%d\n", lcore_id);
166 /* init timer structures for each enabled lcore */
168 rte_timer_init(&power_timers[lcore_id]);
170 hz = rte_get_hpet_hz();
172 rte_timer_reset(&power_timers[lcore_id], hz/TIMER_NUMBER_PER_SECOND, SINGLE, lcore_id, power_timer_cb, NULL);
180 Monitoring Loads of Rx Queues
181 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
183 In general, the polling nature of the DPDK prevents the OS power management subsystem from knowing
184 if the network load is actually heavy or light.
185 In this sample, sampling network load work is done by monitoring received and
186 available descriptors on NIC Rx queues in recent polls.
187 Based on the number of returned and available Rx descriptors,
188 this example implements algorithms to generate frequency scaling hints and speculative sleep duration,
189 and use them to control P-state and C-state of processors via the power management library.
190 Frequency (P-state) control and sleep state (C-state) control work individually for each logical core,
191 and the combination of them contributes to a power efficient packet processing solution when serving light network loads.
193 The rte_eth_rx_burst() function and the newly-added rte_eth_rx_queue_count() function are used in the endless packet processing loop
194 to return the number of received and available Rx descriptors.
195 And those numbers of specific queue are passed to P-state and C-state heuristic algorithms
196 to generate hints based on recent network load trends.
200 Only power control related code is shown.
205 attribute ((noreturn)) int main_loop( attribute ((unused)) void *dummy)
213 * Read packet from RX queues
216 lcore_scaleup_hint = FREQ_CURRENT;
217 lcore_rx_idle_count = 0;
219 for (i = 0; i < qconf->n_rx_queue; ++i)
221 rx_queue = &(qconf->rx_queue_list[i]);
222 rx_queue->idle_hint = 0;
223 portid = rx_queue->port_id;
224 queueid = rx_queue->queue_id;
226 nb_rx = rte_eth_rx_burst(portid, queueid, pkts_burst, MAX_PKT_BURST);
227 stats[lcore_id].nb_rx_processed += nb_rx;
229 if (unlikely(nb_rx == 0)) {
231 * no packet received from rx queue, try to
232 * sleep for a while forcing CPU enter deeper
236 rx_queue->zero_rx_packet_count++;
238 if (rx_queue->zero_rx_packet_count <= MIN_ZERO_POLL_COUNT)
241 rx_queue->idle_hint = power_idle_heuristic(rx_queue->zero_rx_packet_count);
242 lcore_rx_idle_count++;
244 rx_ring_length = rte_eth_rx_queue_count(portid, queueid);
246 rx_queue->zero_rx_packet_count = 0;
249 * do not scale up frequency immediately as
250 * user to kernel space communication is costly
251 * which might impact packet I/O for received
255 rx_queue->freq_up_hint = power_freq_scaleup_heuristic(lcore_id, rx_ring_length);
258 /* Prefetch and forward packets */
263 if (likely(lcore_rx_idle_count != qconf->n_rx_queue)) {
264 for (i = 1, lcore_scaleup_hint = qconf->rx_queue_list[0].freq_up_hint; i < qconf->n_rx_queue; ++i) {
265 x_queue = &(qconf->rx_queue_list[i]);
267 if (rx_queue->freq_up_hint > lcore_scaleup_hint)
269 lcore_scaleup_hint = rx_queue->freq_up_hint;
272 if (lcore_scaleup_hint == FREQ_HIGHEST)
274 rte_power_freq_max(lcore_id);
276 else if (lcore_scaleup_hint == FREQ_HIGHER)
277 rte_power_freq_up(lcore_id);
280 * All Rx queues empty in recent consecutive polls,
281 * sleep in a conservative manner, meaning sleep as
285 for (i = 1, lcore_idle_hint = qconf->rx_queue_list[0].idle_hint; i < qconf->n_rx_queue; ++i) {
286 rx_queue = &(qconf->rx_queue_list[i]);
287 if (rx_queue->idle_hint < lcore_idle_hint)
288 lcore_idle_hint = rx_queue->idle_hint;
291 if ( lcore_idle_hint < SLEEP_GEAR1_THRESHOLD)
293 * execute "pause" instruction to avoid context
294 * switch for short sleep.
296 rte_delay_us(lcore_idle_hint);
298 /* long sleep force ruining thread to suspend */
299 usleep(lcore_idle_hint);
301 stats[lcore_id].sleep_time += lcore_idle_hint;
306 P-State Heuristic Algorithm
307 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
309 The power_freq_scaleup_heuristic() function is responsible for generating a frequency hint for the specified logical core
310 according to available descriptor number returned from rte_eth_rx_queue_count().
311 On every poll for new packets, the length of available descriptor on an Rx queue is evaluated,
312 and the algorithm used for frequency hinting is as follows:
314 * If the size of available descriptors exceeds 96, the maximum frequency is hinted.
316 * If the size of available descriptors exceeds 64, a trend counter is incremented by 100.
318 * If the length of the ring exceeds 32, the trend counter is incremented by 1.
320 * When the trend counter reached 10000 the frequency hint is changed to the next higher frequency.
324 The assumption is that the Rx queue size is 128 and the thresholds specified above
325 must be adjusted accordingly based on actual hardware Rx queue size,
326 which are configured via the rte_eth_rx_queue_setup() function.
328 In general, a thread needs to poll packets from multiple Rx queues.
329 Most likely, different queue have different load, so they would return different frequency hints.
330 The algorithm evaluates all the hints and then scales up frequency in an aggressive manner
331 by scaling up to highest frequency as long as one Rx queue requires.
332 In this way, we can minimize any negative performance impact.
334 On the other hand, frequency scaling down is controlled in the timer callback function.
335 Specifically, if the sleep times of a logical core indicate that it is sleeping more than 25% of the sampling period,
336 or if the average packet per iteration is less than expectation, the frequency is decreased by one step.
338 C-State Heuristic Algorithm
339 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
341 Whenever recent rte_eth_rx_burst() polls return 5 consecutive zero packets,
342 an idle counter begins incrementing for each successive zero poll.
343 At the same time, the function power_idle_heuristic() is called to generate speculative sleep duration
344 in order to force logical to enter deeper sleeping C-state.
345 There is no way to control C- state directly, and the CPUIdle subsystem in OS is intelligent enough
346 to select C-state to enter based on actual sleep period time of giving logical core.
347 The algorithm has the following sleeping behavior depending on the idle counter:
349 * If idle count less than 100, the counter value is used as a microsecond sleep value through rte_delay_us()
350 which execute pause instructions to avoid costly context switch but saving power at the same time.
352 * If idle count is between 100 and 999, a fixed sleep interval of 100 μs is used.
353 A 100 μs sleep interval allows the core to enter the C1 state while keeping a fast response time in case new traffic arrives.
355 * If idle count is greater than 1000, a fixed sleep value of 1 ms is used until the next timer expiration is used.
356 This allows the core to enter the C3/C6 states.
360 The thresholds specified above need to be adjusted for different Intel processors and traffic profiles.
362 If a thread polls multiple Rx queues and different queue returns different sleep duration values,
363 the algorithm controls the sleep time in a conservative manner by sleeping for the least possible time
364 in order to avoid a potential performance impact.