1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2020 Intel Corporation
5 #ifndef _RTE_PMD_FPGA_5GNR_FEC_H_
6 #define _RTE_PMD_FPGA_5GNR_FEC_H_
12 * @file rte_pmd_fpga_5gnr_fec.h
14 * Interface for Intel(R) FGPA 5GNR FEC device configuration at the host level,
15 * directly accessible by the application.
16 * Configuration related to 5GNR functionality is done through
17 * librte_bbdev library.
20 * @b EXPERIMENTAL: this API may change without prior notice
27 /** Number of Virtual Functions FGPA 4G FEC supports */
28 #define FPGA_5GNR_FEC_NUM_VFS 8
31 * Structure to pass FPGA 4G FEC configuration.
33 struct rte_fpga_5gnr_fec_conf {
34 /** 1 if PF is used for dataplane, 0 for VFs */
36 /** Number of UL queues per VF */
37 uint8_t vf_ul_queues_number[FPGA_5GNR_FEC_NUM_VFS];
38 /** Number of DL queues per VF */
39 uint8_t vf_dl_queues_number[FPGA_5GNR_FEC_NUM_VFS];
40 /** UL bandwidth. Needed for schedule algorithm */
42 /** DL bandwidth. Needed for schedule algorithm */
44 /** UL Load Balance */
45 uint8_t ul_load_balance;
46 /** DL Load Balance */
47 uint8_t dl_load_balance;
51 * Configure Intel(R) FPGA 5GNR FEC device
54 * The name of the device. This is the short form of PCI BDF, e.g. 00:01.0.
55 * It can also be retrieved for a bbdev device from the dev_name field in the
56 * rte_bbdev_info structure returned by rte_bbdev_info_get().
58 * Configuration to apply to FPGA 4G FEC.
61 * Zero on success, negative value on failure.
65 rte_fpga_5gnr_fec_configure(const char *dev_name,
66 const struct rte_fpga_5gnr_fec_conf *conf);
72 #endif /* _RTE_PMD_FPGA_5GNR_FEC_H_ */