2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
7 * Copyright 2010-2011 Freescale Semiconductor, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
12 * * Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * * Neither the name of the above-listed copyright holders nor the
18 * names of any contributors may be used to endorse or promote products
19 * derived from this software without specific prior written permission.
23 * ALTERNATIVELY, this software may be distributed under the terms of the
24 * GNU General Public License ("GPL") as published by the Free Software
25 * Foundation, either version 2 of that License or (at your option) any
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
32 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
46 /* The process device underlies process-wide user/kernel interactions, such as
47 * mapping dma_mem memory and providing accompanying ioctl()s. (This isn't used
48 * for portals, which use one UIO device each.).
50 #define PROCESS_PATH "/dev/fsl-usdpaa"
52 /* Allocation of resource IDs uses a generic interface. This enum is used to
53 * distinguish between the type of underlying object being manipulated.
60 dpaa_id_max /* <-- not a valid type, represents the number of types */
63 int process_alloc(enum dpaa_id_type id_type, uint32_t *base, uint32_t num,
64 uint32_t align, int partial);
65 void process_release(enum dpaa_id_type id_type, uint32_t base, uint32_t num);
67 int process_reserve(enum dpaa_id_type id_type, uint32_t base, uint32_t num);
69 /* Mapping and using QMan/BMan portals */
70 enum dpaa_portal_type {
75 struct dpaa_ioctl_portal_map {
76 /* Input parameter, is a qman or bman portal required. */
77 enum dpaa_portal_type type;
78 /* Specifes a specific portal index to map or 0xffffffff
83 /* Return value if the map succeeds, this gives the mapped
84 * cache-inhibited (cinh) and cache-enabled (cena) addresses.
86 struct dpaa_portal_map {
90 /* Qman-specific return values */
95 int process_portal_map(struct dpaa_ioctl_portal_map *params);
96 int process_portal_unmap(struct dpaa_portal_map *map);
98 struct dpaa_ioctl_irq_map {
99 enum dpaa_portal_type type; /* Type of portal to map */
100 int fd; /* File descriptor that contains the portal */
101 void *portal_cinh; /* Cache inhibited area to identify the portal */
104 int process_portal_irq_map(int fd, struct dpaa_ioctl_irq_map *irq);
105 int process_portal_irq_unmap(int fd);
107 #endif /* __PROCESS_H */