1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright 2017-2020 NXP
6 #ifndef __RTE_DPAA_BUS_H__
7 #define __RTE_DPAA_BUS_H__
10 #include <rte_mempool.h>
11 #include <dpaax_iova_table.h>
19 #define DPAA_MEMPOOL_OPS_NAME "dpaa"
21 #define DEV_TO_DPAA_DEVICE(ptr) \
22 container_of(ptr, struct rte_dpaa_device, device)
24 /* DPAA SoC identifier; If this is not available, it can be concluded
25 * that board is non-DPAA. Single slot is currently supported.
27 #define DPAA_SOC_ID_FILE "/sys/devices/soc0/soc_id"
29 #define SVR_LS1043A_FAMILY 0x87920000
30 #define SVR_LS1046A_FAMILY 0x87070000
31 #define SVR_MASK 0xffff0000
33 /** Device driver supports link state interrupt */
34 #define RTE_DPAA_DRV_INTR_LSC 0x0008
36 #define RTE_DEV_TO_DPAA_CONST(ptr) \
37 container_of(ptr, const struct rte_dpaa_device, device)
39 extern unsigned int dpaa_svr_family;
41 struct rte_dpaa_device;
42 struct rte_dpaa_driver;
44 /* DPAA Device and Driver lists for DPAA bus */
45 TAILQ_HEAD(rte_dpaa_device_list, rte_dpaa_device);
46 TAILQ_HEAD(rte_dpaa_driver_list, rte_dpaa_driver);
55 struct rte_dpaa_device_list device_list;
56 struct rte_dpaa_driver_list driver_list;
61 struct dpaa_device_id {
62 uint8_t fman_id; /**< Fman interface ID, for ETH type device */
63 uint8_t mac_id; /**< Fman MAC interface ID, for ETH type device */
64 uint16_t dev_id; /**< Device Identifier from DPDK */
67 struct rte_dpaa_device {
68 TAILQ_ENTRY(rte_dpaa_device) next;
69 struct rte_device device;
71 struct rte_eth_dev *eth_dev;
72 struct rte_cryptodev *crypto_dev;
74 struct rte_dpaa_driver *driver;
75 struct dpaa_device_id id;
76 struct rte_intr_handle intr_handle;
77 enum rte_dpaa_type device_type; /**< Ethernet or crypto type device */
78 char name[RTE_ETH_NAME_MAX_LEN];
81 typedef int (*rte_dpaa_probe_t)(struct rte_dpaa_driver *dpaa_drv,
82 struct rte_dpaa_device *dpaa_dev);
83 typedef int (*rte_dpaa_remove_t)(struct rte_dpaa_device *dpaa_dev);
85 struct rte_dpaa_driver {
86 TAILQ_ENTRY(rte_dpaa_driver) next;
87 struct rte_driver driver;
88 struct rte_dpaa_bus *dpaa_bus;
89 enum rte_dpaa_type drv_type;
90 rte_dpaa_probe_t probe;
91 rte_dpaa_remove_t remove;
92 uint32_t drv_flags; /**< Flags for controlling device.*/
95 /* Create storage for dqrr entries per lcore */
96 #define DPAA_PORTAL_DEQUEUE_DEPTH 16
97 struct dpaa_portal_dqrr {
98 void *mbuf[DPAA_PORTAL_DEQUEUE_DEPTH];
104 uint32_t bman_idx; /**< BMAN Portal ID*/
105 uint32_t qman_idx; /**< QMAN Portal ID*/
106 struct dpaa_portal_dqrr dpaa_held_bufs;
107 struct rte_crypto_op **dpaa_sec_ops;
109 uint64_t tid;/**< Parent Thread id for this portal */
112 RTE_DECLARE_PER_LCORE(struct dpaa_portal *, dpaa_io);
114 #define DPAA_PER_LCORE_PORTAL \
115 RTE_PER_LCORE(dpaa_io)
116 #define DPAA_PER_LCORE_DQRR_SIZE \
117 RTE_PER_LCORE(dpaa_io)->dpaa_held_bufs.dqrr_size
118 #define DPAA_PER_LCORE_DQRR_HELD \
119 RTE_PER_LCORE(dpaa_io)->dpaa_held_bufs.dqrr_held
120 #define DPAA_PER_LCORE_DQRR_MBUF(i) \
121 RTE_PER_LCORE(dpaa_io)->dpaa_held_bufs.mbuf[i]
122 #define DPAA_PER_LCORE_RTE_CRYPTO_OP \
123 RTE_PER_LCORE(dpaa_io)->dpaa_sec_ops
124 #define DPAA_PER_LCORE_DPAA_SEC_OP_NB \
125 RTE_PER_LCORE(dpaa_io)->dpaa_sec_op_nb
127 /* Various structures representing contiguous memory maps */
129 TAILQ_ENTRY(dpaa_memseg) next;
135 TAILQ_HEAD(dpaa_memseg_list, dpaa_memseg);
136 extern struct dpaa_memseg_list rte_dpaa_memsegs;
138 /* Either iterate over the list of internal memseg references or fallback to
139 * EAL memseg based iova2virt.
141 static inline void *rte_dpaa_mem_ptov(phys_addr_t paddr)
143 struct dpaa_memseg *ms;
146 va = dpaax_iova_table_get_va(paddr);
147 if (likely(va != NULL))
150 /* Check if the address is already part of the memseg list internally
151 * maintained by the dpaa driver.
153 TAILQ_FOREACH(ms, &rte_dpaa_memsegs, next) {
154 if (paddr >= ms->iova && paddr <
156 return RTE_PTR_ADD(ms->vaddr, (uintptr_t)(paddr - ms->iova));
159 /* If not, Fallback to full memseg list searching */
160 va = rte_mem_iova2virt(paddr);
162 dpaax_iova_table_update(paddr, va, RTE_CACHE_LINE_SIZE);
167 static inline rte_iova_t
168 rte_dpaa_mem_vtop(void *vaddr)
170 const struct rte_memseg *ms;
172 ms = rte_mem_virt2memseg(vaddr, NULL);
174 return ms->iova + RTE_PTR_DIFF(vaddr, ms->addr);
180 * Register a DPAA driver.
183 * A pointer to a rte_dpaa_driver structure describing the driver
187 void rte_dpaa_driver_register(struct rte_dpaa_driver *driver);
190 * Unregister a DPAA driver.
193 * A pointer to a rte_dpaa_driver structure describing the driver
194 * to be unregistered.
197 void rte_dpaa_driver_unregister(struct rte_dpaa_driver *driver);
200 * Initialize a DPAA portal
206 * 0 in case of success, error otherwise
209 int rte_dpaa_portal_init(void *arg);
212 int rte_dpaa_portal_fq_init(void *arg, struct qman_fq *fq);
215 int rte_dpaa_portal_fq_close(struct qman_fq *fq);
218 * Cleanup a DPAA Portal
220 void dpaa_portal_finish(void *arg);
222 /** Helper for DPAA device registration from driver (eth, crypto) instance */
223 #define RTE_PMD_REGISTER_DPAA(nm, dpaa_drv) \
224 RTE_INIT(dpaainitfn_ ##nm) \
226 (dpaa_drv).driver.name = RTE_STR(nm);\
227 rte_dpaa_driver_register(&dpaa_drv); \
229 RTE_PMD_EXPORT_NAME(nm, __COUNTER__)
232 struct fm_eth_port_cfg *dpaa_get_eth_port_cfg(int dev_id);
238 #endif /* __RTE_DPAA_BUS_H__ */