1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
3 * Copyright 2013-2016 Freescale Semiconductor Inc.
6 #ifndef _FSL_DPCI_CMD_H
7 #define _FSL_DPCI_CMD_H
10 #define DPCI_VER_MAJOR 3
11 #define DPCI_VER_MINOR 4
13 #define DPCI_CMD_BASE_VERSION 1
14 #define DPCI_CMD_BASE_VERSION_V2 2
15 #define DPCI_CMD_ID_OFFSET 4
17 #define DPCI_CMD_V1(id) ((id << DPCI_CMD_ID_OFFSET) | DPCI_CMD_BASE_VERSION)
18 #define DPCI_CMD_V2(id) ((id << DPCI_CMD_ID_OFFSET) | DPCI_CMD_BASE_VERSION_V2)
21 #define DPCI_CMDID_CLOSE DPCI_CMD_V1(0x800)
22 #define DPCI_CMDID_OPEN DPCI_CMD_V1(0x807)
23 #define DPCI_CMDID_CREATE DPCI_CMD_V2(0x907)
24 #define DPCI_CMDID_DESTROY DPCI_CMD_V1(0x987)
25 #define DPCI_CMDID_GET_API_VERSION DPCI_CMD_V1(0xa07)
27 #define DPCI_CMDID_ENABLE DPCI_CMD_V1(0x002)
28 #define DPCI_CMDID_DISABLE DPCI_CMD_V1(0x003)
29 #define DPCI_CMDID_GET_ATTR DPCI_CMD_V1(0x004)
30 #define DPCI_CMDID_RESET DPCI_CMD_V1(0x005)
31 #define DPCI_CMDID_IS_ENABLED DPCI_CMD_V1(0x006)
33 #define DPCI_CMDID_SET_RX_QUEUE DPCI_CMD_V1(0x0e0)
34 #define DPCI_CMDID_GET_LINK_STATE DPCI_CMD_V1(0x0e1)
35 #define DPCI_CMDID_GET_PEER_ATTR DPCI_CMD_V1(0x0e2)
36 #define DPCI_CMDID_GET_RX_QUEUE DPCI_CMD_V1(0x0e3)
37 #define DPCI_CMDID_GET_TX_QUEUE DPCI_CMD_V1(0x0e4)
38 #define DPCI_CMDID_SET_OPR DPCI_CMD_V1(0x0e5)
39 #define DPCI_CMDID_GET_OPR DPCI_CMD_V1(0x0e6)
41 /* Macros for accessing command fields smaller than 1byte */
42 #define DPCI_MASK(field) \
43 GENMASK(DPCI_##field##_SHIFT + DPCI_##field##_SIZE - 1, \
45 #define dpci_set_field(var, field, val) \
46 ((var) |= (((val) << DPCI_##field##_SHIFT) & DPCI_MASK(field)))
47 #define dpci_get_field(var, field) \
48 (((var) & DPCI_MASK(field)) >> DPCI_##field##_SHIFT)
51 struct dpci_cmd_open {
55 struct dpci_cmd_create {
56 uint8_t num_of_priorities;
61 struct dpci_cmd_destroy {
65 #define DPCI_ENABLE_SHIFT 0
66 #define DPCI_ENABLE_SIZE 1
68 struct dpci_rsp_is_enabled {
69 /* only the LSB bit */
73 struct dpci_rsp_get_attr {
76 uint8_t num_of_priorities;
79 struct dpci_rsp_get_peer_attr {
82 uint8_t num_of_priorities;
85 #define DPCI_UP_SHIFT 0
86 #define DPCI_UP_SIZE 1
88 struct dpci_rsp_get_link_state {
89 /* only the LSB bit */
93 #define DPCI_DEST_TYPE_SHIFT 0
94 #define DPCI_DEST_TYPE_SIZE 4
95 #define DPCI_ORDER_PRESERVATION_SHIFT 4
96 #define DPCI_ORDER_PRESERVATION_SIZE 1
98 struct dpci_cmd_set_rx_queue {
100 uint8_t dest_priority;
102 /* from LSB: dest_type:4 */
109 struct dpci_cmd_get_queue {
114 struct dpci_rsp_get_rx_queue {
116 uint8_t dest_priority;
118 /* from LSB: dest_type:4 */
125 struct dpci_rsp_get_tx_queue {
130 struct dpci_rsp_get_api_version {
135 struct dpci_cmd_set_opr {
147 struct dpci_cmd_get_opr {
152 #define DPCI_RIP_SHIFT 0
153 #define DPCI_RIP_SIZE 1
154 #define DPCI_OPR_ENABLE_SHIFT 1
155 #define DPCI_OPR_ENABLE_SIZE 1
156 #define DPCI_TSEQ_NLIS_SHIFT 0
157 #define DPCI_TSEQ_NLIS_SIZE 1
158 #define DPCI_HSEQ_NLIS_SHIFT 0
159 #define DPCI_HSEQ_NLIS_SIZE 1
161 struct dpci_rsp_get_opr {
163 /* from LSB: rip:1 enable:1 */
192 #endif /* _FSL_DPCI_CMD_H */