1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
3 * Copyright 2013-2016 Freescale Semiconductor Inc.
4 * Copyright 2016-2017 NXP
7 #ifndef _FSL_DPIO_CMD_H
8 #define _FSL_DPIO_CMD_H
11 #define DPIO_VER_MAJOR 4
12 #define DPIO_VER_MINOR 2
14 #define DPIO_CMD_BASE_VERSION 1
15 #define DPIO_CMD_ID_OFFSET 4
17 #define DPIO_CMD(id) (((id) << DPIO_CMD_ID_OFFSET) | DPIO_CMD_BASE_VERSION)
20 #define DPIO_CMDID_CLOSE DPIO_CMD(0x800)
21 #define DPIO_CMDID_OPEN DPIO_CMD(0x803)
22 #define DPIO_CMDID_CREATE DPIO_CMD(0x903)
23 #define DPIO_CMDID_DESTROY DPIO_CMD(0x983)
24 #define DPIO_CMDID_GET_API_VERSION DPIO_CMD(0xa03)
26 #define DPIO_CMDID_ENABLE DPIO_CMD(0x002)
27 #define DPIO_CMDID_DISABLE DPIO_CMD(0x003)
28 #define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004)
29 #define DPIO_CMDID_RESET DPIO_CMD(0x005)
30 #define DPIO_CMDID_IS_ENABLED DPIO_CMD(0x006)
32 #define DPIO_CMDID_SET_IRQ_ENABLE DPIO_CMD(0x012)
33 #define DPIO_CMDID_GET_IRQ_ENABLE DPIO_CMD(0x013)
34 #define DPIO_CMDID_SET_IRQ_MASK DPIO_CMD(0x014)
35 #define DPIO_CMDID_GET_IRQ_MASK DPIO_CMD(0x015)
36 #define DPIO_CMDID_GET_IRQ_STATUS DPIO_CMD(0x016)
37 #define DPIO_CMDID_CLEAR_IRQ_STATUS DPIO_CMD(0x017)
39 #define DPIO_CMDID_SET_STASHING_DEST DPIO_CMD(0x120)
40 #define DPIO_CMDID_GET_STASHING_DEST DPIO_CMD(0x121)
41 #define DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x122)
42 #define DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x123)
44 /* Macros for accessing command fields smaller than 1byte */
45 #define DPIO_MASK(field) \
46 GENMASK(DPIO_##field##_SHIFT + DPIO_##field##_SIZE - 1, \
48 #define dpio_set_field(var, field, val) \
49 ((var) |= (((val) << DPIO_##field##_SHIFT) & DPIO_MASK(field)))
50 #define dpio_get_field(var, field) \
51 (((var) & DPIO_MASK(field)) >> DPIO_##field##_SHIFT)
54 struct dpio_cmd_open {
58 #define DPIO_CHANNEL_MODE_SHIFT 0
59 #define DPIO_CHANNEL_MODE_SIZE 2
61 struct dpio_cmd_create {
63 /* from LSB: channel_mode:2 */
66 uint8_t num_priorities;
69 struct dpio_cmd_destroy {
73 #define DPIO_ENABLE_SHIFT 0
74 #define DPIO_ENABLE_SIZE 1
76 struct dpio_rsp_is_enabled {
81 #define DPIO_ATTR_CHANNEL_MODE_SHIFT 0
82 #define DPIO_ATTR_CHANNEL_MODE_SIZE 4
84 struct dpio_rsp_get_attr {
86 uint16_t qbman_portal_id;
87 uint8_t num_priorities;
88 /* from LSB: channel_mode:4 */
90 uint64_t qbman_portal_ce_offset;
91 uint64_t qbman_portal_ci_offset;
92 uint32_t qbman_version;
97 struct dpio_stashing_dest {
101 struct dpio_cmd_static_dequeue_channel {
105 struct dpio_rsp_add_static_dequeue_channel {
106 uint8_t channel_index;
109 struct dpio_rsp_get_api_version {
115 #endif /* _FSL_DPIO_CMD_H */