1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
4 * Copyright 2016-2019 NXP
8 #ifndef _DPAA2_HW_DPIO_H_
9 #define _DPAA2_HW_DPIO_H_
11 #include <mc/fsl_dpio.h>
12 #include <mc/fsl_mc_sys.h>
14 struct dpaa2_io_portal_t {
15 struct dpaa2_dpio_dev *dpio_dev;
16 struct dpaa2_dpio_dev *ethrx_dpio_dev;
22 /*! Global per thread DPIO portal */
23 RTE_DECLARE_PER_LCORE(struct dpaa2_io_portal_t, _dpaa2_io);
25 #define DPAA2_PER_LCORE_DPIO RTE_PER_LCORE(_dpaa2_io).dpio_dev
26 #define DPAA2_PER_LCORE_PORTAL DPAA2_PER_LCORE_DPIO->sw_portal
28 #define DPAA2_PER_LCORE_ETHRX_DPIO RTE_PER_LCORE(_dpaa2_io).ethrx_dpio_dev
29 #define DPAA2_PER_LCORE_ETHRX_PORTAL DPAA2_PER_LCORE_ETHRX_DPIO->sw_portal
31 #define DPAA2_PER_LCORE_DQRR_SIZE \
32 RTE_PER_LCORE(_dpaa2_io).dpio_dev->dpaa2_held_bufs.dqrr_size
33 #define DPAA2_PER_LCORE_DQRR_HELD \
34 RTE_PER_LCORE(_dpaa2_io).dpio_dev->dpaa2_held_bufs.dqrr_held
35 #define DPAA2_PER_LCORE_DQRR_MBUF(i) \
36 RTE_PER_LCORE(_dpaa2_io).dpio_dev->dpaa2_held_bufs.mbuf[i]
38 /* Variable to store DPAA2 DQRR size */
39 extern uint8_t dpaa2_dqrr_size;
40 /* Variable to store DPAA2 EQCR size */
41 extern uint8_t dpaa2_eqcr_size;
43 extern struct dpaa2_io_portal_t dpaa2_io_portal[RTE_MAX_LCORE];
45 /* Affine a DPIO portal to current processing thread */
47 int dpaa2_affine_qbman_swp(void);
49 /* Affine additional DPIO portal to current crypto processing thread */
51 int dpaa2_affine_qbman_ethrx_swp(void);
53 /* allocate memory for FQ - dq storage */
56 dpaa2_alloc_dq_storage(struct queue_storage_info_t *q_storage);
58 /* free memory for FQ- dq storage */
61 dpaa2_free_dq_storage(struct queue_storage_info_t *q_storage);
63 /* free the enqueue response descriptors */
66 dpaa2_free_eq_descriptors(void);
68 #endif /* _DPAA2_HW_DPIO_H_ */