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34 #ifndef _DPAA2_HW_PVT_H_
35 #define _DPAA2_HW_PVT_H_
37 #include <mc/fsl_mc_sys.h>
38 #include <fsl_qbman_portal.h>
40 #define DPAA2_DQRR_RING_SIZE 16
41 /** <Maximum number of slots available in RX ring*/
43 #define MC_PORTAL_INDEX 0
44 #define NUM_DPIO_REGIONS 2
45 #define NUM_DQS_PER_QUEUE 2
47 /* Maximum release/acquire from QBMAN */
48 #define DPAA2_MBUF_MAX_ACQ_REL 7
51 #define DPAA2_MBUF_HW_ANNOTATION 64
52 #define DPAA2_FD_PTA_SIZE 64
54 #if (DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) > RTE_PKTMBUF_HEADROOM
55 #error "Annotation requirement is more than RTE_PKTMBUF_HEADROOM"
58 /* we will re-use the HEADROOM for annotation in RX */
59 #define DPAA2_HW_BUF_RESERVE 0
60 #define DPAA2_PACKET_LAYOUT_ALIGN 64 /*changing from 256 */
62 struct dpaa2_dpio_dev {
63 TAILQ_ENTRY(dpaa2_dpio_dev) next;
64 /**< Pointer to Next device instance */
65 uint16_t index; /**< Index of a instance in the list */
66 rte_atomic16_t ref_count;
67 /**< How many thread contexts are sharing this.*/
68 struct fsl_mc_io *dpio; /** handle to DPIO portal object */
70 struct qbman_swp *sw_portal; /** SW portal object */
71 const struct qbman_result *dqrr[4];
72 /**< DQRR Entry for this SW portal */
73 void *mc_portal; /**< MC Portal for configuring this device */
74 uintptr_t qbman_portal_ce_paddr;
75 /**< Physical address of Cache Enabled Area */
76 uintptr_t ce_size; /**< Size of the CE region */
77 uintptr_t qbman_portal_ci_paddr;
78 /**< Physical address of Cache Inhibit Area */
79 uintptr_t ci_size; /**< Size of the CI region */
80 int32_t vfio_fd; /**< File descriptor received via VFIO */
81 int32_t hw_id; /**< An unique ID of this DPIO device instance */
84 struct dpaa2_dpbp_dev {
85 TAILQ_ENTRY(dpaa2_dpbp_dev) next;
86 /**< Pointer to Next device instance */
87 struct fsl_mc_io dpbp; /** handle to DPBP portal object */
89 rte_atomic16_t in_use;
90 uint32_t dpbp_id; /*HW ID for DPBP object */
93 struct queue_storage_info_t {
94 struct qbman_result *dq_storage[NUM_DQS_PER_QUEUE];
98 struct rte_mempool *mb_pool; /**< mbuf pool to populate RX ring. */
100 int32_t eventfd; /*!< Event Fd of this queue */
101 uint32_t fqid; /*!< Unique ID of this queue */
102 uint8_t tc_index; /*!< traffic class identifier */
103 uint16_t flow_id; /*!< To be used by DPAA2 frmework */
107 struct queue_storage_info_t *q_storage;
110 /*! Global MCP list */
111 extern void *(*rte_mcp_ptr_list);
113 struct dpaa2_dpbp_dev *dpaa2_alloc_dpbp_dev(void);
114 void dpaa2_free_dpbp_dev(struct dpaa2_dpbp_dev *dpbp);