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34 #ifndef _DPAA2_HW_PVT_H_
35 #define _DPAA2_HW_PVT_H_
37 #include <mc/fsl_mc_sys.h>
38 #include <fsl_qbman_portal.h>
46 #define DPAA2_DQRR_RING_SIZE 16
47 /** <Maximum number of slots available in RX ring*/
49 #define MC_PORTAL_INDEX 0
50 #define NUM_DPIO_REGIONS 2
51 #define NUM_DQS_PER_QUEUE 2
53 /* Maximum release/acquire from QBMAN */
54 #define DPAA2_MBUF_MAX_ACQ_REL 7
57 #define DPAA2_MBUF_HW_ANNOTATION 64
58 #define DPAA2_FD_PTA_SIZE 64
60 #if (DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) > RTE_PKTMBUF_HEADROOM
61 #error "Annotation requirement is more than RTE_PKTMBUF_HEADROOM"
64 /* we will re-use the HEADROOM for annotation in RX */
65 #define DPAA2_HW_BUF_RESERVE 0
66 #define DPAA2_PACKET_LAYOUT_ALIGN 64 /*changing from 256 */
68 struct dpaa2_dpio_dev {
69 TAILQ_ENTRY(dpaa2_dpio_dev) next;
70 /**< Pointer to Next device instance */
71 uint16_t index; /**< Index of a instance in the list */
72 rte_atomic16_t ref_count;
73 /**< How many thread contexts are sharing this.*/
74 struct fsl_mc_io *dpio; /** handle to DPIO portal object */
76 struct qbman_swp *sw_portal; /** SW portal object */
77 const struct qbman_result *dqrr[4];
78 /**< DQRR Entry for this SW portal */
79 void *mc_portal; /**< MC Portal for configuring this device */
80 uintptr_t qbman_portal_ce_paddr;
81 /**< Physical address of Cache Enabled Area */
82 uintptr_t ce_size; /**< Size of the CE region */
83 uintptr_t qbman_portal_ci_paddr;
84 /**< Physical address of Cache Inhibit Area */
85 uintptr_t ci_size; /**< Size of the CI region */
86 int32_t vfio_fd; /**< File descriptor received via VFIO */
87 int32_t hw_id; /**< An unique ID of this DPIO device instance */
90 struct dpaa2_dpbp_dev {
91 TAILQ_ENTRY(dpaa2_dpbp_dev) next;
92 /**< Pointer to Next device instance */
93 struct fsl_mc_io dpbp; /** handle to DPBP portal object */
95 rte_atomic16_t in_use;
96 uint32_t dpbp_id; /*HW ID for DPBP object */
99 struct queue_storage_info_t {
100 struct qbman_result *dq_storage[NUM_DQS_PER_QUEUE];
104 struct rte_mempool *mb_pool; /**< mbuf pool to populate RX ring. */
106 int32_t eventfd; /*!< Event Fd of this queue */
107 uint32_t fqid; /*!< Unique ID of this queue */
108 uint8_t tc_index; /*!< traffic class identifier */
109 uint16_t flow_id; /*!< To be used by DPAA2 frmework */
113 struct queue_storage_info_t *q_storage;
116 /*! Global MCP list */
117 extern void *(*rte_mcp_ptr_list);
119 struct dpaa2_dpbp_dev *dpaa2_alloc_dpbp_dev(void);
120 void dpaa2_free_dpbp_dev(struct dpaa2_dpbp_dev *dpbp);