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28 #ifndef _FSL_QBMAN_BASE_H
29 #define _FSL_QBMAN_BASE_H
31 typedef uint64_t dma_addr_t;
34 * DOC: QBMan basic structures
36 * The QBMan block descriptor, software portal descriptor and Frame descriptor
41 #define QMAN_REV_4000 0x04000000
42 #define QMAN_REV_4100 0x04010000
43 #define QMAN_REV_4101 0x04010001
46 * struct qbman_block_desc - qbman block descriptor structure
47 * @ccsr_reg_bar: CCSR register map.
48 * @irq_rerr: Recoverable error interrupt line.
49 * @irq_nrerr: Non-recoverable error interrupt line
51 * Descriptor for a QBMan instance on the SoC. On partitions/targets that do not
52 * control this QBMan instance, these values may simply be place-holders. The
53 * idea is simply that we be able to distinguish between them, eg. so that SWP
54 * descriptors can identify which QBMan instance they belong to.
56 struct qbman_block_desc {
62 enum qbman_eqcr_mode {
63 qman_eqcr_vb_ring = 2, /* Valid bit, with eqcr in ring mode */
64 qman_eqcr_vb_array, /* Valid bit, with eqcr in array mode */
68 * struct qbman_swp_desc - qbman software portal descriptor structure
69 * @block: The QBMan instance.
70 * @cena_bar: Cache-enabled portal register map.
71 * @cinh_bar: Cache-inhibited portal register map.
72 * @irq: -1 if unused (or unassigned)
73 * @idx: SWPs within a QBMan are indexed. -1 if opaque to the user.
74 * @qman_version: the qman version.
75 * @eqcr_mode: Select the eqcr mode, currently only valid bit ring mode and
76 * valid bit array mode are supported.
78 * Descriptor for a QBMan software portal, expressed in terms that make sense to
79 * the user context. Ie. on MC, this information is likely to be true-physical,
80 * and instantiated statically at compile-time. On GPP, this information is
81 * likely to be obtained via "discovery" over a partition's "MC bus"
82 * (ie. in response to a MC portal command), and would take into account any
83 * virtualisation of the GPP user's address space and/or interrupt numbering.
85 struct qbman_swp_desc {
86 const struct qbman_block_desc *block;
91 uint32_t qman_version;
92 enum qbman_eqcr_mode eqcr_mode;
95 /* Driver object for managing a QBMan portal */
99 * struct qbman_fd - basci structure for qbman frame descriptor
100 * @words: for easier/faster copying the whole FD structure.
101 * @addr_lo: the lower 32 bits of the address in FD.
102 * @addr_hi: the upper 32 bits of the address in FD.
103 * @len: the length field in FD.
104 * @bpid_offset: represent the bpid and offset fields in FD. offset in
105 * the MS 16 bits, BPID in the LS 16 bits.
106 * @frc: frame context
107 * @ctrl: the 32bit control bits including dd, sc,... va, err.
108 * @flc_lo: the lower 32bit of flow context.
109 * @flc_hi: the upper 32bits of flow context.
111 * Place-holder for FDs, we represent it via the simplest form that we need for
112 * now. Different overlays may be needed to support different options, etc. (It
113 * is impractical to define One True Struct, because the resulting encoding
114 * routines (lots of read-modify-writes) would be worst-case performance whether
115 * or not circumstances required them.)
117 * Note, as with all data-structures exchanged between software and hardware (be
118 * they located in the portal register map or DMA'd to and from main-memory),
119 * the driver ensures that the caller of the driver API sees the data-structures
120 * in host-endianness. "struct qbman_fd" is no exception. The 32-bit words
121 * contained within this structure are represented in host-endianness, even if
122 * hardware always treats them as little-endian. As such, if any of these fields
123 * are interpreted in a binary (rather than numerical) fashion by hardware
124 * blocks (eg. accelerators), then the user should be careful. We illustrate
127 * Suppose the desired behaviour of an accelerator is controlled by the "frc"
128 * field of the FDs that are sent to it. Suppose also that the behaviour desired
129 * by the user corresponds to an "frc" value which is expressed as the literal
130 * sequence of bytes 0xfe, 0xed, 0xab, and 0xba. So "frc" should be the 32-bit
131 * value in which 0xfe is the first byte and 0xba is the last byte, and as
132 * hardware is little-endian, this amounts to a 32-bit "value" of 0xbaabedfe. If
133 * the software is little-endian also, this can simply be achieved by setting
134 * frc=0xbaabedfe. On the other hand, if software is big-endian, it should set
135 * frc=0xfeedabba! The best away of avoiding trouble with this sort of thing is
136 * to treat the 32-bit words as numerical values, in which the offset of a field
137 * from the beginning of the first byte (as required or generated by hardware)
138 * is numerically encoded by a left-shift (ie. by raising the field to a
139 * corresponding power of 2). Ie. in the current example, software could set
140 * "frc" in the following way, and it would work correctly on both little-endian
141 * and big-endian operation;
142 * fd.frc = (0xfe << 0) | (0xed << 8) | (0xab << 16) | (0xba << 24);
147 struct qbman_fd_simple {
151 uint32_t bpid_offset;
160 #endif /* !_FSL_QBMAN_BASE_H */