1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
7 #include <fsl_qbman_base.h>
10 #if (__BYTE_ORDER__ != __ORDER_BIG_ENDIAN__) && \
11 (__BYTE_ORDER__ != __ORDER_LITTLE_ENDIAN__)
12 #error "Unknown endianness!"
18 #if defined(RTE_ARCH_ARM64)
19 #define dcbz(p) { asm volatile("dc zva, %0" : : "r" (p) : "memory"); }
20 #define lwsync() { asm volatile("dmb st" : : : "memory"); }
21 #define dcbf(p) { asm volatile("dc cvac, %0" : : "r"(p) : "memory"); }
22 #define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); }
23 static inline void prefetch_for_load(void *p)
25 asm volatile("prfm pldl1keep, [%0, #0]" : : "r" (p));
28 static inline void prefetch_for_store(void *p)
30 asm volatile("prfm pstl1keep, [%0, #0]" : : "r" (p));
32 #elif defined(RTE_ARCH_ARM)
33 #define dcbz(p) memset(p, 0, 64)
34 #define lwsync() { asm volatile("dmb st" : : : "memory"); }
35 #define dcbf(p) RTE_SET_USED(p)
36 #define dccivac(p) RTE_SET_USED(p)
37 #define prefetch_for_load(p) { asm volatile ("pld [%0]" : : "r" (p)); }
38 #define prefetch_for_store(p) { asm volatile ("pld [%0]" : : "r" (p)); }
41 #define dcbz(p) RTE_SET_USED(p)
43 #define dcbf(p) RTE_SET_USED(p)
44 #define dccivac(p) RTE_SET_USED(p)
45 static inline void prefetch_for_load(void *p)
49 static inline void prefetch_for_store(void *p)