1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
7 #include <linux/pci_regs.h>
8 #include <sys/eventfd.h>
9 #include <sys/socket.h>
10 #include <sys/ioctl.h>
16 #include <rte_bus_pci.h>
17 #include <rte_eal_memconfig.h>
18 #include <rte_malloc.h>
22 #include <rte_spinlock.h>
24 #include "eal_filesystem.h"
31 * PCI probing under linux (VFIO version)
33 * This code tries to determine if the PCI device is bound to VFIO driver,
34 * and initialize it (map BARs, set up interrupts) if that's the case.
36 * This file is only compiled if CONFIG_RTE_EAL_VFIO is set to "y".
40 * spinlock for device hot-unplug failure handling. If it try to access bus or
41 * device, such as handle sigbus on bus or handle memory failure for device
42 * just need to use this lock. It could protect the bus and the device to avoid
45 static rte_spinlock_t failure_handle_lock = RTE_SPINLOCK_INITIALIZER;
50 #define PAGE_SIZE (sysconf(_SC_PAGESIZE))
52 #define PAGE_MASK (~(PAGE_SIZE - 1))
54 static struct rte_tailq_elem rte_vfio_tailq = {
55 .name = "VFIO_RESOURCE_LIST",
57 EAL_REGISTER_TAILQ(rte_vfio_tailq)
60 pci_vfio_read_config(const struct rte_intr_handle *intr_handle,
61 void *buf, size_t len, off_t offs)
63 return pread64(intr_handle->vfio_dev_fd, buf, len,
64 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
68 pci_vfio_write_config(const struct rte_intr_handle *intr_handle,
69 const void *buf, size_t len, off_t offs)
71 return pwrite64(intr_handle->vfio_dev_fd, buf, len,
72 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
75 /* get PCI BAR number where MSI-X interrupts are */
77 pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
82 uint8_t cap_id, cap_offset;
84 /* read PCI capability pointer from config space */
85 ret = pread64(fd, ®, sizeof(reg),
86 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
88 if (ret != sizeof(reg)) {
89 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
94 /* we need first byte */
95 cap_offset = reg & 0xFF;
99 /* read PCI capability ID */
100 ret = pread64(fd, ®, sizeof(reg),
101 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
103 if (ret != sizeof(reg)) {
104 RTE_LOG(ERR, EAL, "Cannot read capability ID from PCI "
109 /* we need first byte */
112 /* if we haven't reached MSI-X, check next capability */
113 if (cap_id != PCI_CAP_ID_MSIX) {
114 ret = pread64(fd, ®, sizeof(reg),
115 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
117 if (ret != sizeof(reg)) {
118 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
123 /* we need second byte */
124 cap_offset = (reg & 0xFF00) >> 8;
128 /* else, read table offset */
130 /* table offset resides in the next 4 bytes */
131 ret = pread64(fd, ®, sizeof(reg),
132 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
134 if (ret != sizeof(reg)) {
135 RTE_LOG(ERR, EAL, "Cannot read table offset from PCI config "
140 ret = pread64(fd, &flags, sizeof(flags),
141 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
143 if (ret != sizeof(flags)) {
144 RTE_LOG(ERR, EAL, "Cannot read table flags from PCI config "
149 msix_table->bar_index = reg & RTE_PCI_MSIX_TABLE_BIR;
150 msix_table->offset = reg & RTE_PCI_MSIX_TABLE_OFFSET;
152 16 * (1 + (flags & RTE_PCI_MSIX_FLAGS_QSIZE));
160 /* set PCI bus mastering */
162 pci_vfio_set_bus_master(int dev_fd, bool op)
167 ret = pread64(dev_fd, ®, sizeof(reg),
168 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
170 if (ret != sizeof(reg)) {
171 RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
176 /* set the master bit */
177 reg |= PCI_COMMAND_MASTER;
179 reg &= ~(PCI_COMMAND_MASTER);
181 ret = pwrite64(dev_fd, ®, sizeof(reg),
182 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
185 if (ret != sizeof(reg)) {
186 RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
193 /* set up interrupt support (but not enable interrupts) */
195 pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)
197 int i, ret, intr_idx;
198 enum rte_intr_mode intr_mode;
200 /* default to invalid index */
201 intr_idx = VFIO_PCI_NUM_IRQS;
203 /* Get default / configured intr_mode */
204 intr_mode = rte_eal_vfio_intr_mode();
206 /* get interrupt type from internal config (MSI-X by default, can be
207 * overridden from the command line
210 case RTE_INTR_MODE_MSIX:
211 intr_idx = VFIO_PCI_MSIX_IRQ_INDEX;
213 case RTE_INTR_MODE_MSI:
214 intr_idx = VFIO_PCI_MSI_IRQ_INDEX;
216 case RTE_INTR_MODE_LEGACY:
217 intr_idx = VFIO_PCI_INTX_IRQ_INDEX;
219 /* don't do anything if we want to automatically determine interrupt type */
220 case RTE_INTR_MODE_NONE:
223 RTE_LOG(ERR, EAL, " unknown default interrupt type!\n");
227 /* start from MSI-X interrupt type */
228 for (i = VFIO_PCI_MSIX_IRQ_INDEX; i >= 0; i--) {
229 struct vfio_irq_info irq = { .argsz = sizeof(irq) };
232 /* skip interrupt modes we don't want */
233 if (intr_mode != RTE_INTR_MODE_NONE &&
239 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
241 RTE_LOG(ERR, EAL, " cannot get IRQ info, "
242 "error %i (%s)\n", errno, strerror(errno));
246 /* if this vector cannot be used with eventfd, fail if we explicitly
247 * specified interrupt type, otherwise continue */
248 if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0) {
249 if (intr_mode != RTE_INTR_MODE_NONE) {
251 " interrupt vector does not support eventfd!\n");
257 /* set up an eventfd for interrupts */
258 fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
260 RTE_LOG(ERR, EAL, " cannot set up eventfd, "
261 "error %i (%s)\n", errno, strerror(errno));
265 dev->intr_handle.fd = fd;
266 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
269 case VFIO_PCI_MSIX_IRQ_INDEX:
270 intr_mode = RTE_INTR_MODE_MSIX;
271 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
273 case VFIO_PCI_MSI_IRQ_INDEX:
274 intr_mode = RTE_INTR_MODE_MSI;
275 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSI;
277 case VFIO_PCI_INTX_IRQ_INDEX:
278 intr_mode = RTE_INTR_MODE_LEGACY;
279 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_LEGACY;
282 RTE_LOG(ERR, EAL, " unknown interrupt type!\n");
289 /* if we're here, we haven't found a suitable interrupt vector */
293 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
295 pci_vfio_req_handler(void *param)
299 struct rte_device *device = (struct rte_device *)param;
301 rte_spinlock_lock(&failure_handle_lock);
302 bus = rte_bus_find_by_device(device);
304 RTE_LOG(ERR, EAL, "Cannot find bus for device (%s)\n",
310 * vfio kernel module request user space to release allocated
311 * resources before device be deleted in kernel, so it can directly
312 * call the vfio bus hot-unplug handler to process it.
314 ret = bus->hot_unplug_handler(device);
317 "Can not handle hot-unplug for device (%s)\n",
320 rte_spinlock_unlock(&failure_handle_lock);
323 /* enable notifier (only enable req now) */
325 pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)
330 /* set up an eventfd for req notifier */
331 fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
333 RTE_LOG(ERR, EAL, "Cannot set up eventfd, error %i (%s)\n",
334 errno, strerror(errno));
338 dev->vfio_req_intr_handle.fd = fd;
339 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_VFIO_REQ;
340 dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
342 ret = rte_intr_callback_register(&dev->vfio_req_intr_handle,
343 pci_vfio_req_handler,
344 (void *)&dev->device);
346 RTE_LOG(ERR, EAL, "Fail to register req notifier handler.\n");
350 ret = rte_intr_enable(&dev->vfio_req_intr_handle);
352 RTE_LOG(ERR, EAL, "Fail to enable req notifier.\n");
353 ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
354 pci_vfio_req_handler,
355 (void *)&dev->device);
358 "Fail to unregister req notifier handler.\n");
366 dev->vfio_req_intr_handle.fd = -1;
367 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
368 dev->vfio_req_intr_handle.vfio_dev_fd = -1;
373 /* disable notifier (only disable req now) */
375 pci_vfio_disable_notifier(struct rte_pci_device *dev)
379 ret = rte_intr_disable(&dev->vfio_req_intr_handle);
381 RTE_LOG(ERR, EAL, "fail to disable req notifier.\n");
385 ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
386 pci_vfio_req_handler,
387 (void *)&dev->device);
390 "fail to unregister req notifier handler.\n");
394 close(dev->vfio_req_intr_handle.fd);
396 dev->vfio_req_intr_handle.fd = -1;
397 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
398 dev->vfio_req_intr_handle.vfio_dev_fd = -1;
405 pci_vfio_is_ioport_bar(int vfio_dev_fd, int bar_index)
410 ret = pread64(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar),
411 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX)
412 + PCI_BASE_ADDRESS_0 + bar_index*4);
413 if (ret != sizeof(ioport_bar)) {
414 RTE_LOG(ERR, EAL, "Cannot read command (%x) from config space!\n",
415 PCI_BASE_ADDRESS_0 + bar_index*4);
419 return (ioport_bar & PCI_BASE_ADDRESS_SPACE_IO) != 0;
423 pci_rte_vfio_setup_device(struct rte_pci_device *dev, int vfio_dev_fd)
425 if (pci_vfio_setup_interrupts(dev, vfio_dev_fd) != 0) {
426 RTE_LOG(ERR, EAL, "Error setting up interrupts!\n");
430 /* set bus mastering for the device */
431 if (pci_vfio_set_bus_master(vfio_dev_fd, true)) {
432 RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n");
437 * Reset the device. If the device is not capable of resetting,
438 * then it updates errno as EINVAL.
440 if (ioctl(vfio_dev_fd, VFIO_DEVICE_RESET) && errno != EINVAL) {
441 RTE_LOG(ERR, EAL, "Unable to reset device! Error: %d (%s)\n",
442 errno, strerror(errno));
450 pci_vfio_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res,
451 int bar_index, int additional_flags)
454 unsigned long offset, size;
457 struct pci_msix_table *msix_table = &vfio_res->msix_table;
458 struct pci_map *bar = &vfio_res->maps[bar_index];
464 if (msix_table->bar_index == bar_index) {
466 * VFIO will not let us map the MSI-X table,
467 * but we can map around it.
469 uint32_t table_start = msix_table->offset;
470 uint32_t table_end = table_start + msix_table->size;
471 table_end = (table_end + ~PAGE_MASK) & PAGE_MASK;
472 table_start &= PAGE_MASK;
474 if (table_start == 0 && table_end >= bar->size) {
475 /* Cannot map this BAR */
476 RTE_LOG(DEBUG, EAL, "Skipping BAR%d\n", bar_index);
482 memreg[0].offset = bar->offset;
483 memreg[0].size = table_start;
484 memreg[1].offset = bar->offset + table_end;
485 memreg[1].size = bar->size - table_end;
488 "Trying to map BAR%d that contains the MSI-X "
489 "table. Trying offsets: "
490 "0x%04lx:0x%04lx, 0x%04lx:0x%04lx\n", bar_index,
491 memreg[0].offset, memreg[0].size,
492 memreg[1].offset, memreg[1].size);
494 memreg[0].offset = bar->offset;
495 memreg[0].size = bar->size;
498 /* reserve the address using an inaccessible mapping */
499 bar_addr = mmap(bar->addr, bar->size, 0, MAP_PRIVATE |
500 MAP_ANONYMOUS | additional_flags, -1, 0);
501 if (bar_addr != MAP_FAILED) {
502 void *map_addr = NULL;
503 if (memreg[0].size) {
504 /* actual map of first part */
505 map_addr = pci_map_resource(bar_addr, vfio_dev_fd,
511 /* if there's a second part, try to map it */
512 if (map_addr != MAP_FAILED
513 && memreg[1].offset && memreg[1].size) {
514 void *second_addr = RTE_PTR_ADD(bar_addr,
516 (uintptr_t)bar->offset);
517 map_addr = pci_map_resource(second_addr,
524 if (map_addr == MAP_FAILED || !map_addr) {
525 munmap(bar_addr, bar->size);
526 bar_addr = MAP_FAILED;
527 RTE_LOG(ERR, EAL, "Failed to map pci BAR%d\n",
533 "Failed to create inaccessible mapping for BAR%d\n",
538 bar->addr = bar_addr;
543 * region info may contain capability headers, so we need to keep reallocating
544 * the memory until we match allocated memory size with argsz.
547 pci_vfio_get_region_info(int vfio_dev_fd, struct vfio_region_info **info,
550 struct vfio_region_info *ri;
551 size_t argsz = sizeof(*ri);
554 ri = malloc(sizeof(*ri));
556 RTE_LOG(ERR, EAL, "Cannot allocate memory for region info\n");
560 memset(ri, 0, argsz);
564 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ri);
569 if (ri->argsz != argsz) {
570 struct vfio_region_info *tmp;
573 tmp = realloc(ri, argsz);
576 /* realloc failed but the ri is still there */
578 RTE_LOG(ERR, EAL, "Cannot reallocate memory for region info\n");
589 static struct vfio_info_cap_header *
590 pci_vfio_info_cap(struct vfio_region_info *info, int cap)
592 struct vfio_info_cap_header *h;
595 if ((info->flags & RTE_VFIO_INFO_FLAG_CAPS) == 0) {
596 /* VFIO info does not advertise capabilities */
600 offset = VFIO_CAP_OFFSET(info);
601 while (offset != 0) {
602 h = RTE_PTR_ADD(info, offset);
611 pci_vfio_msix_is_mappable(int vfio_dev_fd, int msix_region)
613 struct vfio_region_info *info;
616 ret = pci_vfio_get_region_info(vfio_dev_fd, &info, msix_region);
620 ret = pci_vfio_info_cap(info, RTE_VFIO_CAP_MSIX_MAPPABLE) != NULL;
630 pci_vfio_map_resource_primary(struct rte_pci_device *dev)
632 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
633 char pci_addr[PATH_MAX] = {0};
635 struct rte_pci_addr *loc = &dev->addr;
637 struct mapped_pci_resource *vfio_res = NULL;
638 struct mapped_pci_res_list *vfio_res_list =
639 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
641 struct pci_map *maps;
643 dev->intr_handle.fd = -1;
644 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
645 dev->vfio_req_intr_handle.fd = -1;
648 /* store PCI address string */
649 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
650 loc->domain, loc->bus, loc->devid, loc->function);
652 ret = rte_vfio_setup_device(rte_pci_get_sysfs_path(), pci_addr,
653 &vfio_dev_fd, &device_info);
657 /* allocate vfio_res and get region info */
658 vfio_res = rte_zmalloc("VFIO_RES", sizeof(*vfio_res), 0);
659 if (vfio_res == NULL) {
661 "%s(): cannot store uio mmap details\n", __func__);
662 goto err_vfio_dev_fd;
664 memcpy(&vfio_res->pci_addr, &dev->addr, sizeof(vfio_res->pci_addr));
666 /* get number of registers (up to BAR5) */
667 vfio_res->nb_maps = RTE_MIN((int) device_info.num_regions,
668 VFIO_PCI_BAR5_REGION_INDEX + 1);
671 maps = vfio_res->maps;
673 vfio_res->msix_table.bar_index = -1;
674 /* get MSI-X BAR, if any (we have to know where it is because we can't
675 * easily mmap it when using VFIO)
677 ret = pci_vfio_get_msix_bar(vfio_dev_fd, &vfio_res->msix_table);
679 RTE_LOG(ERR, EAL, " %s cannot get MSI-X BAR number!\n",
683 /* if we found our MSI-X BAR region, check if we can mmap it */
684 if (vfio_res->msix_table.bar_index != -1) {
685 int ret = pci_vfio_msix_is_mappable(vfio_dev_fd,
686 vfio_res->msix_table.bar_index);
688 RTE_LOG(ERR, EAL, "Couldn't check if MSI-X BAR is mappable\n");
690 } else if (ret != 0) {
691 /* we can map it, so we don't care where it is */
692 RTE_LOG(DEBUG, EAL, "VFIO reports MSI-X BAR as mappable\n");
693 vfio_res->msix_table.bar_index = -1;
697 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
698 struct vfio_region_info *reg = NULL;
701 ret = pci_vfio_get_region_info(vfio_dev_fd, ®, i);
703 RTE_LOG(ERR, EAL, " %s cannot get device region info "
704 "error %i (%s)\n", pci_addr, errno,
709 /* chk for io port region */
710 ret = pci_vfio_is_ioport_bar(vfio_dev_fd, i);
715 RTE_LOG(INFO, EAL, "Ignore mapping IO port bar(%d)\n",
721 /* skip non-mmapable BARs */
722 if ((reg->flags & VFIO_REGION_INFO_FLAG_MMAP) == 0) {
727 /* try mapping somewhere close to the end of hugepages */
728 if (pci_map_addr == NULL)
729 pci_map_addr = pci_find_max_end_va();
731 bar_addr = pci_map_addr;
732 pci_map_addr = RTE_PTR_ADD(bar_addr, (size_t) reg->size);
734 maps[i].addr = bar_addr;
735 maps[i].offset = reg->offset;
736 maps[i].size = reg->size;
737 maps[i].path = NULL; /* vfio doesn't have per-resource paths */
739 ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0);
741 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n",
742 pci_addr, i, strerror(errno));
747 dev->mem_resource[i].addr = maps[i].addr;
752 if (pci_rte_vfio_setup_device(dev, vfio_dev_fd) < 0) {
753 RTE_LOG(ERR, EAL, " %s setup device failed\n", pci_addr);
757 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
758 if (pci_vfio_enable_notifier(dev, vfio_dev_fd) != 0) {
759 RTE_LOG(ERR, EAL, "Error setting up notifier!\n");
764 TAILQ_INSERT_TAIL(vfio_res_list, vfio_res, next);
775 pci_vfio_map_resource_secondary(struct rte_pci_device *dev)
777 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
778 char pci_addr[PATH_MAX] = {0};
780 struct rte_pci_addr *loc = &dev->addr;
782 struct mapped_pci_resource *vfio_res = NULL;
783 struct mapped_pci_res_list *vfio_res_list =
784 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
786 struct pci_map *maps;
788 dev->intr_handle.fd = -1;
789 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
790 dev->vfio_req_intr_handle.fd = -1;
793 /* store PCI address string */
794 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
795 loc->domain, loc->bus, loc->devid, loc->function);
797 ret = rte_vfio_setup_device(rte_pci_get_sysfs_path(), pci_addr,
798 &vfio_dev_fd, &device_info);
802 /* if we're in a secondary process, just find our tailq entry */
803 TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
804 if (rte_pci_addr_cmp(&vfio_res->pci_addr,
809 /* if we haven't found our tailq entry, something's wrong */
810 if (vfio_res == NULL) {
811 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
813 goto err_vfio_dev_fd;
817 maps = vfio_res->maps;
819 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
820 ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, MAP_FIXED);
822 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n",
823 pci_addr, i, strerror(errno));
824 goto err_vfio_dev_fd;
827 dev->mem_resource[i].addr = maps[i].addr;
830 /* we need save vfio_dev_fd, so it can be used during release */
831 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
832 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
833 dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
843 * map the PCI resources of a PCI device in virtual memory (VFIO version).
844 * primary and secondary processes follow almost exactly the same path
847 pci_vfio_map_resource(struct rte_pci_device *dev)
849 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
850 return pci_vfio_map_resource_primary(dev);
852 return pci_vfio_map_resource_secondary(dev);
855 static struct mapped_pci_resource *
856 find_and_unmap_vfio_resource(struct mapped_pci_res_list *vfio_res_list,
857 struct rte_pci_device *dev,
858 const char *pci_addr)
860 struct mapped_pci_resource *vfio_res = NULL;
861 struct pci_map *maps;
865 TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
866 if (rte_pci_addr_cmp(&vfio_res->pci_addr, &dev->addr))
871 if (vfio_res == NULL)
874 RTE_LOG(INFO, EAL, "Releasing pci mapped resource for %s\n",
877 maps = vfio_res->maps;
878 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
881 * We do not need to be aware of MSI-X table BAR mappings as
882 * when mapping. Just using current maps array is enough
885 RTE_LOG(INFO, EAL, "Calling pci_unmap_resource for %s at %p\n",
886 pci_addr, maps[i].addr);
887 pci_unmap_resource(maps[i].addr, maps[i].size);
895 pci_vfio_unmap_resource_primary(struct rte_pci_device *dev)
897 char pci_addr[PATH_MAX] = {0};
898 struct rte_pci_addr *loc = &dev->addr;
899 struct mapped_pci_resource *vfio_res = NULL;
900 struct mapped_pci_res_list *vfio_res_list;
903 /* store PCI address string */
904 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
905 loc->domain, loc->bus, loc->devid, loc->function);
907 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
908 ret = pci_vfio_disable_notifier(dev);
910 RTE_LOG(ERR, EAL, "fail to disable req notifier.\n");
915 if (close(dev->intr_handle.fd) < 0) {
916 RTE_LOG(INFO, EAL, "Error when closing eventfd file descriptor for %s\n",
921 if (pci_vfio_set_bus_master(dev->intr_handle.vfio_dev_fd, false)) {
922 RTE_LOG(ERR, EAL, " %s cannot unset bus mastering for PCI device!\n",
927 ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
928 dev->intr_handle.vfio_dev_fd);
931 "%s(): cannot release device\n", __func__);
936 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
937 vfio_res = find_and_unmap_vfio_resource(vfio_res_list, dev, pci_addr);
939 /* if we haven't found our tailq entry, something's wrong */
940 if (vfio_res == NULL) {
941 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
946 TAILQ_REMOVE(vfio_res_list, vfio_res, next);
952 pci_vfio_unmap_resource_secondary(struct rte_pci_device *dev)
954 char pci_addr[PATH_MAX] = {0};
955 struct rte_pci_addr *loc = &dev->addr;
956 struct mapped_pci_resource *vfio_res = NULL;
957 struct mapped_pci_res_list *vfio_res_list;
960 /* store PCI address string */
961 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
962 loc->domain, loc->bus, loc->devid, loc->function);
964 ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
965 dev->intr_handle.vfio_dev_fd);
968 "%s(): cannot release device\n", __func__);
973 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
974 vfio_res = find_and_unmap_vfio_resource(vfio_res_list, dev, pci_addr);
976 /* if we haven't found our tailq entry, something's wrong */
977 if (vfio_res == NULL) {
978 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
987 pci_vfio_unmap_resource(struct rte_pci_device *dev)
989 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
990 return pci_vfio_unmap_resource_primary(dev);
992 return pci_vfio_unmap_resource_secondary(dev);
996 pci_vfio_ioport_map(struct rte_pci_device *dev, int bar,
997 struct rte_pci_ioport *p)
999 if (bar < VFIO_PCI_BAR0_REGION_INDEX ||
1000 bar > VFIO_PCI_BAR5_REGION_INDEX) {
1001 RTE_LOG(ERR, EAL, "invalid bar (%d)!\n", bar);
1006 p->base = VFIO_GET_REGION_ADDR(bar);
1011 pci_vfio_ioport_read(struct rte_pci_ioport *p,
1012 void *data, size_t len, off_t offset)
1014 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
1016 if (pread64(intr_handle->vfio_dev_fd, data,
1017 len, p->base + offset) <= 0)
1019 "Can't read from PCI bar (%" PRIu64 ") : offset (%x)\n",
1020 VFIO_GET_REGION_IDX(p->base), (int)offset);
1024 pci_vfio_ioport_write(struct rte_pci_ioport *p,
1025 const void *data, size_t len, off_t offset)
1027 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
1029 if (pwrite64(intr_handle->vfio_dev_fd, data,
1030 len, p->base + offset) <= 0)
1032 "Can't write to PCI bar (%" PRIu64 ") : offset (%x)\n",
1033 VFIO_GET_REGION_IDX(p->base), (int)offset);
1037 pci_vfio_ioport_unmap(struct rte_pci_ioport *p)
1044 pci_vfio_is_enabled(void)
1046 return rte_vfio_is_enabled("vfio_pci");