1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
7 #include <linux/pci_regs.h>
8 #include <sys/eventfd.h>
9 #include <sys/socket.h>
10 #include <sys/ioctl.h>
16 #include <rte_bus_pci.h>
17 #include <rte_eal_paging.h>
18 #include <rte_malloc.h>
22 #include <rte_spinlock.h>
23 #include <rte_tailq.h>
25 #include "eal_filesystem.h"
32 * PCI probing under linux (VFIO version)
34 * This code tries to determine if the PCI device is bound to VFIO driver,
35 * and initialize it (map BARs, set up interrupts) if that's the case.
37 * This file is only compiled if CONFIG_RTE_EAL_VFIO is set to "y".
43 #define PAGE_SIZE (sysconf(_SC_PAGESIZE))
45 #define PAGE_MASK (~(PAGE_SIZE - 1))
47 static struct rte_tailq_elem rte_vfio_tailq = {
48 .name = "VFIO_RESOURCE_LIST",
50 EAL_REGISTER_TAILQ(rte_vfio_tailq)
53 pci_vfio_read_config(const struct rte_intr_handle *intr_handle,
54 void *buf, size_t len, off_t offs)
56 return pread64(intr_handle->vfio_dev_fd, buf, len,
57 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
61 pci_vfio_write_config(const struct rte_intr_handle *intr_handle,
62 const void *buf, size_t len, off_t offs)
64 return pwrite64(intr_handle->vfio_dev_fd, buf, len,
65 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
68 /* get PCI BAR number where MSI-X interrupts are */
70 pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
75 uint8_t cap_id, cap_offset;
77 /* read PCI capability pointer from config space */
78 ret = pread64(fd, ®, sizeof(reg),
79 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
81 if (ret != sizeof(reg)) {
82 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
87 /* we need first byte */
88 cap_offset = reg & 0xFF;
92 /* read PCI capability ID */
93 ret = pread64(fd, ®, sizeof(reg),
94 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
96 if (ret != sizeof(reg)) {
97 RTE_LOG(ERR, EAL, "Cannot read capability ID from PCI "
102 /* we need first byte */
105 /* if we haven't reached MSI-X, check next capability */
106 if (cap_id != PCI_CAP_ID_MSIX) {
107 ret = pread64(fd, ®, sizeof(reg),
108 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
110 if (ret != sizeof(reg)) {
111 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
116 /* we need second byte */
117 cap_offset = (reg & 0xFF00) >> 8;
121 /* else, read table offset */
123 /* table offset resides in the next 4 bytes */
124 ret = pread64(fd, ®, sizeof(reg),
125 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
127 if (ret != sizeof(reg)) {
128 RTE_LOG(ERR, EAL, "Cannot read table offset from PCI config "
133 ret = pread64(fd, &flags, sizeof(flags),
134 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
136 if (ret != sizeof(flags)) {
137 RTE_LOG(ERR, EAL, "Cannot read table flags from PCI config "
142 msix_table->bar_index = reg & RTE_PCI_MSIX_TABLE_BIR;
143 msix_table->offset = reg & RTE_PCI_MSIX_TABLE_OFFSET;
145 16 * (1 + (flags & RTE_PCI_MSIX_FLAGS_QSIZE));
153 /* enable PCI bus memory space */
155 pci_vfio_enable_bus_memory(int dev_fd)
160 ret = pread64(dev_fd, &cmd, sizeof(cmd),
161 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
164 if (ret != sizeof(cmd)) {
165 RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
169 if (cmd & PCI_COMMAND_MEMORY)
172 cmd |= PCI_COMMAND_MEMORY;
173 ret = pwrite64(dev_fd, &cmd, sizeof(cmd),
174 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
177 if (ret != sizeof(cmd)) {
178 RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
185 /* set PCI bus mastering */
187 pci_vfio_set_bus_master(int dev_fd, bool op)
192 ret = pread64(dev_fd, ®, sizeof(reg),
193 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
195 if (ret != sizeof(reg)) {
196 RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
201 /* set the master bit */
202 reg |= PCI_COMMAND_MASTER;
204 reg &= ~(PCI_COMMAND_MASTER);
206 ret = pwrite64(dev_fd, ®, sizeof(reg),
207 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
210 if (ret != sizeof(reg)) {
211 RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
218 /* set up interrupt support (but not enable interrupts) */
220 pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)
222 int i, ret, intr_idx;
223 enum rte_intr_mode intr_mode;
225 /* default to invalid index */
226 intr_idx = VFIO_PCI_NUM_IRQS;
228 /* Get default / configured intr_mode */
229 intr_mode = rte_eal_vfio_intr_mode();
231 /* get interrupt type from internal config (MSI-X by default, can be
232 * overridden from the command line
235 case RTE_INTR_MODE_MSIX:
236 intr_idx = VFIO_PCI_MSIX_IRQ_INDEX;
238 case RTE_INTR_MODE_MSI:
239 intr_idx = VFIO_PCI_MSI_IRQ_INDEX;
241 case RTE_INTR_MODE_LEGACY:
242 intr_idx = VFIO_PCI_INTX_IRQ_INDEX;
244 /* don't do anything if we want to automatically determine interrupt type */
245 case RTE_INTR_MODE_NONE:
248 RTE_LOG(ERR, EAL, " unknown default interrupt type!\n");
252 /* start from MSI-X interrupt type */
253 for (i = VFIO_PCI_MSIX_IRQ_INDEX; i >= 0; i--) {
254 struct vfio_irq_info irq = { .argsz = sizeof(irq) };
257 /* skip interrupt modes we don't want */
258 if (intr_mode != RTE_INTR_MODE_NONE &&
264 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
266 RTE_LOG(ERR, EAL, " cannot get IRQ info, "
267 "error %i (%s)\n", errno, strerror(errno));
271 /* if this vector cannot be used with eventfd, fail if we explicitly
272 * specified interrupt type, otherwise continue */
273 if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0) {
274 if (intr_mode != RTE_INTR_MODE_NONE) {
276 " interrupt vector does not support eventfd!\n");
282 /* set up an eventfd for interrupts */
283 fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
285 RTE_LOG(ERR, EAL, " cannot set up eventfd, "
286 "error %i (%s)\n", errno, strerror(errno));
290 dev->intr_handle.fd = fd;
291 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
294 case VFIO_PCI_MSIX_IRQ_INDEX:
295 intr_mode = RTE_INTR_MODE_MSIX;
296 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
298 case VFIO_PCI_MSI_IRQ_INDEX:
299 intr_mode = RTE_INTR_MODE_MSI;
300 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSI;
302 case VFIO_PCI_INTX_IRQ_INDEX:
303 intr_mode = RTE_INTR_MODE_LEGACY;
304 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_LEGACY;
307 RTE_LOG(ERR, EAL, " unknown interrupt type!\n");
314 /* if we're here, we haven't found a suitable interrupt vector */
318 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
320 * Spinlock for device hot-unplug failure handling.
321 * If it tries to access bus or device, such as handle sigbus on bus
322 * or handle memory failure for device, just need to use this lock.
323 * It could protect the bus and the device to avoid race condition.
325 static rte_spinlock_t failure_handle_lock = RTE_SPINLOCK_INITIALIZER;
328 pci_vfio_req_handler(void *param)
332 struct rte_device *device = (struct rte_device *)param;
334 rte_spinlock_lock(&failure_handle_lock);
335 bus = rte_bus_find_by_device(device);
337 RTE_LOG(ERR, EAL, "Cannot find bus for device (%s)\n",
343 * vfio kernel module request user space to release allocated
344 * resources before device be deleted in kernel, so it can directly
345 * call the vfio bus hot-unplug handler to process it.
347 ret = bus->hot_unplug_handler(device);
350 "Can not handle hot-unplug for device (%s)\n",
353 rte_spinlock_unlock(&failure_handle_lock);
356 /* enable notifier (only enable req now) */
358 pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)
363 /* set up an eventfd for req notifier */
364 fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
366 RTE_LOG(ERR, EAL, "Cannot set up eventfd, error %i (%s)\n",
367 errno, strerror(errno));
371 dev->vfio_req_intr_handle.fd = fd;
372 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_VFIO_REQ;
373 dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
375 ret = rte_intr_callback_register(&dev->vfio_req_intr_handle,
376 pci_vfio_req_handler,
377 (void *)&dev->device);
379 RTE_LOG(ERR, EAL, "Fail to register req notifier handler.\n");
383 ret = rte_intr_enable(&dev->vfio_req_intr_handle);
385 RTE_LOG(ERR, EAL, "Fail to enable req notifier.\n");
386 ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
387 pci_vfio_req_handler,
388 (void *)&dev->device);
391 "Fail to unregister req notifier handler.\n");
399 dev->vfio_req_intr_handle.fd = -1;
400 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
401 dev->vfio_req_intr_handle.vfio_dev_fd = -1;
406 /* disable notifier (only disable req now) */
408 pci_vfio_disable_notifier(struct rte_pci_device *dev)
412 ret = rte_intr_disable(&dev->vfio_req_intr_handle);
414 RTE_LOG(ERR, EAL, "fail to disable req notifier.\n");
418 ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
419 pci_vfio_req_handler,
420 (void *)&dev->device);
423 "fail to unregister req notifier handler.\n");
427 close(dev->vfio_req_intr_handle.fd);
429 dev->vfio_req_intr_handle.fd = -1;
430 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
431 dev->vfio_req_intr_handle.vfio_dev_fd = -1;
438 pci_vfio_is_ioport_bar(int vfio_dev_fd, int bar_index)
443 ret = pread64(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar),
444 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX)
445 + PCI_BASE_ADDRESS_0 + bar_index*4);
446 if (ret != sizeof(ioport_bar)) {
447 RTE_LOG(ERR, EAL, "Cannot read command (%x) from config space!\n",
448 PCI_BASE_ADDRESS_0 + bar_index*4);
452 return (ioport_bar & PCI_BASE_ADDRESS_SPACE_IO) != 0;
456 pci_rte_vfio_setup_device(struct rte_pci_device *dev, int vfio_dev_fd)
458 if (pci_vfio_setup_interrupts(dev, vfio_dev_fd) != 0) {
459 RTE_LOG(ERR, EAL, "Error setting up interrupts!\n");
463 if (pci_vfio_enable_bus_memory(vfio_dev_fd)) {
464 RTE_LOG(ERR, EAL, "Cannot enable bus memory!\n");
468 /* set bus mastering for the device */
469 if (pci_vfio_set_bus_master(vfio_dev_fd, true)) {
470 RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n");
475 * Reset the device. If the device is not capable of resetting,
476 * then it updates errno as EINVAL.
478 if (ioctl(vfio_dev_fd, VFIO_DEVICE_RESET) && errno != EINVAL) {
479 RTE_LOG(ERR, EAL, "Unable to reset device! Error: %d (%s)\n",
480 errno, strerror(errno));
488 pci_vfio_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res,
489 int bar_index, int additional_flags)
496 struct pci_msix_table *msix_table = &vfio_res->msix_table;
497 struct pci_map *bar = &vfio_res->maps[bar_index];
499 if (bar->size == 0) {
500 RTE_LOG(DEBUG, EAL, "Bar size is 0, skip BAR%d\n", bar_index);
504 if (msix_table->bar_index == bar_index) {
506 * VFIO will not let us map the MSI-X table,
507 * but we can map around it.
509 uint32_t table_start = msix_table->offset;
510 uint32_t table_end = table_start + msix_table->size;
511 table_end = RTE_ALIGN(table_end, PAGE_SIZE);
512 table_start = RTE_ALIGN_FLOOR(table_start, PAGE_SIZE);
514 /* If page-aligned start of MSI-X table is less than the
515 * actual MSI-X table start address, reassign to the actual
518 if (table_start < msix_table->offset)
519 table_start = msix_table->offset;
521 if (table_start == 0 && table_end >= bar->size) {
522 /* Cannot map this BAR */
523 RTE_LOG(DEBUG, EAL, "Skipping BAR%d\n", bar_index);
529 memreg[0].offset = bar->offset;
530 memreg[0].size = table_start;
531 if (bar->size < table_end) {
533 * If MSI-X table end is beyond BAR end, don't attempt
534 * to perform second mapping.
536 memreg[1].offset = 0;
539 memreg[1].offset = bar->offset + table_end;
540 memreg[1].size = bar->size - table_end;
544 "Trying to map BAR%d that contains the MSI-X "
545 "table. Trying offsets: "
546 "0x%04" PRIx64 ":0x%04zx, 0x%04" PRIx64 ":0x%04zx\n",
548 memreg[0].offset, memreg[0].size,
549 memreg[1].offset, memreg[1].size);
551 memreg[0].offset = bar->offset;
552 memreg[0].size = bar->size;
555 /* reserve the address using an inaccessible mapping */
556 bar_addr = mmap(bar->addr, bar->size, 0, MAP_PRIVATE |
557 MAP_ANONYMOUS | additional_flags, -1, 0);
558 if (bar_addr != MAP_FAILED) {
559 void *map_addr = NULL;
560 if (memreg[0].size) {
561 /* actual map of first part */
562 map_addr = pci_map_resource(bar_addr, vfio_dev_fd,
565 RTE_MAP_FORCE_ADDRESS);
568 /* if there's a second part, try to map it */
570 && memreg[1].offset && memreg[1].size) {
571 void *second_addr = RTE_PTR_ADD(bar_addr,
572 (uintptr_t)(memreg[1].offset -
574 map_addr = pci_map_resource(second_addr,
578 RTE_MAP_FORCE_ADDRESS);
581 if (map_addr == NULL) {
582 munmap(bar_addr, bar->size);
583 bar_addr = MAP_FAILED;
584 RTE_LOG(ERR, EAL, "Failed to map pci BAR%d\n",
590 "Failed to create inaccessible mapping for BAR%d\n",
595 bar->addr = bar_addr;
600 * region info may contain capability headers, so we need to keep reallocating
601 * the memory until we match allocated memory size with argsz.
604 pci_vfio_get_region_info(int vfio_dev_fd, struct vfio_region_info **info,
607 struct vfio_region_info *ri;
608 size_t argsz = sizeof(*ri);
611 ri = malloc(sizeof(*ri));
613 RTE_LOG(ERR, EAL, "Cannot allocate memory for region info\n");
617 memset(ri, 0, argsz);
621 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ri);
626 if (ri->argsz != argsz) {
627 struct vfio_region_info *tmp;
630 tmp = realloc(ri, argsz);
633 /* realloc failed but the ri is still there */
635 RTE_LOG(ERR, EAL, "Cannot reallocate memory for region info\n");
646 static struct vfio_info_cap_header *
647 pci_vfio_info_cap(struct vfio_region_info *info, int cap)
649 struct vfio_info_cap_header *h;
652 if ((info->flags & RTE_VFIO_INFO_FLAG_CAPS) == 0) {
653 /* VFIO info does not advertise capabilities */
657 offset = VFIO_CAP_OFFSET(info);
658 while (offset != 0) {
659 h = RTE_PTR_ADD(info, offset);
668 pci_vfio_msix_is_mappable(int vfio_dev_fd, int msix_region)
670 struct vfio_region_info *info;
673 ret = pci_vfio_get_region_info(vfio_dev_fd, &info, msix_region);
677 ret = pci_vfio_info_cap(info, RTE_VFIO_CAP_MSIX_MAPPABLE) != NULL;
687 pci_vfio_map_resource_primary(struct rte_pci_device *dev)
689 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
690 char pci_addr[PATH_MAX] = {0};
692 struct rte_pci_addr *loc = &dev->addr;
694 struct mapped_pci_resource *vfio_res = NULL;
695 struct mapped_pci_res_list *vfio_res_list =
696 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
698 struct pci_map *maps;
700 dev->intr_handle.fd = -1;
701 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
702 dev->vfio_req_intr_handle.fd = -1;
705 /* store PCI address string */
706 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
707 loc->domain, loc->bus, loc->devid, loc->function);
709 ret = rte_vfio_setup_device(rte_pci_get_sysfs_path(), pci_addr,
710 &vfio_dev_fd, &device_info);
714 /* allocate vfio_res and get region info */
715 vfio_res = rte_zmalloc("VFIO_RES", sizeof(*vfio_res), 0);
716 if (vfio_res == NULL) {
718 "%s(): cannot store vfio mmap details\n", __func__);
719 goto err_vfio_dev_fd;
721 memcpy(&vfio_res->pci_addr, &dev->addr, sizeof(vfio_res->pci_addr));
723 /* get number of registers (up to BAR5) */
724 vfio_res->nb_maps = RTE_MIN((int) device_info.num_regions,
725 VFIO_PCI_BAR5_REGION_INDEX + 1);
728 maps = vfio_res->maps;
730 vfio_res->msix_table.bar_index = -1;
731 /* get MSI-X BAR, if any (we have to know where it is because we can't
732 * easily mmap it when using VFIO)
734 ret = pci_vfio_get_msix_bar(vfio_dev_fd, &vfio_res->msix_table);
736 RTE_LOG(ERR, EAL, " %s cannot get MSI-X BAR number!\n",
740 /* if we found our MSI-X BAR region, check if we can mmap it */
741 if (vfio_res->msix_table.bar_index != -1) {
742 int ret = pci_vfio_msix_is_mappable(vfio_dev_fd,
743 vfio_res->msix_table.bar_index);
745 RTE_LOG(ERR, EAL, "Couldn't check if MSI-X BAR is mappable\n");
747 } else if (ret != 0) {
748 /* we can map it, so we don't care where it is */
749 RTE_LOG(DEBUG, EAL, "VFIO reports MSI-X BAR as mappable\n");
750 vfio_res->msix_table.bar_index = -1;
754 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
755 struct vfio_region_info *reg = NULL;
758 ret = pci_vfio_get_region_info(vfio_dev_fd, ®, i);
760 RTE_LOG(ERR, EAL, " %s cannot get device region info "
761 "error %i (%s)\n", pci_addr, errno,
766 /* chk for io port region */
767 ret = pci_vfio_is_ioport_bar(vfio_dev_fd, i);
772 RTE_LOG(INFO, EAL, "Ignore mapping IO port bar(%d)\n",
778 /* skip non-mmapable BARs */
779 if ((reg->flags & VFIO_REGION_INFO_FLAG_MMAP) == 0) {
784 /* try mapping somewhere close to the end of hugepages */
785 if (pci_map_addr == NULL)
786 pci_map_addr = pci_find_max_end_va();
788 bar_addr = pci_map_addr;
789 pci_map_addr = RTE_PTR_ADD(bar_addr, (size_t) reg->size);
791 pci_map_addr = RTE_PTR_ALIGN(pci_map_addr,
792 sysconf(_SC_PAGE_SIZE));
794 maps[i].addr = bar_addr;
795 maps[i].offset = reg->offset;
796 maps[i].size = reg->size;
797 maps[i].path = NULL; /* vfio doesn't have per-resource paths */
799 ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0);
801 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n",
802 pci_addr, i, strerror(errno));
807 dev->mem_resource[i].addr = maps[i].addr;
812 if (pci_rte_vfio_setup_device(dev, vfio_dev_fd) < 0) {
813 RTE_LOG(ERR, EAL, " %s setup device failed\n", pci_addr);
817 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
818 if (pci_vfio_enable_notifier(dev, vfio_dev_fd) != 0) {
819 RTE_LOG(ERR, EAL, "Error setting up notifier!\n");
824 TAILQ_INSERT_TAIL(vfio_res_list, vfio_res, next);
835 pci_vfio_map_resource_secondary(struct rte_pci_device *dev)
837 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
838 char pci_addr[PATH_MAX] = {0};
840 struct rte_pci_addr *loc = &dev->addr;
842 struct mapped_pci_resource *vfio_res = NULL;
843 struct mapped_pci_res_list *vfio_res_list =
844 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
846 struct pci_map *maps;
848 dev->intr_handle.fd = -1;
849 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
850 dev->vfio_req_intr_handle.fd = -1;
853 /* store PCI address string */
854 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
855 loc->domain, loc->bus, loc->devid, loc->function);
857 /* if we're in a secondary process, just find our tailq entry */
858 TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
859 if (rte_pci_addr_cmp(&vfio_res->pci_addr,
864 /* if we haven't found our tailq entry, something's wrong */
865 if (vfio_res == NULL) {
866 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
871 ret = rte_vfio_setup_device(rte_pci_get_sysfs_path(), pci_addr,
872 &vfio_dev_fd, &device_info);
877 maps = vfio_res->maps;
879 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
880 ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, MAP_FIXED);
882 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n",
883 pci_addr, i, strerror(errno));
884 goto err_vfio_dev_fd;
887 dev->mem_resource[i].addr = maps[i].addr;
890 /* we need save vfio_dev_fd, so it can be used during release */
891 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
892 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
893 dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
903 * map the PCI resources of a PCI device in virtual memory (VFIO version).
904 * primary and secondary processes follow almost exactly the same path
907 pci_vfio_map_resource(struct rte_pci_device *dev)
909 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
910 return pci_vfio_map_resource_primary(dev);
912 return pci_vfio_map_resource_secondary(dev);
915 static struct mapped_pci_resource *
916 find_and_unmap_vfio_resource(struct mapped_pci_res_list *vfio_res_list,
917 struct rte_pci_device *dev,
918 const char *pci_addr)
920 struct mapped_pci_resource *vfio_res = NULL;
921 struct pci_map *maps;
925 TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
926 if (rte_pci_addr_cmp(&vfio_res->pci_addr, &dev->addr))
931 if (vfio_res == NULL)
934 RTE_LOG(INFO, EAL, "Releasing pci mapped resource for %s\n",
937 maps = vfio_res->maps;
938 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
941 * We do not need to be aware of MSI-X table BAR mappings as
942 * when mapping. Just using current maps array is enough
945 RTE_LOG(INFO, EAL, "Calling pci_unmap_resource for %s at %p\n",
946 pci_addr, maps[i].addr);
947 pci_unmap_resource(maps[i].addr, maps[i].size);
955 pci_vfio_unmap_resource_primary(struct rte_pci_device *dev)
957 char pci_addr[PATH_MAX] = {0};
958 struct rte_pci_addr *loc = &dev->addr;
959 struct mapped_pci_resource *vfio_res = NULL;
960 struct mapped_pci_res_list *vfio_res_list;
963 /* store PCI address string */
964 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
965 loc->domain, loc->bus, loc->devid, loc->function);
967 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
968 ret = pci_vfio_disable_notifier(dev);
970 RTE_LOG(ERR, EAL, "fail to disable req notifier.\n");
975 if (close(dev->intr_handle.fd) < 0) {
976 RTE_LOG(INFO, EAL, "Error when closing eventfd file descriptor for %s\n",
981 if (pci_vfio_set_bus_master(dev->intr_handle.vfio_dev_fd, false)) {
982 RTE_LOG(ERR, EAL, " %s cannot unset bus mastering for PCI device!\n",
987 ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
988 dev->intr_handle.vfio_dev_fd);
991 "%s(): cannot release device\n", __func__);
996 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
997 vfio_res = find_and_unmap_vfio_resource(vfio_res_list, dev, pci_addr);
999 /* if we haven't found our tailq entry, something's wrong */
1000 if (vfio_res == NULL) {
1001 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
1006 TAILQ_REMOVE(vfio_res_list, vfio_res, next);
1012 pci_vfio_unmap_resource_secondary(struct rte_pci_device *dev)
1014 char pci_addr[PATH_MAX] = {0};
1015 struct rte_pci_addr *loc = &dev->addr;
1016 struct mapped_pci_resource *vfio_res = NULL;
1017 struct mapped_pci_res_list *vfio_res_list;
1020 /* store PCI address string */
1021 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
1022 loc->domain, loc->bus, loc->devid, loc->function);
1024 ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
1025 dev->intr_handle.vfio_dev_fd);
1028 "%s(): cannot release device\n", __func__);
1033 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
1034 vfio_res = find_and_unmap_vfio_resource(vfio_res_list, dev, pci_addr);
1036 /* if we haven't found our tailq entry, something's wrong */
1037 if (vfio_res == NULL) {
1038 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
1047 pci_vfio_unmap_resource(struct rte_pci_device *dev)
1049 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1050 return pci_vfio_unmap_resource_primary(dev);
1052 return pci_vfio_unmap_resource_secondary(dev);
1056 pci_vfio_ioport_map(struct rte_pci_device *dev, int bar,
1057 struct rte_pci_ioport *p)
1059 if (bar < VFIO_PCI_BAR0_REGION_INDEX ||
1060 bar > VFIO_PCI_BAR5_REGION_INDEX) {
1061 RTE_LOG(ERR, EAL, "invalid bar (%d)!\n", bar);
1066 p->base = VFIO_GET_REGION_ADDR(bar);
1071 pci_vfio_ioport_read(struct rte_pci_ioport *p,
1072 void *data, size_t len, off_t offset)
1074 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
1076 if (pread64(intr_handle->vfio_dev_fd, data,
1077 len, p->base + offset) <= 0)
1079 "Can't read from PCI bar (%" PRIu64 ") : offset (%x)\n",
1080 VFIO_GET_REGION_IDX(p->base), (int)offset);
1084 pci_vfio_ioport_write(struct rte_pci_ioport *p,
1085 const void *data, size_t len, off_t offset)
1087 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
1089 if (pwrite64(intr_handle->vfio_dev_fd, data,
1090 len, p->base + offset) <= 0)
1092 "Can't write to PCI bar (%" PRIu64 ") : offset (%x)\n",
1093 VFIO_GET_REGION_IDX(p->base), (int)offset);
1097 pci_vfio_ioport_unmap(struct rte_pci_ioport *p)
1104 pci_vfio_is_enabled(void)
1106 return rte_vfio_is_enabled("vfio_pci");