1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
7 #include <linux/pci_regs.h>
8 #include <sys/eventfd.h>
9 #include <sys/socket.h>
10 #include <sys/ioctl.h>
16 #include <rte_bus_pci.h>
17 #include <rte_eal_memconfig.h>
18 #include <rte_malloc.h>
22 #include <rte_spinlock.h>
23 #include <rte_tailq.h>
25 #include "eal_filesystem.h"
32 * PCI probing under linux (VFIO version)
34 * This code tries to determine if the PCI device is bound to VFIO driver,
35 * and initialize it (map BARs, set up interrupts) if that's the case.
37 * This file is only compiled if CONFIG_RTE_EAL_VFIO is set to "y".
43 #define PAGE_SIZE (sysconf(_SC_PAGESIZE))
45 #define PAGE_MASK (~(PAGE_SIZE - 1))
47 static struct rte_tailq_elem rte_vfio_tailq = {
48 .name = "VFIO_RESOURCE_LIST",
50 EAL_REGISTER_TAILQ(rte_vfio_tailq)
53 pci_vfio_read_config(const struct rte_intr_handle *intr_handle,
54 void *buf, size_t len, off_t offs)
56 return pread64(intr_handle->vfio_dev_fd, buf, len,
57 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
61 pci_vfio_write_config(const struct rte_intr_handle *intr_handle,
62 const void *buf, size_t len, off_t offs)
64 return pwrite64(intr_handle->vfio_dev_fd, buf, len,
65 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
68 /* get PCI BAR number where MSI-X interrupts are */
70 pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
75 uint8_t cap_id, cap_offset;
77 /* read PCI capability pointer from config space */
78 ret = pread64(fd, ®, sizeof(reg),
79 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
81 if (ret != sizeof(reg)) {
82 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
87 /* we need first byte */
88 cap_offset = reg & 0xFF;
92 /* read PCI capability ID */
93 ret = pread64(fd, ®, sizeof(reg),
94 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
96 if (ret != sizeof(reg)) {
97 RTE_LOG(ERR, EAL, "Cannot read capability ID from PCI "
102 /* we need first byte */
105 /* if we haven't reached MSI-X, check next capability */
106 if (cap_id != PCI_CAP_ID_MSIX) {
107 ret = pread64(fd, ®, sizeof(reg),
108 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
110 if (ret != sizeof(reg)) {
111 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
116 /* we need second byte */
117 cap_offset = (reg & 0xFF00) >> 8;
121 /* else, read table offset */
123 /* table offset resides in the next 4 bytes */
124 ret = pread64(fd, ®, sizeof(reg),
125 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
127 if (ret != sizeof(reg)) {
128 RTE_LOG(ERR, EAL, "Cannot read table offset from PCI config "
133 ret = pread64(fd, &flags, sizeof(flags),
134 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
136 if (ret != sizeof(flags)) {
137 RTE_LOG(ERR, EAL, "Cannot read table flags from PCI config "
142 msix_table->bar_index = reg & RTE_PCI_MSIX_TABLE_BIR;
143 msix_table->offset = reg & RTE_PCI_MSIX_TABLE_OFFSET;
145 16 * (1 + (flags & RTE_PCI_MSIX_FLAGS_QSIZE));
153 /* set PCI bus mastering */
155 pci_vfio_set_bus_master(int dev_fd, bool op)
160 ret = pread64(dev_fd, ®, sizeof(reg),
161 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
163 if (ret != sizeof(reg)) {
164 RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
169 /* set the master bit */
170 reg |= PCI_COMMAND_MASTER;
172 reg &= ~(PCI_COMMAND_MASTER);
174 ret = pwrite64(dev_fd, ®, sizeof(reg),
175 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
178 if (ret != sizeof(reg)) {
179 RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
186 /* set up interrupt support (but not enable interrupts) */
188 pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)
190 int i, ret, intr_idx;
191 enum rte_intr_mode intr_mode;
193 /* default to invalid index */
194 intr_idx = VFIO_PCI_NUM_IRQS;
196 /* Get default / configured intr_mode */
197 intr_mode = rte_eal_vfio_intr_mode();
199 /* get interrupt type from internal config (MSI-X by default, can be
200 * overridden from the command line
203 case RTE_INTR_MODE_MSIX:
204 intr_idx = VFIO_PCI_MSIX_IRQ_INDEX;
206 case RTE_INTR_MODE_MSI:
207 intr_idx = VFIO_PCI_MSI_IRQ_INDEX;
209 case RTE_INTR_MODE_LEGACY:
210 intr_idx = VFIO_PCI_INTX_IRQ_INDEX;
212 /* don't do anything if we want to automatically determine interrupt type */
213 case RTE_INTR_MODE_NONE:
216 RTE_LOG(ERR, EAL, " unknown default interrupt type!\n");
220 /* start from MSI-X interrupt type */
221 for (i = VFIO_PCI_MSIX_IRQ_INDEX; i >= 0; i--) {
222 struct vfio_irq_info irq = { .argsz = sizeof(irq) };
225 /* skip interrupt modes we don't want */
226 if (intr_mode != RTE_INTR_MODE_NONE &&
232 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
234 RTE_LOG(ERR, EAL, " cannot get IRQ info, "
235 "error %i (%s)\n", errno, strerror(errno));
239 /* if this vector cannot be used with eventfd, fail if we explicitly
240 * specified interrupt type, otherwise continue */
241 if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0) {
242 if (intr_mode != RTE_INTR_MODE_NONE) {
244 " interrupt vector does not support eventfd!\n");
250 /* set up an eventfd for interrupts */
251 fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
253 RTE_LOG(ERR, EAL, " cannot set up eventfd, "
254 "error %i (%s)\n", errno, strerror(errno));
258 dev->intr_handle.fd = fd;
259 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
262 case VFIO_PCI_MSIX_IRQ_INDEX:
263 intr_mode = RTE_INTR_MODE_MSIX;
264 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
266 case VFIO_PCI_MSI_IRQ_INDEX:
267 intr_mode = RTE_INTR_MODE_MSI;
268 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSI;
270 case VFIO_PCI_INTX_IRQ_INDEX:
271 intr_mode = RTE_INTR_MODE_LEGACY;
272 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_LEGACY;
275 RTE_LOG(ERR, EAL, " unknown interrupt type!\n");
282 /* if we're here, we haven't found a suitable interrupt vector */
286 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
288 * Spinlock for device hot-unplug failure handling.
289 * If it tries to access bus or device, such as handle sigbus on bus
290 * or handle memory failure for device, just need to use this lock.
291 * It could protect the bus and the device to avoid race condition.
293 static rte_spinlock_t failure_handle_lock = RTE_SPINLOCK_INITIALIZER;
296 pci_vfio_req_handler(void *param)
300 struct rte_device *device = (struct rte_device *)param;
302 rte_spinlock_lock(&failure_handle_lock);
303 bus = rte_bus_find_by_device(device);
305 RTE_LOG(ERR, EAL, "Cannot find bus for device (%s)\n",
311 * vfio kernel module request user space to release allocated
312 * resources before device be deleted in kernel, so it can directly
313 * call the vfio bus hot-unplug handler to process it.
315 ret = bus->hot_unplug_handler(device);
318 "Can not handle hot-unplug for device (%s)\n",
321 rte_spinlock_unlock(&failure_handle_lock);
324 /* enable notifier (only enable req now) */
326 pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)
331 /* set up an eventfd for req notifier */
332 fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
334 RTE_LOG(ERR, EAL, "Cannot set up eventfd, error %i (%s)\n",
335 errno, strerror(errno));
339 dev->vfio_req_intr_handle.fd = fd;
340 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_VFIO_REQ;
341 dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
343 ret = rte_intr_callback_register(&dev->vfio_req_intr_handle,
344 pci_vfio_req_handler,
345 (void *)&dev->device);
347 RTE_LOG(ERR, EAL, "Fail to register req notifier handler.\n");
351 ret = rte_intr_enable(&dev->vfio_req_intr_handle);
353 RTE_LOG(ERR, EAL, "Fail to enable req notifier.\n");
354 ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
355 pci_vfio_req_handler,
356 (void *)&dev->device);
359 "Fail to unregister req notifier handler.\n");
367 dev->vfio_req_intr_handle.fd = -1;
368 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
369 dev->vfio_req_intr_handle.vfio_dev_fd = -1;
374 /* disable notifier (only disable req now) */
376 pci_vfio_disable_notifier(struct rte_pci_device *dev)
380 ret = rte_intr_disable(&dev->vfio_req_intr_handle);
382 RTE_LOG(ERR, EAL, "fail to disable req notifier.\n");
386 ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
387 pci_vfio_req_handler,
388 (void *)&dev->device);
391 "fail to unregister req notifier handler.\n");
395 close(dev->vfio_req_intr_handle.fd);
397 dev->vfio_req_intr_handle.fd = -1;
398 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
399 dev->vfio_req_intr_handle.vfio_dev_fd = -1;
406 pci_vfio_is_ioport_bar(int vfio_dev_fd, int bar_index)
411 ret = pread64(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar),
412 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX)
413 + PCI_BASE_ADDRESS_0 + bar_index*4);
414 if (ret != sizeof(ioport_bar)) {
415 RTE_LOG(ERR, EAL, "Cannot read command (%x) from config space!\n",
416 PCI_BASE_ADDRESS_0 + bar_index*4);
420 return (ioport_bar & PCI_BASE_ADDRESS_SPACE_IO) != 0;
424 pci_rte_vfio_setup_device(struct rte_pci_device *dev, int vfio_dev_fd)
426 if (pci_vfio_setup_interrupts(dev, vfio_dev_fd) != 0) {
427 RTE_LOG(ERR, EAL, "Error setting up interrupts!\n");
431 /* set bus mastering for the device */
432 if (pci_vfio_set_bus_master(vfio_dev_fd, true)) {
433 RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n");
438 * Reset the device. If the device is not capable of resetting,
439 * then it updates errno as EINVAL.
441 if (ioctl(vfio_dev_fd, VFIO_DEVICE_RESET) && errno != EINVAL) {
442 RTE_LOG(ERR, EAL, "Unable to reset device! Error: %d (%s)\n",
443 errno, strerror(errno));
451 pci_vfio_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res,
452 int bar_index, int additional_flags)
455 unsigned long offset, size;
458 struct pci_msix_table *msix_table = &vfio_res->msix_table;
459 struct pci_map *bar = &vfio_res->maps[bar_index];
461 if (bar->size == 0) {
462 RTE_LOG(DEBUG, EAL, "Bar size is 0, skip BAR%d\n", bar_index);
466 if (msix_table->bar_index == bar_index) {
468 * VFIO will not let us map the MSI-X table,
469 * but we can map around it.
471 uint32_t table_start = msix_table->offset;
472 uint32_t table_end = table_start + msix_table->size;
473 table_end = RTE_ALIGN(table_end, PAGE_SIZE);
474 table_start = RTE_ALIGN_FLOOR(table_start, PAGE_SIZE);
476 /* If page-aligned start of MSI-X table is less than the
477 * actual MSI-X table start address, reassign to the actual
480 if (table_start < msix_table->offset)
481 table_start = msix_table->offset;
483 if (table_start == 0 && table_end >= bar->size) {
484 /* Cannot map this BAR */
485 RTE_LOG(DEBUG, EAL, "Skipping BAR%d\n", bar_index);
491 memreg[0].offset = bar->offset;
492 memreg[0].size = table_start;
493 if (bar->size < table_end) {
495 * If MSI-X table end is beyond BAR end, don't attempt
496 * to perform second mapping.
498 memreg[1].offset = 0;
501 memreg[1].offset = bar->offset + table_end;
502 memreg[1].size = bar->size - table_end;
506 "Trying to map BAR%d that contains the MSI-X "
507 "table. Trying offsets: "
508 "0x%04lx:0x%04lx, 0x%04lx:0x%04lx\n", bar_index,
509 memreg[0].offset, memreg[0].size,
510 memreg[1].offset, memreg[1].size);
512 memreg[0].offset = bar->offset;
513 memreg[0].size = bar->size;
516 /* reserve the address using an inaccessible mapping */
517 bar_addr = mmap(bar->addr, bar->size, 0, MAP_PRIVATE |
518 MAP_ANONYMOUS | additional_flags, -1, 0);
519 if (bar_addr != MAP_FAILED) {
520 void *map_addr = NULL;
521 if (memreg[0].size) {
522 /* actual map of first part */
523 map_addr = pci_map_resource(bar_addr, vfio_dev_fd,
529 /* if there's a second part, try to map it */
530 if (map_addr != MAP_FAILED
531 && memreg[1].offset && memreg[1].size) {
532 void *second_addr = RTE_PTR_ADD(bar_addr,
534 (uintptr_t)bar->offset);
535 map_addr = pci_map_resource(second_addr,
542 if (map_addr == MAP_FAILED || !map_addr) {
543 munmap(bar_addr, bar->size);
544 bar_addr = MAP_FAILED;
545 RTE_LOG(ERR, EAL, "Failed to map pci BAR%d\n",
551 "Failed to create inaccessible mapping for BAR%d\n",
556 bar->addr = bar_addr;
561 * region info may contain capability headers, so we need to keep reallocating
562 * the memory until we match allocated memory size with argsz.
565 pci_vfio_get_region_info(int vfio_dev_fd, struct vfio_region_info **info,
568 struct vfio_region_info *ri;
569 size_t argsz = sizeof(*ri);
572 ri = malloc(sizeof(*ri));
574 RTE_LOG(ERR, EAL, "Cannot allocate memory for region info\n");
578 memset(ri, 0, argsz);
582 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ri);
587 if (ri->argsz != argsz) {
588 struct vfio_region_info *tmp;
591 tmp = realloc(ri, argsz);
594 /* realloc failed but the ri is still there */
596 RTE_LOG(ERR, EAL, "Cannot reallocate memory for region info\n");
607 static struct vfio_info_cap_header *
608 pci_vfio_info_cap(struct vfio_region_info *info, int cap)
610 struct vfio_info_cap_header *h;
613 if ((info->flags & RTE_VFIO_INFO_FLAG_CAPS) == 0) {
614 /* VFIO info does not advertise capabilities */
618 offset = VFIO_CAP_OFFSET(info);
619 while (offset != 0) {
620 h = RTE_PTR_ADD(info, offset);
629 pci_vfio_msix_is_mappable(int vfio_dev_fd, int msix_region)
631 struct vfio_region_info *info;
634 ret = pci_vfio_get_region_info(vfio_dev_fd, &info, msix_region);
638 ret = pci_vfio_info_cap(info, RTE_VFIO_CAP_MSIX_MAPPABLE) != NULL;
648 pci_vfio_map_resource_primary(struct rte_pci_device *dev)
650 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
651 char pci_addr[PATH_MAX] = {0};
653 struct rte_pci_addr *loc = &dev->addr;
655 struct mapped_pci_resource *vfio_res = NULL;
656 struct mapped_pci_res_list *vfio_res_list =
657 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
659 struct pci_map *maps;
661 dev->intr_handle.fd = -1;
662 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
663 dev->vfio_req_intr_handle.fd = -1;
666 /* store PCI address string */
667 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
668 loc->domain, loc->bus, loc->devid, loc->function);
670 ret = rte_vfio_setup_device(rte_pci_get_sysfs_path(), pci_addr,
671 &vfio_dev_fd, &device_info);
675 /* allocate vfio_res and get region info */
676 vfio_res = rte_zmalloc("VFIO_RES", sizeof(*vfio_res), 0);
677 if (vfio_res == NULL) {
679 "%s(): cannot store vfio mmap details\n", __func__);
680 goto err_vfio_dev_fd;
682 memcpy(&vfio_res->pci_addr, &dev->addr, sizeof(vfio_res->pci_addr));
684 /* get number of registers (up to BAR5) */
685 vfio_res->nb_maps = RTE_MIN((int) device_info.num_regions,
686 VFIO_PCI_BAR5_REGION_INDEX + 1);
689 maps = vfio_res->maps;
691 vfio_res->msix_table.bar_index = -1;
692 /* get MSI-X BAR, if any (we have to know where it is because we can't
693 * easily mmap it when using VFIO)
695 ret = pci_vfio_get_msix_bar(vfio_dev_fd, &vfio_res->msix_table);
697 RTE_LOG(ERR, EAL, " %s cannot get MSI-X BAR number!\n",
701 /* if we found our MSI-X BAR region, check if we can mmap it */
702 if (vfio_res->msix_table.bar_index != -1) {
703 int ret = pci_vfio_msix_is_mappable(vfio_dev_fd,
704 vfio_res->msix_table.bar_index);
706 RTE_LOG(ERR, EAL, "Couldn't check if MSI-X BAR is mappable\n");
708 } else if (ret != 0) {
709 /* we can map it, so we don't care where it is */
710 RTE_LOG(DEBUG, EAL, "VFIO reports MSI-X BAR as mappable\n");
711 vfio_res->msix_table.bar_index = -1;
715 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
716 struct vfio_region_info *reg = NULL;
719 ret = pci_vfio_get_region_info(vfio_dev_fd, ®, i);
721 RTE_LOG(ERR, EAL, " %s cannot get device region info "
722 "error %i (%s)\n", pci_addr, errno,
727 /* chk for io port region */
728 ret = pci_vfio_is_ioport_bar(vfio_dev_fd, i);
733 RTE_LOG(INFO, EAL, "Ignore mapping IO port bar(%d)\n",
739 /* skip non-mmapable BARs */
740 if ((reg->flags & VFIO_REGION_INFO_FLAG_MMAP) == 0) {
745 /* try mapping somewhere close to the end of hugepages */
746 if (pci_map_addr == NULL)
747 pci_map_addr = pci_find_max_end_va();
749 bar_addr = pci_map_addr;
750 pci_map_addr = RTE_PTR_ADD(bar_addr, (size_t) reg->size);
752 maps[i].addr = bar_addr;
753 maps[i].offset = reg->offset;
754 maps[i].size = reg->size;
755 maps[i].path = NULL; /* vfio doesn't have per-resource paths */
757 ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0);
759 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n",
760 pci_addr, i, strerror(errno));
765 dev->mem_resource[i].addr = maps[i].addr;
770 if (pci_rte_vfio_setup_device(dev, vfio_dev_fd) < 0) {
771 RTE_LOG(ERR, EAL, " %s setup device failed\n", pci_addr);
775 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
776 if (pci_vfio_enable_notifier(dev, vfio_dev_fd) != 0) {
777 RTE_LOG(ERR, EAL, "Error setting up notifier!\n");
782 TAILQ_INSERT_TAIL(vfio_res_list, vfio_res, next);
793 pci_vfio_map_resource_secondary(struct rte_pci_device *dev)
795 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
796 char pci_addr[PATH_MAX] = {0};
798 struct rte_pci_addr *loc = &dev->addr;
800 struct mapped_pci_resource *vfio_res = NULL;
801 struct mapped_pci_res_list *vfio_res_list =
802 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
804 struct pci_map *maps;
806 dev->intr_handle.fd = -1;
807 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
808 dev->vfio_req_intr_handle.fd = -1;
811 /* store PCI address string */
812 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
813 loc->domain, loc->bus, loc->devid, loc->function);
815 /* if we're in a secondary process, just find our tailq entry */
816 TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
817 if (rte_pci_addr_cmp(&vfio_res->pci_addr,
822 /* if we haven't found our tailq entry, something's wrong */
823 if (vfio_res == NULL) {
824 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
829 ret = rte_vfio_setup_device(rte_pci_get_sysfs_path(), pci_addr,
830 &vfio_dev_fd, &device_info);
835 maps = vfio_res->maps;
837 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
838 ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, MAP_FIXED);
840 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n",
841 pci_addr, i, strerror(errno));
842 goto err_vfio_dev_fd;
845 dev->mem_resource[i].addr = maps[i].addr;
848 /* we need save vfio_dev_fd, so it can be used during release */
849 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
850 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
851 dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
861 * map the PCI resources of a PCI device in virtual memory (VFIO version).
862 * primary and secondary processes follow almost exactly the same path
865 pci_vfio_map_resource(struct rte_pci_device *dev)
867 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
868 return pci_vfio_map_resource_primary(dev);
870 return pci_vfio_map_resource_secondary(dev);
873 static struct mapped_pci_resource *
874 find_and_unmap_vfio_resource(struct mapped_pci_res_list *vfio_res_list,
875 struct rte_pci_device *dev,
876 const char *pci_addr)
878 struct mapped_pci_resource *vfio_res = NULL;
879 struct pci_map *maps;
883 TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
884 if (rte_pci_addr_cmp(&vfio_res->pci_addr, &dev->addr))
889 if (vfio_res == NULL)
892 RTE_LOG(INFO, EAL, "Releasing pci mapped resource for %s\n",
895 maps = vfio_res->maps;
896 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
899 * We do not need to be aware of MSI-X table BAR mappings as
900 * when mapping. Just using current maps array is enough
903 RTE_LOG(INFO, EAL, "Calling pci_unmap_resource for %s at %p\n",
904 pci_addr, maps[i].addr);
905 pci_unmap_resource(maps[i].addr, maps[i].size);
913 pci_vfio_unmap_resource_primary(struct rte_pci_device *dev)
915 char pci_addr[PATH_MAX] = {0};
916 struct rte_pci_addr *loc = &dev->addr;
917 struct mapped_pci_resource *vfio_res = NULL;
918 struct mapped_pci_res_list *vfio_res_list;
921 /* store PCI address string */
922 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
923 loc->domain, loc->bus, loc->devid, loc->function);
925 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
926 ret = pci_vfio_disable_notifier(dev);
928 RTE_LOG(ERR, EAL, "fail to disable req notifier.\n");
933 if (close(dev->intr_handle.fd) < 0) {
934 RTE_LOG(INFO, EAL, "Error when closing eventfd file descriptor for %s\n",
939 if (pci_vfio_set_bus_master(dev->intr_handle.vfio_dev_fd, false)) {
940 RTE_LOG(ERR, EAL, " %s cannot unset bus mastering for PCI device!\n",
945 ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
946 dev->intr_handle.vfio_dev_fd);
949 "%s(): cannot release device\n", __func__);
954 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
955 vfio_res = find_and_unmap_vfio_resource(vfio_res_list, dev, pci_addr);
957 /* if we haven't found our tailq entry, something's wrong */
958 if (vfio_res == NULL) {
959 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
964 TAILQ_REMOVE(vfio_res_list, vfio_res, next);
970 pci_vfio_unmap_resource_secondary(struct rte_pci_device *dev)
972 char pci_addr[PATH_MAX] = {0};
973 struct rte_pci_addr *loc = &dev->addr;
974 struct mapped_pci_resource *vfio_res = NULL;
975 struct mapped_pci_res_list *vfio_res_list;
978 /* store PCI address string */
979 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
980 loc->domain, loc->bus, loc->devid, loc->function);
982 ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
983 dev->intr_handle.vfio_dev_fd);
986 "%s(): cannot release device\n", __func__);
991 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
992 vfio_res = find_and_unmap_vfio_resource(vfio_res_list, dev, pci_addr);
994 /* if we haven't found our tailq entry, something's wrong */
995 if (vfio_res == NULL) {
996 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
1005 pci_vfio_unmap_resource(struct rte_pci_device *dev)
1007 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1008 return pci_vfio_unmap_resource_primary(dev);
1010 return pci_vfio_unmap_resource_secondary(dev);
1014 pci_vfio_ioport_map(struct rte_pci_device *dev, int bar,
1015 struct rte_pci_ioport *p)
1017 if (bar < VFIO_PCI_BAR0_REGION_INDEX ||
1018 bar > VFIO_PCI_BAR5_REGION_INDEX) {
1019 RTE_LOG(ERR, EAL, "invalid bar (%d)!\n", bar);
1024 p->base = VFIO_GET_REGION_ADDR(bar);
1029 pci_vfio_ioport_read(struct rte_pci_ioport *p,
1030 void *data, size_t len, off_t offset)
1032 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
1034 if (pread64(intr_handle->vfio_dev_fd, data,
1035 len, p->base + offset) <= 0)
1037 "Can't read from PCI bar (%" PRIu64 ") : offset (%x)\n",
1038 VFIO_GET_REGION_IDX(p->base), (int)offset);
1042 pci_vfio_ioport_write(struct rte_pci_ioport *p,
1043 const void *data, size_t len, off_t offset)
1045 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
1047 if (pwrite64(intr_handle->vfio_dev_fd, data,
1048 len, p->base + offset) <= 0)
1050 "Can't write to PCI bar (%" PRIu64 ") : offset (%x)\n",
1051 VFIO_GET_REGION_IDX(p->base), (int)offset);
1055 pci_vfio_ioport_unmap(struct rte_pci_ioport *p)
1062 pci_vfio_is_enabled(void)
1064 return rte_vfio_is_enabled("vfio_pci");