1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
7 #include <linux/pci_regs.h>
8 #include <sys/eventfd.h>
9 #include <sys/socket.h>
10 #include <sys/ioctl.h>
16 #include <rte_bus_pci.h>
17 #include <rte_eal_memconfig.h>
18 #include <rte_malloc.h>
22 #include <rte_spinlock.h>
23 #include <rte_tailq.h>
25 #include "eal_filesystem.h"
32 * PCI probing under linux (VFIO version)
34 * This code tries to determine if the PCI device is bound to VFIO driver,
35 * and initialize it (map BARs, set up interrupts) if that's the case.
37 * This file is only compiled if CONFIG_RTE_EAL_VFIO is set to "y".
43 #define PAGE_SIZE (sysconf(_SC_PAGESIZE))
45 #define PAGE_MASK (~(PAGE_SIZE - 1))
47 static struct rte_tailq_elem rte_vfio_tailq = {
48 .name = "VFIO_RESOURCE_LIST",
50 EAL_REGISTER_TAILQ(rte_vfio_tailq)
53 pci_vfio_read_config(const struct rte_intr_handle *intr_handle,
54 void *buf, size_t len, off_t offs)
56 return pread64(intr_handle->vfio_dev_fd, buf, len,
57 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
61 pci_vfio_write_config(const struct rte_intr_handle *intr_handle,
62 const void *buf, size_t len, off_t offs)
64 return pwrite64(intr_handle->vfio_dev_fd, buf, len,
65 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
68 /* get PCI BAR number where MSI-X interrupts are */
70 pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
75 uint8_t cap_id, cap_offset;
77 /* read PCI capability pointer from config space */
78 ret = pread64(fd, ®, sizeof(reg),
79 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
81 if (ret != sizeof(reg)) {
82 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
87 /* we need first byte */
88 cap_offset = reg & 0xFF;
92 /* read PCI capability ID */
93 ret = pread64(fd, ®, sizeof(reg),
94 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
96 if (ret != sizeof(reg)) {
97 RTE_LOG(ERR, EAL, "Cannot read capability ID from PCI "
102 /* we need first byte */
105 /* if we haven't reached MSI-X, check next capability */
106 if (cap_id != PCI_CAP_ID_MSIX) {
107 ret = pread64(fd, ®, sizeof(reg),
108 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
110 if (ret != sizeof(reg)) {
111 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
116 /* we need second byte */
117 cap_offset = (reg & 0xFF00) >> 8;
121 /* else, read table offset */
123 /* table offset resides in the next 4 bytes */
124 ret = pread64(fd, ®, sizeof(reg),
125 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
127 if (ret != sizeof(reg)) {
128 RTE_LOG(ERR, EAL, "Cannot read table offset from PCI config "
133 ret = pread64(fd, &flags, sizeof(flags),
134 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
136 if (ret != sizeof(flags)) {
137 RTE_LOG(ERR, EAL, "Cannot read table flags from PCI config "
142 msix_table->bar_index = reg & RTE_PCI_MSIX_TABLE_BIR;
143 msix_table->offset = reg & RTE_PCI_MSIX_TABLE_OFFSET;
145 16 * (1 + (flags & RTE_PCI_MSIX_FLAGS_QSIZE));
153 /* set PCI bus mastering */
155 pci_vfio_set_bus_master(int dev_fd, bool op)
160 ret = pread64(dev_fd, ®, sizeof(reg),
161 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
163 if (ret != sizeof(reg)) {
164 RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
169 /* set the master bit */
170 reg |= PCI_COMMAND_MASTER;
172 reg &= ~(PCI_COMMAND_MASTER);
174 ret = pwrite64(dev_fd, ®, sizeof(reg),
175 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
178 if (ret != sizeof(reg)) {
179 RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
186 /* set up interrupt support (but not enable interrupts) */
188 pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)
190 char irq_set_buf[sizeof(struct vfio_irq_set) + sizeof(int)];
191 struct vfio_irq_set *irq_set;
192 enum rte_intr_mode intr_mode;
193 int i, ret, intr_idx;
196 /* default to invalid index */
197 intr_idx = VFIO_PCI_NUM_IRQS;
199 /* Get default / configured intr_mode */
200 intr_mode = rte_eal_vfio_intr_mode();
202 /* get interrupt type from internal config (MSI-X by default, can be
203 * overridden from the command line
206 case RTE_INTR_MODE_MSIX:
207 intr_idx = VFIO_PCI_MSIX_IRQ_INDEX;
209 case RTE_INTR_MODE_MSI:
210 intr_idx = VFIO_PCI_MSI_IRQ_INDEX;
212 case RTE_INTR_MODE_LEGACY:
213 intr_idx = VFIO_PCI_INTX_IRQ_INDEX;
215 /* don't do anything if we want to automatically determine interrupt type */
216 case RTE_INTR_MODE_NONE:
219 RTE_LOG(ERR, EAL, " unknown default interrupt type!\n");
223 /* start from MSI-X interrupt type */
224 for (i = VFIO_PCI_MSIX_IRQ_INDEX; i >= 0; i--) {
225 struct vfio_irq_info irq = { .argsz = sizeof(irq) };
227 /* skip interrupt modes we don't want */
228 if (intr_mode != RTE_INTR_MODE_NONE &&
234 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
236 RTE_LOG(ERR, EAL, " cannot get IRQ info, "
237 "error %i (%s)\n", errno, strerror(errno));
241 /* found a usable interrupt mode */
242 if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) != 0)
245 /* if this vector cannot be used with eventfd, fail if we explicitly
246 * specified interrupt type, otherwise continue */
247 if (intr_mode != RTE_INTR_MODE_NONE) {
248 RTE_LOG(ERR, EAL, " interrupt vector does not support eventfd!\n");
256 fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
258 RTE_LOG(ERR, EAL, " cannot set up eventfd, error %i (%s)\n",
259 errno, strerror(errno));
263 irq_set = (struct vfio_irq_set *)irq_set_buf;
264 irq_set->argsz = sizeof(irq_set_buf);
265 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD|VFIO_IRQ_SET_ACTION_TRIGGER;
269 memcpy(&irq_set->data, &fd, sizeof(int));
270 if (ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set) < 0) {
271 RTE_LOG(ERR, EAL, " error configuring interrupt\n");
276 dev->intr_handle.fd = fd;
277 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
278 if (i == VFIO_PCI_MSIX_IRQ_INDEX)
279 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
280 else if (i == VFIO_PCI_MSI_IRQ_INDEX)
281 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSI;
282 else if (i == VFIO_PCI_INTX_IRQ_INDEX)
283 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_LEGACY;
288 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
290 * Spinlock for device hot-unplug failure handling.
291 * If it tries to access bus or device, such as handle sigbus on bus
292 * or handle memory failure for device, just need to use this lock.
293 * It could protect the bus and the device to avoid race condition.
295 static rte_spinlock_t failure_handle_lock = RTE_SPINLOCK_INITIALIZER;
298 pci_vfio_req_handler(void *param)
302 struct rte_device *device = (struct rte_device *)param;
304 rte_spinlock_lock(&failure_handle_lock);
305 bus = rte_bus_find_by_device(device);
307 RTE_LOG(ERR, EAL, "Cannot find bus for device (%s)\n",
313 * vfio kernel module request user space to release allocated
314 * resources before device be deleted in kernel, so it can directly
315 * call the vfio bus hot-unplug handler to process it.
317 ret = bus->hot_unplug_handler(device);
320 "Can not handle hot-unplug for device (%s)\n",
323 rte_spinlock_unlock(&failure_handle_lock);
326 /* enable notifier (only enable req now) */
328 pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)
333 /* set up an eventfd for req notifier */
334 fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
336 RTE_LOG(ERR, EAL, "Cannot set up eventfd, error %i (%s)\n",
337 errno, strerror(errno));
341 dev->vfio_req_intr_handle.fd = fd;
342 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_VFIO_REQ;
343 dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
345 ret = rte_intr_callback_register(&dev->vfio_req_intr_handle,
346 pci_vfio_req_handler,
347 (void *)&dev->device);
349 RTE_LOG(ERR, EAL, "Fail to register req notifier handler.\n");
353 ret = rte_intr_enable(&dev->vfio_req_intr_handle);
355 RTE_LOG(ERR, EAL, "Fail to enable req notifier.\n");
356 ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
357 pci_vfio_req_handler,
358 (void *)&dev->device);
361 "Fail to unregister req notifier handler.\n");
369 dev->vfio_req_intr_handle.fd = -1;
370 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
371 dev->vfio_req_intr_handle.vfio_dev_fd = -1;
376 /* disable notifier (only disable req now) */
378 pci_vfio_disable_notifier(struct rte_pci_device *dev)
382 ret = rte_intr_disable(&dev->vfio_req_intr_handle);
384 RTE_LOG(ERR, EAL, "fail to disable req notifier.\n");
388 ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
389 pci_vfio_req_handler,
390 (void *)&dev->device);
393 "fail to unregister req notifier handler.\n");
397 close(dev->vfio_req_intr_handle.fd);
399 dev->vfio_req_intr_handle.fd = -1;
400 dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
401 dev->vfio_req_intr_handle.vfio_dev_fd = -1;
408 pci_vfio_is_ioport_bar(int vfio_dev_fd, int bar_index)
413 ret = pread64(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar),
414 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX)
415 + PCI_BASE_ADDRESS_0 + bar_index*4);
416 if (ret != sizeof(ioport_bar)) {
417 RTE_LOG(ERR, EAL, "Cannot read command (%x) from config space!\n",
418 PCI_BASE_ADDRESS_0 + bar_index*4);
422 return (ioport_bar & PCI_BASE_ADDRESS_SPACE_IO) != 0;
426 pci_rte_vfio_setup_device(struct rte_pci_device *dev, int vfio_dev_fd)
428 if (pci_vfio_setup_interrupts(dev, vfio_dev_fd) != 0) {
429 RTE_LOG(ERR, EAL, "Error setting up interrupts!\n");
433 /* set bus mastering for the device */
434 if (pci_vfio_set_bus_master(vfio_dev_fd, true)) {
435 RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n");
440 * Reset the device. If the device is not capable of resetting,
441 * then it updates errno as EINVAL.
443 if (ioctl(vfio_dev_fd, VFIO_DEVICE_RESET) && errno != EINVAL) {
444 RTE_LOG(ERR, EAL, "Unable to reset device! Error: %d (%s)\n",
445 errno, strerror(errno));
453 pci_vfio_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res,
454 int bar_index, int additional_flags)
457 unsigned long offset, size;
460 struct pci_msix_table *msix_table = &vfio_res->msix_table;
461 struct pci_map *bar = &vfio_res->maps[bar_index];
463 if (bar->size == 0) {
464 RTE_LOG(DEBUG, EAL, "Bar size is 0, skip BAR%d\n", bar_index);
468 if (msix_table->bar_index == bar_index) {
470 * VFIO will not let us map the MSI-X table,
471 * but we can map around it.
473 uint32_t table_start = msix_table->offset;
474 uint32_t table_end = table_start + msix_table->size;
475 table_end = RTE_ALIGN(table_end, PAGE_SIZE);
476 table_start = RTE_ALIGN_FLOOR(table_start, PAGE_SIZE);
478 /* If page-aligned start of MSI-X table is less than the
479 * actual MSI-X table start address, reassign to the actual
482 if (table_start < msix_table->offset)
483 table_start = msix_table->offset;
485 if (table_start == 0 && table_end >= bar->size) {
486 /* Cannot map this BAR */
487 RTE_LOG(DEBUG, EAL, "Skipping BAR%d\n", bar_index);
493 memreg[0].offset = bar->offset;
494 memreg[0].size = table_start;
495 if (bar->size < table_end) {
497 * If MSI-X table end is beyond BAR end, don't attempt
498 * to perform second mapping.
500 memreg[1].offset = 0;
503 memreg[1].offset = bar->offset + table_end;
504 memreg[1].size = bar->size - table_end;
508 "Trying to map BAR%d that contains the MSI-X "
509 "table. Trying offsets: "
510 "0x%04lx:0x%04lx, 0x%04lx:0x%04lx\n", bar_index,
511 memreg[0].offset, memreg[0].size,
512 memreg[1].offset, memreg[1].size);
514 memreg[0].offset = bar->offset;
515 memreg[0].size = bar->size;
518 /* reserve the address using an inaccessible mapping */
519 bar_addr = mmap(bar->addr, bar->size, 0, MAP_PRIVATE |
520 MAP_ANONYMOUS | additional_flags, -1, 0);
521 if (bar_addr != MAP_FAILED) {
522 void *map_addr = NULL;
523 if (memreg[0].size) {
524 /* actual map of first part */
525 map_addr = pci_map_resource(bar_addr, vfio_dev_fd,
531 /* if there's a second part, try to map it */
532 if (map_addr != MAP_FAILED
533 && memreg[1].offset && memreg[1].size) {
534 void *second_addr = RTE_PTR_ADD(bar_addr,
536 (uintptr_t)bar->offset);
537 map_addr = pci_map_resource(second_addr,
544 if (map_addr == MAP_FAILED || !map_addr) {
545 munmap(bar_addr, bar->size);
546 bar_addr = MAP_FAILED;
547 RTE_LOG(ERR, EAL, "Failed to map pci BAR%d\n",
553 "Failed to create inaccessible mapping for BAR%d\n",
558 bar->addr = bar_addr;
563 * region info may contain capability headers, so we need to keep reallocating
564 * the memory until we match allocated memory size with argsz.
567 pci_vfio_get_region_info(int vfio_dev_fd, struct vfio_region_info **info,
570 struct vfio_region_info *ri;
571 size_t argsz = sizeof(*ri);
574 ri = malloc(sizeof(*ri));
576 RTE_LOG(ERR, EAL, "Cannot allocate memory for region info\n");
580 memset(ri, 0, argsz);
584 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ri);
589 if (ri->argsz != argsz) {
590 struct vfio_region_info *tmp;
593 tmp = realloc(ri, argsz);
596 /* realloc failed but the ri is still there */
598 RTE_LOG(ERR, EAL, "Cannot reallocate memory for region info\n");
609 static struct vfio_info_cap_header *
610 pci_vfio_info_cap(struct vfio_region_info *info, int cap)
612 struct vfio_info_cap_header *h;
615 if ((info->flags & RTE_VFIO_INFO_FLAG_CAPS) == 0) {
616 /* VFIO info does not advertise capabilities */
620 offset = VFIO_CAP_OFFSET(info);
621 while (offset != 0) {
622 h = RTE_PTR_ADD(info, offset);
631 pci_vfio_msix_is_mappable(int vfio_dev_fd, int msix_region)
633 struct vfio_region_info *info;
636 ret = pci_vfio_get_region_info(vfio_dev_fd, &info, msix_region);
640 ret = pci_vfio_info_cap(info, RTE_VFIO_CAP_MSIX_MAPPABLE) != NULL;
650 pci_vfio_map_resource_primary(struct rte_pci_device *dev)
652 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
653 char pci_addr[PATH_MAX] = {0};
655 struct rte_pci_addr *loc = &dev->addr;
657 struct mapped_pci_resource *vfio_res = NULL;
658 struct mapped_pci_res_list *vfio_res_list =
659 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
661 struct pci_map *maps;
663 dev->intr_handle.fd = -1;
664 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
665 dev->vfio_req_intr_handle.fd = -1;
668 /* store PCI address string */
669 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
670 loc->domain, loc->bus, loc->devid, loc->function);
672 ret = rte_vfio_setup_device(rte_pci_get_sysfs_path(), pci_addr,
673 &vfio_dev_fd, &device_info);
677 /* allocate vfio_res and get region info */
678 vfio_res = rte_zmalloc("VFIO_RES", sizeof(*vfio_res), 0);
679 if (vfio_res == NULL) {
681 "%s(): cannot store vfio mmap details\n", __func__);
682 goto err_vfio_dev_fd;
684 memcpy(&vfio_res->pci_addr, &dev->addr, sizeof(vfio_res->pci_addr));
686 /* get number of registers (up to BAR5) */
687 vfio_res->nb_maps = RTE_MIN((int) device_info.num_regions,
688 VFIO_PCI_BAR5_REGION_INDEX + 1);
691 maps = vfio_res->maps;
693 vfio_res->msix_table.bar_index = -1;
694 /* get MSI-X BAR, if any (we have to know where it is because we can't
695 * easily mmap it when using VFIO)
697 ret = pci_vfio_get_msix_bar(vfio_dev_fd, &vfio_res->msix_table);
699 RTE_LOG(ERR, EAL, " %s cannot get MSI-X BAR number!\n",
703 /* if we found our MSI-X BAR region, check if we can mmap it */
704 if (vfio_res->msix_table.bar_index != -1) {
705 int ret = pci_vfio_msix_is_mappable(vfio_dev_fd,
706 vfio_res->msix_table.bar_index);
708 RTE_LOG(ERR, EAL, "Couldn't check if MSI-X BAR is mappable\n");
710 } else if (ret != 0) {
711 /* we can map it, so we don't care where it is */
712 RTE_LOG(DEBUG, EAL, "VFIO reports MSI-X BAR as mappable\n");
713 vfio_res->msix_table.bar_index = -1;
717 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
718 struct vfio_region_info *reg = NULL;
721 ret = pci_vfio_get_region_info(vfio_dev_fd, ®, i);
723 RTE_LOG(ERR, EAL, " %s cannot get device region info "
724 "error %i (%s)\n", pci_addr, errno,
729 /* chk for io port region */
730 ret = pci_vfio_is_ioport_bar(vfio_dev_fd, i);
735 RTE_LOG(INFO, EAL, "Ignore mapping IO port bar(%d)\n",
741 /* skip non-mmapable BARs */
742 if ((reg->flags & VFIO_REGION_INFO_FLAG_MMAP) == 0) {
747 /* try mapping somewhere close to the end of hugepages */
748 if (pci_map_addr == NULL)
749 pci_map_addr = pci_find_max_end_va();
751 bar_addr = pci_map_addr;
752 pci_map_addr = RTE_PTR_ADD(bar_addr, (size_t) reg->size);
754 maps[i].addr = bar_addr;
755 maps[i].offset = reg->offset;
756 maps[i].size = reg->size;
757 maps[i].path = NULL; /* vfio doesn't have per-resource paths */
759 ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0);
761 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n",
762 pci_addr, i, strerror(errno));
767 dev->mem_resource[i].addr = maps[i].addr;
772 if (pci_rte_vfio_setup_device(dev, vfio_dev_fd) < 0) {
773 RTE_LOG(ERR, EAL, " %s setup device failed\n", pci_addr);
777 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
778 if (pci_vfio_enable_notifier(dev, vfio_dev_fd) != 0) {
779 RTE_LOG(ERR, EAL, "Error setting up notifier!\n");
784 TAILQ_INSERT_TAIL(vfio_res_list, vfio_res, next);
795 pci_vfio_map_resource_secondary(struct rte_pci_device *dev)
797 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
798 char pci_addr[PATH_MAX] = {0};
800 struct rte_pci_addr *loc = &dev->addr;
802 struct mapped_pci_resource *vfio_res = NULL;
803 struct mapped_pci_res_list *vfio_res_list =
804 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
806 struct pci_map *maps;
808 dev->intr_handle.fd = -1;
809 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
810 dev->vfio_req_intr_handle.fd = -1;
813 /* store PCI address string */
814 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
815 loc->domain, loc->bus, loc->devid, loc->function);
817 /* if we're in a secondary process, just find our tailq entry */
818 TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
819 if (rte_pci_addr_cmp(&vfio_res->pci_addr,
824 /* if we haven't found our tailq entry, something's wrong */
825 if (vfio_res == NULL) {
826 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
831 ret = rte_vfio_setup_device(rte_pci_get_sysfs_path(), pci_addr,
832 &vfio_dev_fd, &device_info);
837 maps = vfio_res->maps;
839 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
840 ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, MAP_FIXED);
842 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n",
843 pci_addr, i, strerror(errno));
844 goto err_vfio_dev_fd;
847 dev->mem_resource[i].addr = maps[i].addr;
850 /* we need save vfio_dev_fd, so it can be used during release */
851 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
852 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
853 dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
863 * map the PCI resources of a PCI device in virtual memory (VFIO version).
864 * primary and secondary processes follow almost exactly the same path
867 pci_vfio_map_resource(struct rte_pci_device *dev)
869 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
870 return pci_vfio_map_resource_primary(dev);
872 return pci_vfio_map_resource_secondary(dev);
875 static struct mapped_pci_resource *
876 find_and_unmap_vfio_resource(struct mapped_pci_res_list *vfio_res_list,
877 struct rte_pci_device *dev,
878 const char *pci_addr)
880 struct mapped_pci_resource *vfio_res = NULL;
881 struct pci_map *maps;
885 TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
886 if (rte_pci_addr_cmp(&vfio_res->pci_addr, &dev->addr))
891 if (vfio_res == NULL)
894 RTE_LOG(INFO, EAL, "Releasing pci mapped resource for %s\n",
897 maps = vfio_res->maps;
898 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
901 * We do not need to be aware of MSI-X table BAR mappings as
902 * when mapping. Just using current maps array is enough
905 RTE_LOG(INFO, EAL, "Calling pci_unmap_resource for %s at %p\n",
906 pci_addr, maps[i].addr);
907 pci_unmap_resource(maps[i].addr, maps[i].size);
915 pci_vfio_unmap_resource_primary(struct rte_pci_device *dev)
917 char pci_addr[PATH_MAX] = {0};
918 struct rte_pci_addr *loc = &dev->addr;
919 struct mapped_pci_resource *vfio_res = NULL;
920 struct mapped_pci_res_list *vfio_res_list;
923 /* store PCI address string */
924 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
925 loc->domain, loc->bus, loc->devid, loc->function);
927 #ifdef HAVE_VFIO_DEV_REQ_INTERFACE
928 ret = pci_vfio_disable_notifier(dev);
930 RTE_LOG(ERR, EAL, "fail to disable req notifier.\n");
935 if (close(dev->intr_handle.fd) < 0) {
936 RTE_LOG(INFO, EAL, "Error when closing eventfd file descriptor for %s\n",
941 if (pci_vfio_set_bus_master(dev->intr_handle.vfio_dev_fd, false)) {
942 RTE_LOG(ERR, EAL, " %s cannot unset bus mastering for PCI device!\n",
947 ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
948 dev->intr_handle.vfio_dev_fd);
951 "%s(): cannot release device\n", __func__);
956 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
957 vfio_res = find_and_unmap_vfio_resource(vfio_res_list, dev, pci_addr);
959 /* if we haven't found our tailq entry, something's wrong */
960 if (vfio_res == NULL) {
961 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
966 TAILQ_REMOVE(vfio_res_list, vfio_res, next);
972 pci_vfio_unmap_resource_secondary(struct rte_pci_device *dev)
974 char pci_addr[PATH_MAX] = {0};
975 struct rte_pci_addr *loc = &dev->addr;
976 struct mapped_pci_resource *vfio_res = NULL;
977 struct mapped_pci_res_list *vfio_res_list;
980 /* store PCI address string */
981 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
982 loc->domain, loc->bus, loc->devid, loc->function);
984 ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
985 dev->intr_handle.vfio_dev_fd);
988 "%s(): cannot release device\n", __func__);
993 RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
994 vfio_res = find_and_unmap_vfio_resource(vfio_res_list, dev, pci_addr);
996 /* if we haven't found our tailq entry, something's wrong */
997 if (vfio_res == NULL) {
998 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
1007 pci_vfio_unmap_resource(struct rte_pci_device *dev)
1009 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1010 return pci_vfio_unmap_resource_primary(dev);
1012 return pci_vfio_unmap_resource_secondary(dev);
1016 pci_vfio_ioport_map(struct rte_pci_device *dev, int bar,
1017 struct rte_pci_ioport *p)
1019 if (bar < VFIO_PCI_BAR0_REGION_INDEX ||
1020 bar > VFIO_PCI_BAR5_REGION_INDEX) {
1021 RTE_LOG(ERR, EAL, "invalid bar (%d)!\n", bar);
1026 p->base = VFIO_GET_REGION_ADDR(bar);
1031 pci_vfio_ioport_read(struct rte_pci_ioport *p,
1032 void *data, size_t len, off_t offset)
1034 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
1036 if (pread64(intr_handle->vfio_dev_fd, data,
1037 len, p->base + offset) <= 0)
1039 "Can't read from PCI bar (%" PRIu64 ") : offset (%x)\n",
1040 VFIO_GET_REGION_IDX(p->base), (int)offset);
1044 pci_vfio_ioport_write(struct rte_pci_ioport *p,
1045 const void *data, size_t len, off_t offset)
1047 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
1049 if (pwrite64(intr_handle->vfio_dev_fd, data,
1050 len, p->base + offset) <= 0)
1052 "Can't write to PCI bar (%" PRIu64 ") : offset (%x)\n",
1053 VFIO_GET_REGION_IDX(p->base), (int)offset);
1057 pci_vfio_ioport_unmap(struct rte_pci_ioport *p)
1064 pci_vfio_is_enabled(void)
1066 return rte_vfio_is_enabled("vfio_pci");