1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
12 #include "roc_bphy_irq.h"
14 #define roc_cpuset_t cpu_set_t
16 struct roc_bphy_irq_usr_data {
23 struct roc_bphy_irq_stack {
24 STAILQ_ENTRY(roc_bphy_irq_stack) entries;
30 #define ROC_BPHY_MEMZONE_NAME "roc_bphy_mz"
31 #define ROC_BPHY_CTR_DEV_PATH "/dev/otx-bphy-ctr"
33 #define ROC_BPHY_IOC_MAGIC 0xF3
34 #define ROC_BPHY_IOC_SET_BPHY_HANDLER \
35 _IOW(ROC_BPHY_IOC_MAGIC, 1, struct roc_bphy_irq_usr_data)
36 #define ROC_BPHY_IOC_GET_BPHY_MAX_IRQ _IOR(ROC_BPHY_IOC_MAGIC, 3, uint64_t)
37 #define ROC_BPHY_IOC_GET_BPHY_BMASK_IRQ _IOR(ROC_BPHY_IOC_MAGIC, 4, uint64_t)
39 static STAILQ_HEAD(slisthead, roc_bphy_irq_stack)
40 irq_stacks = STAILQ_HEAD_INITIALIZER(irq_stacks);
42 /* Note: it is assumed that as for now there is no multiprocess support */
43 static pthread_mutex_t stacks_mutex = PTHREAD_MUTEX_INITIALIZER;
45 struct roc_bphy_irq_chip *
46 roc_bphy_intr_init(void)
48 struct roc_bphy_irq_chip *irq_chip;
49 uint64_t max_irq, i, avail_irqs;
52 fd = open(ROC_BPHY_CTR_DEV_PATH, O_RDWR | O_SYNC);
54 plt_err("Failed to open %s", ROC_BPHY_CTR_DEV_PATH);
58 ret = ioctl(fd, ROC_BPHY_IOC_GET_BPHY_MAX_IRQ, &max_irq);
60 plt_err("Failed to get max irq number via ioctl");
64 ret = ioctl(fd, ROC_BPHY_IOC_GET_BPHY_BMASK_IRQ, &avail_irqs);
66 plt_err("Failed to get available irqs bitmask via ioctl");
70 irq_chip = plt_zmalloc(sizeof(*irq_chip), 0);
71 if (irq_chip == NULL) {
72 plt_err("Failed to alloc irq_chip");
77 irq_chip->max_irq = max_irq;
78 irq_chip->avail_irq_bmask = avail_irqs;
80 plt_zmalloc(irq_chip->max_irq * sizeof(*irq_chip->irq_vecs), 0);
81 if (irq_chip->irq_vecs == NULL) {
82 plt_err("Failed to alloc irq_chip irq_vecs");
86 irq_chip->mz_name = plt_zmalloc(strlen(ROC_BPHY_MEMZONE_NAME) + 1, 0);
87 if (irq_chip->mz_name == NULL) {
88 plt_err("Failed to alloc irq_chip name");
91 plt_strlcpy(irq_chip->mz_name, ROC_BPHY_MEMZONE_NAME,
92 strlen(ROC_BPHY_MEMZONE_NAME) + 1);
94 for (i = 0; i < irq_chip->max_irq; i++) {
95 irq_chip->irq_vecs[i].fd = -1;
96 irq_chip->irq_vecs[i].handler_cpu = -1;
102 plt_free(irq_chip->irq_vecs);
114 roc_bphy_intr_fini(struct roc_bphy_irq_chip *irq_chip)
116 if (irq_chip == NULL)
119 close(irq_chip->intfd);
120 plt_free(irq_chip->mz_name);
121 plt_free(irq_chip->irq_vecs);
126 roc_bphy_irq_stack_remove(int cpu)
128 struct roc_bphy_irq_stack *curr_stack;
130 if (pthread_mutex_lock(&stacks_mutex))
133 STAILQ_FOREACH(curr_stack, &irq_stacks, entries) {
134 if (curr_stack->cpu == cpu)
138 if (curr_stack == NULL)
141 if (curr_stack->inuse > 0)
144 if (curr_stack->inuse == 0) {
145 STAILQ_REMOVE(&irq_stacks, curr_stack, roc_bphy_irq_stack,
147 plt_free(curr_stack->sp_buffer);
148 plt_free(curr_stack);
152 pthread_mutex_unlock(&stacks_mutex);
156 roc_bphy_irq_stack_get(int cpu)
158 #define ARM_STACK_ALIGNMENT (2 * sizeof(void *))
159 #define IRQ_ISR_STACK_SIZE 0x200000
161 struct roc_bphy_irq_stack *curr_stack;
164 if (pthread_mutex_lock(&stacks_mutex))
167 STAILQ_FOREACH(curr_stack, &irq_stacks, entries) {
168 if (curr_stack->cpu == cpu) {
170 retval = ((char *)curr_stack->sp_buffer) +
176 curr_stack = plt_zmalloc(sizeof(struct roc_bphy_irq_stack), 0);
177 if (curr_stack == NULL)
180 curr_stack->sp_buffer =
181 plt_zmalloc(IRQ_ISR_STACK_SIZE * 2, ARM_STACK_ALIGNMENT);
182 if (curr_stack->sp_buffer == NULL)
185 curr_stack->cpu = cpu;
186 curr_stack->inuse = 0;
187 STAILQ_INSERT_TAIL(&irq_stacks, curr_stack, entries);
188 retval = ((char *)curr_stack->sp_buffer) + IRQ_ISR_STACK_SIZE;
191 pthread_mutex_unlock(&stacks_mutex);
195 plt_free(curr_stack);
198 pthread_mutex_unlock(&stacks_mutex);
203 roc_bphy_intr_handler(unsigned int irq_num)
205 struct roc_bphy_irq_chip *irq_chip;
206 const struct plt_memzone *mz;
208 mz = plt_memzone_lookup(ROC_BPHY_MEMZONE_NAME);
212 irq_chip = *(struct roc_bphy_irq_chip **)mz->addr;
213 if (irq_chip == NULL)
216 if (irq_chip->irq_vecs[irq_num].handler != NULL)
217 irq_chip->irq_vecs[irq_num].handler(
218 (int)irq_num, irq_chip->irq_vecs[irq_num].isr_data);
224 roc_bphy_irq_handler_set(struct roc_bphy_irq_chip *chip, int irq_num,
225 void (*isr)(int irq_num, void *isr_data),
228 roc_cpuset_t orig_cpuset, intr_cpuset;
229 struct roc_bphy_irq_usr_data irq_usr;
230 const struct plt_memzone *mz;
231 int i, retval, curr_cpu, rc;
234 mz = plt_memzone_lookup(chip->mz_name);
236 /* what we want is just a pointer to chip, not object itself */
237 mz = plt_memzone_reserve_cache_align(chip->mz_name,
243 if (chip->irq_vecs[irq_num].handler != NULL)
246 rc = pthread_getaffinity_np(pthread_self(), sizeof(orig_cpuset),
249 plt_err("Failed to get affinity mask");
253 for (curr_cpu = -1, i = 0; i < CPU_SETSIZE; i++)
254 if (CPU_ISSET(i, &orig_cpuset))
259 CPU_ZERO(&intr_cpuset);
260 CPU_SET(curr_cpu, &intr_cpuset);
261 retval = pthread_setaffinity_np(pthread_self(), sizeof(intr_cpuset),
264 plt_err("Failed to set affinity mask");
268 irq_usr.isr_base = (uint64_t)roc_bphy_intr_handler;
269 irq_usr.sp = (uint64_t)roc_bphy_irq_stack_get(curr_cpu);
270 irq_usr.cpu = curr_cpu;
271 if (irq_usr.sp == 0) {
272 rc = pthread_setaffinity_np(pthread_self(), sizeof(orig_cpuset),
275 plt_err("Failed to restore affinity mask");
279 /* On simulator memory locking operation takes much time. We want
280 * to skip this when running in such an environment.
282 env = getenv("BPHY_INTR_MLOCK_DISABLE");
284 rc = mlockall(MCL_CURRENT | MCL_FUTURE);
286 plt_warn("Failed to lock memory into RAM");
289 *((struct roc_bphy_irq_chip **)(mz->addr)) = chip;
290 irq_usr.irq_num = irq_num;
291 chip->irq_vecs[irq_num].handler_cpu = curr_cpu;
292 chip->irq_vecs[irq_num].handler = isr;
293 chip->irq_vecs[irq_num].isr_data = isr_data;
294 retval = ioctl(chip->intfd, ROC_BPHY_IOC_SET_BPHY_HANDLER, &irq_usr);
296 roc_bphy_irq_stack_remove(curr_cpu);
297 chip->irq_vecs[irq_num].handler = NULL;
298 chip->irq_vecs[irq_num].handler_cpu = -1;
303 rc = pthread_setaffinity_np(pthread_self(), sizeof(orig_cpuset),
306 plt_warn("Failed to restore affinity mask");
312 roc_bphy_intr_available(struct roc_bphy_irq_chip *irq_chip, int irq_num)
314 if (irq_num < 0 || (uint64_t)irq_num >= irq_chip->max_irq)
317 return irq_chip->avail_irq_bmask & BIT(irq_num);