drivers/common/cnxk/roc_cpt_debug.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include "roc_api.h"
   6 #include "roc_priv.h"
   7
   8 void
   9 roc_cpt_parse_hdr_dump(const struct cpt_parse_hdr_s *cpth)
  10 {
  11         plt_print("CPT_PARSE \t0x%p:", cpth);
  12
  13         /* W0 */
  14         plt_print("W0: cookie \t0x%x\t\tmatch_id \t0x%04x\t\terr_sum \t%u \t",
  15                   cpth->w0.cookie, cpth->w0.match_id, cpth->w0.err_sum);
  16         plt_print("W0: reas_sts \t0x%x\t\tet_owr \t%u\t\tpkt_fmt \t%u \t",
  17                   cpth->w0.reas_sts, cpth->w0.et_owr, cpth->w0.pkt_fmt);
  18         plt_print("W0: pad_len \t%u\t\tnum_frags \t%u\t\tpkt_out \t%u \t",
  19                   cpth->w0.pad_len, cpth->w0.num_frags, cpth->w0.pkt_out);
  20
  21         /* W1 */
  22         plt_print("W1: wqe_ptr \t0x%016lx\t", cpth->wqe_ptr);
  23
  24         /* W2 */
  25         plt_print("W2: frag_age \t0x%x\t\torig_pf_func \t0x%04x",
  26                   cpth->w2.frag_age, cpth->w2.orig_pf_func);
  27         plt_print("W2: il3_off \t0x%x\t\tfi_pad \t0x%x\t\tfi_offset \t0x%x \t",
  28                   cpth->w2.il3_off, cpth->w2.fi_pad, cpth->w2.fi_offset);
  29
  30         /* W3 */
  31         plt_print("W3: hw_ccode \t0x%x\t\tuc_ccode \t0x%x\t\tspi \t0x%08x",
  32                   cpth->w3.hw_ccode, cpth->w3.uc_ccode, cpth->w3.spi);
  33
  34         /* W4 */
  35         plt_print("W4: esn \t%" PRIx64 " \t OR frag1_wqe_ptr \t0x%" PRIx64,
  36                   cpth->esn, cpth->frag1_wqe_ptr);
  37 }
  38
  39 static int
  40 cpt_af_reg_read(struct roc_cpt *roc_cpt, uint64_t reg, uint64_t *val)
  41 {
  42         struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
  43         struct cpt_rd_wr_reg_msg *msg;
  44         struct dev *dev = &cpt->dev;
  45         int ret;
  46
  47         msg = mbox_alloc_msg_cpt_rd_wr_register(dev->mbox);
  48         if (msg == NULL)
  49                 return -EIO;
  50
  51         msg->hdr.pcifunc = dev->pf_func;
  52
  53         msg->is_write = 0;
  54         msg->reg_offset = reg;
  55         msg->ret_val = val;
  56
  57         ret = mbox_process_msg(dev->mbox, (void *)&msg);
  58         if (ret)
  59                 return -EIO;
  60
  61         *val = msg->val;
  62
  63         return 0;
  64 }
  65
  66 static int
  67 cpt_sts_print(struct roc_cpt *roc_cpt)
  68 {
  69         struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
  70         struct dev *dev = &cpt->dev;
  71         struct cpt_sts_req *req;
  72         struct cpt_sts_rsp *rsp;
  73         int ret;
  74
  75         req = mbox_alloc_msg_cpt_sts_get(dev->mbox);
  76         if (req == NULL)
  77                 return -EIO;
  78
  79         req->blkaddr = 0;
  80         ret = mbox_process_msg(dev->mbox, (void *)&rsp);
  81         if (ret)
  82                 return -EIO;
  83
  84         plt_print("    %s:\t0x%016" PRIx64, "inst_req_pc", rsp->inst_req_pc);
  85         plt_print("    %s:\t0x%016" PRIx64, "inst_lat_pc", rsp->inst_lat_pc);
  86         plt_print("    %s:\t\t0x%016" PRIx64, "rd_req_pc", rsp->rd_req_pc);
  87         plt_print("    %s:\t\t0x%016" PRIx64, "rd_lat_pc", rsp->rd_lat_pc);
  88         plt_print("    %s:\t\t0x%016" PRIx64, "rd_uc_pc", rsp->rd_uc_pc);
  89         plt_print("    %s:\t0x%016" PRIx64, "active_cycles_pc",
  90                   rsp->active_cycles_pc);
  91         plt_print("    %s:\t\t0x%016" PRIx64, "ctx_mis_pc", rsp->ctx_mis_pc);
  92         plt_print("    %s:\t\t0x%016" PRIx64, "ctx_hit_pc", rsp->ctx_hit_pc);
  93         plt_print("    %s:\t\t0x%016" PRIx64, "ctx_aop_pc", rsp->ctx_aop_pc);
  94         plt_print("    %s:\t0x%016" PRIx64, "ctx_aop_lat_pc",
  95                   rsp->ctx_aop_lat_pc);
  96         plt_print("    %s:\t0x%016" PRIx64, "ctx_ifetch_pc",
  97                   rsp->ctx_ifetch_pc);
  98         plt_print("    %s:\t0x%016" PRIx64, "ctx_ifetch_lat_pc",
  99                   rsp->ctx_ifetch_lat_pc);
 100         plt_print("    %s:\t0x%016" PRIx64, "ctx_ffetch_pc",
 101                   rsp->ctx_ffetch_pc);
 102         plt_print("    %s:\t0x%016" PRIx64, "ctx_ffetch_lat_pc",
 103                   rsp->ctx_ffetch_lat_pc);
 104         plt_print("    %s:\t0x%016" PRIx64, "ctx_wback_pc", rsp->ctx_wback_pc);
 105         plt_print("    %s:\t0x%016" PRIx64, "ctx_wback_lat_pc",
 106                   rsp->ctx_wback_lat_pc);
 107         plt_print("    %s:\t\t0x%016" PRIx64, "ctx_psh_pc", rsp->ctx_psh_pc);
 108         plt_print("    %s:\t0x%016" PRIx64, "ctx_psh_lat_pc",
 109                   rsp->ctx_psh_lat_pc);
 110         plt_print("    %s:\t\t0x%016" PRIx64, "ctx_err", rsp->ctx_err);
 111         plt_print("    %s:\t\t0x%016" PRIx64, "ctx_enc_id", rsp->ctx_enc_id);
 112         plt_print("    %s:\t0x%016" PRIx64, "ctx_flush_timer",
 113                   rsp->ctx_flush_timer);
 114         plt_print("    %s:\t\t0x%016" PRIx64, "rxc_time", rsp->rxc_time);
 115         plt_print("    %s:\t0x%016" PRIx64, "rxc_time_cfg", rsp->rxc_time_cfg);
 116         plt_print("    %s:\t0x%016" PRIx64, "rxc_active_sts",
 117                   rsp->rxc_active_sts);
 118         plt_print("    %s:\t0x%016" PRIx64, "rxc_zombie_sts",
 119                   rsp->rxc_zombie_sts);
 120         plt_print("    %s:\t0x%016" PRIx64, "rxc_dfrg", rsp->rxc_dfrg);
 121         plt_print("    %s:\t0x%016" PRIx64, "x2p_link_cfg0",
 122                   rsp->x2p_link_cfg0);
 123         plt_print("    %s:\t0x%016" PRIx64, "x2p_link_cfg1",
 124                   rsp->x2p_link_cfg1);
 125         plt_print("    %s:\t0x%016" PRIx64, "busy_sts_ae", rsp->busy_sts_ae);
 126         plt_print("    %s:\t0x%016" PRIx64, "free_sts_ae", rsp->free_sts_ae);
 127         plt_print("    %s:\t0x%016" PRIx64, "busy_sts_se", rsp->busy_sts_se);
 128         plt_print("    %s:\t0x%016" PRIx64, "free_sts_se", rsp->free_sts_se);
 129         plt_print("    %s:\t0x%016" PRIx64, "busy_sts_ie", rsp->busy_sts_ie);
 130         plt_print("    %s:\t0x%016" PRIx64, "free_sts_ie", rsp->free_sts_ie);
 131         plt_print("    %s:\t0x%016" PRIx64, "exe_err_info", rsp->exe_err_info);
 132         plt_print("    %s:\t\t0x%016" PRIx64, "cptclk_cnt", rsp->cptclk_cnt);
 133         plt_print("    %s:\t\t0x%016" PRIx64, "diag", rsp->diag);
 134
 135         return 0;
 136 }
 137
 138 int
 139 roc_cpt_afs_print(struct roc_cpt *roc_cpt)
 140 {
 141         uint64_t reg_val;
 142
 143         plt_print("CPT AF registers:");
 144
 145         if (cpt_af_reg_read(roc_cpt, CPT_AF_LFX_CTL(0), &reg_val))
 146                 return -EIO;
 147
 148         plt_print("    CPT_AF_LF0_CTL:\t0x%016" PRIx64, reg_val);
 149
 150         if (cpt_af_reg_read(roc_cpt, CPT_AF_LFX_CTL2(0), &reg_val))
 151                 return -EIO;
 152
 153         plt_print("    CPT_AF_LF0_CTL2:\t0x%016" PRIx64, reg_val);
 154
 155         cpt_sts_print(roc_cpt);
 156
 157         return 0;
 158 }
 159
 160 void
 161 cpt_lf_print(struct roc_cpt_lf *lf)
 162 {
 163         uint64_t reg_val;
 164
 165         reg_val = plt_read64(lf->rbase + CPT_LF_Q_BASE);
 166         plt_print("    CPT_LF_Q_BASE:\t%016lx", reg_val);
 167
 168         reg_val = plt_read64(lf->rbase + CPT_LF_Q_SIZE);
 169         plt_print("    CPT_LF_Q_SIZE:\t%016lx", reg_val);
 170
 171         reg_val = plt_read64(lf->rbase + CPT_LF_Q_INST_PTR);
 172         plt_print("    CPT_LF_Q_INST_PTR:\t%016lx", reg_val);
 173
 174         reg_val = plt_read64(lf->rbase + CPT_LF_Q_GRP_PTR);
 175         plt_print("    CPT_LF_Q_GRP_PTR:\t%016lx", reg_val);
 176
 177         reg_val = plt_read64(lf->rbase + CPT_LF_CTL);
 178         plt_print("    CPT_LF_CTL:\t%016lx", reg_val);
 179
 180         reg_val = plt_read64(lf->rbase + CPT_LF_MISC_INT_ENA_W1S);
 181         plt_print("    CPT_LF_MISC_INT_ENA_W1S:\t%016lx", reg_val);
 182
 183         reg_val = plt_read64(lf->rbase + CPT_LF_MISC_INT);
 184         plt_print("    CPT_LF_MISC_INT:\t%016lx", reg_val);
 185
 186         reg_val = plt_read64(lf->rbase + CPT_LF_INPROG);
 187         plt_print("    CPT_LF_INPROG:\t%016lx", reg_val);
 188
 189         if (roc_model_is_cn9k())
 190                 return;
 191
 192         plt_print("Count registers for CPT LF%d:", lf->lf_id);
 193
 194         reg_val = plt_read64(lf->rbase + CPT_LF_CTX_ENC_BYTE_CNT);
 195         plt_print("    Encrypted byte count:\t%" PRIu64, reg_val);
 196
 197         reg_val = plt_read64(lf->rbase + CPT_LF_CTX_ENC_PKT_CNT);
 198         plt_print("    Encrypted packet count:\t%" PRIu64, reg_val);
 199
 200         reg_val = plt_read64(lf->rbase + CPT_LF_CTX_DEC_BYTE_CNT);
 201         plt_print("    Decrypted byte count:\t%" PRIu64, reg_val);
 202
 203         reg_val = plt_read64(lf->rbase + CPT_LF_CTX_ENC_PKT_CNT);
 204         plt_print("    Decrypted packet count:\t%" PRIu64, reg_val);
 205 }
 206
 207 int
 208 roc_cpt_lfs_print(struct roc_cpt *roc_cpt)
 209 {
 210         struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
 211         struct roc_cpt_lf *lf;
 212         int lf_id;
 213
 214         if (cpt == NULL)
 215                 return -EINVAL;
 216
 217         for (lf_id = 0; lf_id < roc_cpt->nb_lf; lf_id++) {
 218                 lf = roc_cpt->lf[lf_id];
 219                 if (lf == NULL)
 220                         continue;
 221
 222                 cpt_lf_print(lf);
 223         }
 224
 225         return 0;
 226 }