1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
8 #define ROC_LMT_BASE_ID_GET(lmt_addr, lmt_id) \
10 /* 32 Lines per core */ \
11 lmt_id = plt_lcore_id() << ROC_LMT_LINES_PER_CORE_LOG2; \
12 /* Each line is of 128B */ \
13 (lmt_addr) += ((uint64_t)lmt_id << ROC_LMT_LINE_SIZE_LOG2); \
16 #define roc_load_pair(val0, val1, addr) \
18 asm volatile("ldp %x[x0], %x[x1], [%x[p1]]" \
19 : [x0] "=r"(val0), [x1] "=r"(val1) \
23 #define roc_store_pair(val0, val1, addr) \
26 "stp %x[x0], %x[x1], [%x[p1], #0]!" ::[x0] "r"(val0), \
27 [x1] "r"(val1), [p1] "r"(addr)); \
30 #define roc_prefetch_store_keep(ptr) \
31 ({ asm volatile("prfm pstl1keep, [%x0]\n" : : "r"(ptr)); })
33 #if defined(__clang__)
34 static __plt_always_inline void
35 roc_atomic128_cas_noreturn(uint64_t swap0, uint64_t swap1, int64_t *ptr)
37 register uint64_t x0 __asm("x0") = swap0;
38 register uint64_t x1 __asm("x1") = swap1;
40 asm volatile(PLT_CPU_FEATURE_PREAMBLE
41 "casp %[x0], %[x1], %[x0], %[x1], [%[ptr]]\n"
42 : [x0] "+r"(x0), [x1] "+r"(x1)
47 static __plt_always_inline void
48 roc_atomic128_cas_noreturn(uint64_t swap0, uint64_t swap1, uint64_t ptr)
50 __uint128_t wdata = swap0 | ((__uint128_t)swap1 << 64);
52 asm volatile(PLT_CPU_FEATURE_PREAMBLE
53 "casp %[wdata], %H[wdata], %[wdata], %H[wdata], [%[ptr]]\n"
60 static __plt_always_inline uint64_t
61 roc_atomic64_cas(uint64_t compare, uint64_t swap, int64_t *ptr)
63 asm volatile(PLT_CPU_FEATURE_PREAMBLE
64 "cas %[compare], %[swap], [%[ptr]]\n"
65 : [compare] "+r"(compare)
66 : [swap] "r"(swap), [ptr] "r"(ptr)
72 static __plt_always_inline uint64_t
73 roc_atomic64_add_nosync(int64_t incr, int64_t *ptr)
77 /* Atomic add with no ordering */
78 asm volatile(PLT_CPU_FEATURE_PREAMBLE "ldadd %x[i], %x[r], [%[b]]"
79 : [r] "=r"(result), "+m"(*ptr)
80 : [i] "r"(incr), [b] "r"(ptr)
85 static __plt_always_inline uint64_t
86 roc_atomic64_add_sync(int64_t incr, int64_t *ptr)
90 /* Atomic add with ordering */
91 asm volatile(PLT_CPU_FEATURE_PREAMBLE "ldadda %x[i], %x[r], [%[b]]"
92 : [r] "=r"(result), "+m"(*ptr)
93 : [i] "r"(incr), [b] "r"(ptr)
98 static __plt_always_inline uint64_t
99 roc_lmt_submit_ldeor(plt_iova_t io_address)
103 asm volatile(PLT_CPU_FEATURE_PREAMBLE "ldeor xzr, %x[rf], [%[rs]]"
105 : [rs] "r"(io_address));
109 static __plt_always_inline uint64_t
110 roc_lmt_submit_ldeorl(plt_iova_t io_address)
114 asm volatile(PLT_CPU_FEATURE_PREAMBLE "ldeorl xzr,%x[rf],[%[rs]]"
116 : [rs] "r"(io_address));
120 static __plt_always_inline void
121 roc_lmt_submit_steor(uint64_t data, plt_iova_t io_address)
123 asm volatile(PLT_CPU_FEATURE_PREAMBLE
124 "steor %x[d], [%[rs]]" ::[d] "r"(data),
125 [rs] "r"(io_address));
128 static __plt_always_inline void
129 roc_lmt_submit_steorl(uint64_t data, plt_iova_t io_address)
131 asm volatile(PLT_CPU_FEATURE_PREAMBLE
132 "steorl %x[d], [%[rs]]" ::[d] "r"(data),
133 [rs] "r"(io_address));
136 static __plt_always_inline void
137 roc_lmt_mov(void *out, const void *in, const uint32_t lmtext)
139 volatile const __uint128_t *src128 = (const __uint128_t *)in;
140 volatile __uint128_t *dst128 = (__uint128_t *)out;
142 dst128[0] = src128[0];
143 dst128[1] = src128[1];
144 /* lmtext receives following value:
145 * 1: NIX_SUBDC_EXT needed i.e. tx vlan case
146 * 2: NIX_SUBDC_EXT + NIX_SUBDC_MEM i.e. tstamp case
149 dst128[2] = src128[2];
151 dst128[3] = src128[3];
155 static __plt_always_inline void
156 roc_lmt_mov_seg(void *out, const void *in, const uint16_t segdw)
158 volatile const __uint128_t *src128 = (const __uint128_t *)in;
159 volatile __uint128_t *dst128 = (__uint128_t *)out;
162 for (i = 0; i < segdw; i++)
163 dst128[i] = src128[i];
166 static __plt_always_inline void
167 roc_lmt_mov_one(void *out, const void *in)
169 volatile const __uint128_t *src128 = (const __uint128_t *)in;
170 volatile __uint128_t *dst128 = (__uint128_t *)out;
175 /* Non volatile version of roc_lmt_mov_seg() */
176 static __plt_always_inline void
177 roc_lmt_mov_seg_nv(void *out, const void *in, const uint16_t segdw)
179 const __uint128_t *src128 = (const __uint128_t *)in;
180 __uint128_t *dst128 = (__uint128_t *)out;
183 for (i = 0; i < segdw; i++)
184 dst128[i] = src128[i];
187 static __plt_always_inline void
190 /* This will allow wfi in EL0 to cause async exception to EL3
191 * which will optionally perform necessary actions.
196 #endif /* _ROC_IO_H_ */