1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
9 roc_nix_is_lbk(struct roc_nix *roc_nix)
11 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
17 roc_nix_get_base_chan(struct roc_nix *roc_nix)
19 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
21 return nix->rx_chan_base;
25 roc_nix_get_vwqe_interval(struct roc_nix *roc_nix)
27 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
29 return nix->vwqe_interval;
33 roc_nix_is_sdp(struct roc_nix *roc_nix)
35 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
41 roc_nix_is_pf(struct roc_nix *roc_nix)
43 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
45 return !dev_is_vf(&nix->dev);
49 roc_nix_get_pf(struct roc_nix *roc_nix)
51 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
52 struct dev *dev = &nix->dev;
54 return dev_get_pf(dev->pf_func);
58 roc_nix_get_vf(struct roc_nix *roc_nix)
60 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
61 struct dev *dev = &nix->dev;
63 return dev_get_vf(dev->pf_func);
67 roc_nix_is_vf_or_sdp(struct roc_nix *roc_nix)
69 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
71 return (dev_is_vf(&nix->dev) != 0) || roc_nix_is_sdp(roc_nix);
75 roc_nix_get_pf_func(struct roc_nix *roc_nix)
77 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
78 struct dev *dev = &nix->dev;
84 roc_nix_max_pkt_len(struct roc_nix *roc_nix)
86 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
88 if (roc_model_is_cn9k())
89 return NIX_CN9K_MAX_HW_FRS;
91 if (nix->lbk_link || roc_nix_is_sdp(roc_nix))
92 return NIX_LBK_MAX_HW_FRS;
94 return NIX_RPM_MAX_HW_FRS;
98 roc_nix_lf_alloc(struct roc_nix *roc_nix, uint32_t nb_rxq, uint32_t nb_txq,
101 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
102 struct mbox *mbox = (&nix->dev)->mbox;
103 struct nix_lf_alloc_req *req;
104 struct nix_lf_alloc_rsp *rsp;
107 req = mbox_alloc_msg_nix_lf_alloc(mbox);
110 req->rq_cnt = nb_rxq;
111 req->sq_cnt = nb_txq;
112 req->cq_cnt = nb_rxq;
113 /* XQESZ can be W64 or W16 */
114 req->xqe_sz = NIX_XQESZ_W16;
115 req->rss_sz = nix->reta_sz;
116 req->rss_grps = ROC_NIX_RSS_GRPS;
117 req->npa_func = idev_npa_pffunc_get();
118 req->rx_cfg = rx_cfg;
120 if (!roc_nix->rss_tag_as_xor)
121 req->flags = NIX_LF_RSS_TAG_LSB_AS_ADDER;
123 rc = mbox_process_msg(mbox, (void *)&rsp);
127 nix->sqb_size = rsp->sqb_size;
128 nix->tx_chan_base = rsp->tx_chan_base;
129 nix->rx_chan_base = rsp->rx_chan_base;
130 if (roc_nix_is_lbk(roc_nix) && roc_nix->enable_loop)
131 nix->tx_chan_base = rsp->rx_chan_base;
132 nix->rx_chan_cnt = rsp->rx_chan_cnt;
133 nix->tx_chan_cnt = rsp->tx_chan_cnt;
134 nix->lso_tsov4_idx = rsp->lso_tsov4_idx;
135 nix->lso_tsov6_idx = rsp->lso_tsov6_idx;
136 nix->lf_tx_stats = rsp->lf_tx_stats;
137 nix->lf_rx_stats = rsp->lf_rx_stats;
138 nix->cints = rsp->cints;
139 roc_nix->cints = rsp->cints;
140 nix->qints = rsp->qints;
141 nix->ptp_en = rsp->hw_rx_tstamp_en;
142 roc_nix->rx_ptp_ena = rsp->hw_rx_tstamp_en;
143 nix->cgx_links = rsp->cgx_links;
144 nix->lbk_links = rsp->lbk_links;
145 nix->sdp_links = rsp->sdp_links;
146 nix->tx_link = rsp->tx_link;
147 nix->nb_rx_queues = nb_rxq;
148 nix->nb_tx_queues = nb_txq;
149 nix->sqs = plt_zmalloc(sizeof(struct roc_nix_sq *) * nb_txq, 0);
157 roc_nix_lf_free(struct roc_nix *roc_nix)
159 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
160 struct mbox *mbox = (&nix->dev)->mbox;
161 struct nix_lf_free_req *req;
162 struct ndc_sync_op *ndc_req;
168 /* Sync NDC-NIX for LF */
169 ndc_req = mbox_alloc_msg_ndc_sync_op(mbox);
172 ndc_req->nix_lf_tx_sync = 1;
173 ndc_req->nix_lf_rx_sync = 1;
174 rc = mbox_process(mbox);
176 plt_err("Error on NDC-NIX-[TX, RX] LF sync, rc %d", rc);
178 req = mbox_alloc_msg_nix_lf_free(mbox);
181 /* Let AF driver free all this nix lf's
182 * NPC entries allocated using NPC MBOX.
186 return mbox_process(mbox);
190 nix_lf_attach(struct dev *dev)
192 struct mbox *mbox = dev->mbox;
193 struct rsrc_attach_req *req;
197 req = mbox_alloc_msg_attach_resources(mbox);
203 return mbox_process(mbox);
207 nix_lf_get_msix_offset(struct dev *dev, struct nix *nix)
209 struct msix_offset_rsp *msix_rsp;
210 struct mbox *mbox = dev->mbox;
213 /* Get MSIX vector offsets */
214 mbox_alloc_msg_msix_offset(mbox);
215 rc = mbox_process_msg(mbox, (void *)&msix_rsp);
217 nix->msixoff = msix_rsp->nix_msixoff;
223 nix_lf_detach(struct nix *nix)
225 struct mbox *mbox = (&nix->dev)->mbox;
226 struct rsrc_detach_req *req;
229 req = mbox_alloc_msg_detach_resources(mbox);
235 return mbox_process(mbox);
239 roc_nix_get_hw_info(struct roc_nix *roc_nix)
241 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
242 struct mbox *mbox = (&nix->dev)->mbox;
243 struct nix_hw_info *hw_info;
246 mbox_alloc_msg_nix_get_hw_info(mbox);
247 rc = mbox_process_msg(mbox, (void *)&hw_info);
249 nix->vwqe_interval = hw_info->vwqe_delay;
255 sdp_lbk_id_update(struct plt_pci_device *pci_dev, struct nix *nix)
257 nix->sdp_link = false;
258 nix->lbk_link = false;
260 /* Update SDP/LBK link based on PCI device id */
261 switch (pci_dev->id.device_id) {
262 case PCI_DEVID_CNXK_RVU_SDP_PF:
263 case PCI_DEVID_CNXK_RVU_SDP_VF:
264 nix->sdp_link = true;
266 case PCI_DEVID_CNXK_RVU_AF_VF:
267 nix->lbk_link = true;
274 static inline uint64_t
275 nix_get_blkaddr(struct dev *dev)
279 /* Reading the discovery register to know which NIX is the LF
282 reg = plt_read64(dev->bar2 +
283 RVU_PF_BLOCK_ADDRX_DISC(RVU_BLOCK_ADDR_NIX0));
285 return reg & 0x1FFULL ? RVU_BLOCK_ADDR_NIX0 : RVU_BLOCK_ADDR_NIX1;
289 roc_nix_dev_init(struct roc_nix *roc_nix)
291 enum roc_nix_rss_reta_sz reta_sz;
292 struct plt_pci_device *pci_dev;
293 uint16_t max_sqb_count;
299 if (roc_nix == NULL || roc_nix->pci_dev == NULL)
300 return NIX_ERR_PARAM;
302 reta_sz = roc_nix->reta_sz;
303 if (reta_sz != 0 && reta_sz != 64 && reta_sz != 128 && reta_sz != 256)
304 return NIX_ERR_PARAM;
307 reta_sz = ROC_NIX_RSS_RETA_SZ_64;
309 max_sqb_count = roc_nix->max_sqb_count;
310 max_sqb_count = PLT_MIN(max_sqb_count, NIX_MAX_SQB);
311 max_sqb_count = PLT_MAX(max_sqb_count, NIX_MIN_SQB);
312 roc_nix->max_sqb_count = max_sqb_count;
314 PLT_STATIC_ASSERT(sizeof(struct nix) <= ROC_NIX_MEM_SZ);
315 nix = roc_nix_to_nix_priv(roc_nix);
316 pci_dev = roc_nix->pci_dev;
319 if (nix->dev.drv_inited)
322 if (dev->mbox_active)
325 memset(nix, 0, sizeof(*nix));
326 /* Initialize device */
327 rc = dev_init(dev, pci_dev);
329 plt_err("Failed to init roc device");
334 dev->roc_nix = roc_nix;
336 nix->lmt_base = dev->lmt_base;
337 /* Expose base LMT line address for
338 * "Per Core LMT line" mode.
340 roc_nix->lmt_base = dev->lmt_base;
343 rc = nix_lf_attach(dev);
347 blkaddr = nix_get_blkaddr(dev);
348 nix->is_nix1 = (blkaddr == RVU_BLOCK_ADDR_NIX1);
350 /* Calculating base address based on which NIX block LF
353 nix->base = dev->bar2 + (blkaddr << 20);
355 /* Get NIX MSIX offset */
356 rc = nix_lf_get_msix_offset(dev, nix);
360 /* Update nix context */
361 sdp_lbk_id_update(pci_dev, nix);
362 nix->pci_dev = pci_dev;
363 nix->reta_sz = reta_sz;
364 nix->mtu = ROC_NIX_DEFAULT_HW_FRS;
366 /* Register error and ras interrupts */
367 rc = nix_register_irqs(nix);
371 /* Get NIX HW info */
372 roc_nix_get_hw_info(roc_nix);
373 nix->dev.drv_inited = true;
379 rc |= dev_fini(dev, pci_dev);
385 roc_nix_dev_fini(struct roc_nix *roc_nix)
387 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
391 return NIX_ERR_PARAM;
393 if (!nix->dev.drv_inited)
396 nix_unregister_irqs(nix);
398 rc = nix_lf_detach(nix);
399 nix->dev.drv_inited = false;
401 rc |= dev_fini(&nix->dev, nix->pci_dev);