1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
9 roc_nix_is_lbk(struct roc_nix *roc_nix)
11 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
17 roc_nix_get_base_chan(struct roc_nix *roc_nix)
19 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
21 return nix->rx_chan_base;
25 roc_nix_get_vwqe_interval(struct roc_nix *roc_nix)
27 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
29 return nix->vwqe_interval;
33 roc_nix_is_sdp(struct roc_nix *roc_nix)
35 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
41 roc_nix_is_pf(struct roc_nix *roc_nix)
43 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
45 return !dev_is_vf(&nix->dev);
49 roc_nix_get_pf(struct roc_nix *roc_nix)
51 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
52 struct dev *dev = &nix->dev;
54 return dev_get_pf(dev->pf_func);
58 roc_nix_get_vf(struct roc_nix *roc_nix)
60 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
61 struct dev *dev = &nix->dev;
63 return dev_get_vf(dev->pf_func);
67 roc_nix_is_vf_or_sdp(struct roc_nix *roc_nix)
69 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
71 return (dev_is_vf(&nix->dev) != 0) || roc_nix_is_sdp(roc_nix);
75 roc_nix_get_pf_func(struct roc_nix *roc_nix)
77 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
78 struct dev *dev = &nix->dev;
84 roc_nix_lf_inl_ipsec_cfg(struct roc_nix *roc_nix, struct roc_nix_ipsec_cfg *cfg,
87 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
88 struct nix_inline_ipsec_lf_cfg *lf_cfg;
89 struct mbox *mbox = (&nix->dev)->mbox;
91 lf_cfg = mbox_alloc_msg_nix_inline_ipsec_lf_cfg(mbox);
97 lf_cfg->sa_base_addr = cfg->iova;
98 lf_cfg->ipsec_cfg1.sa_idx_w = plt_log2_u32(cfg->max_sa);
99 lf_cfg->ipsec_cfg0.lenm1_max = roc_nix_max_pkt_len(roc_nix) - 1;
100 lf_cfg->ipsec_cfg1.sa_idx_max = cfg->max_sa - 1;
101 lf_cfg->ipsec_cfg0.sa_pow2_size = plt_log2_u32(cfg->sa_size);
102 lf_cfg->ipsec_cfg0.tag_const = cfg->tag_const;
103 lf_cfg->ipsec_cfg0.tt = cfg->tt;
108 return mbox_process(mbox);
112 roc_nix_max_pkt_len(struct roc_nix *roc_nix)
114 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
116 if (roc_model_is_cn9k())
117 return NIX_CN9K_MAX_HW_FRS;
119 if (nix->lbk_link || roc_nix_is_sdp(roc_nix))
120 return NIX_LBK_MAX_HW_FRS;
122 return NIX_RPM_MAX_HW_FRS;
126 roc_nix_lf_alloc(struct roc_nix *roc_nix, uint32_t nb_rxq, uint32_t nb_txq,
129 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
130 struct mbox *mbox = (&nix->dev)->mbox;
131 struct nix_lf_alloc_req *req;
132 struct nix_lf_alloc_rsp *rsp;
135 req = mbox_alloc_msg_nix_lf_alloc(mbox);
138 req->rq_cnt = nb_rxq;
139 req->sq_cnt = nb_txq;
140 req->cq_cnt = nb_rxq;
141 /* XQESZ can be W64 or W16 */
142 req->xqe_sz = NIX_XQESZ_W16;
143 req->rss_sz = nix->reta_sz;
144 req->rss_grps = ROC_NIX_RSS_GRPS;
145 req->npa_func = idev_npa_pffunc_get();
146 req->rx_cfg = rx_cfg;
148 if (!roc_nix->rss_tag_as_xor)
149 req->flags = NIX_LF_RSS_TAG_LSB_AS_ADDER;
151 rc = mbox_process_msg(mbox, (void *)&rsp);
155 nix->sqb_size = rsp->sqb_size;
156 nix->tx_chan_base = rsp->tx_chan_base;
157 nix->rx_chan_base = rsp->rx_chan_base;
158 if (roc_nix_is_lbk(roc_nix) && roc_nix->enable_loop)
159 nix->tx_chan_base = rsp->rx_chan_base;
160 nix->rx_chan_cnt = rsp->rx_chan_cnt;
161 nix->tx_chan_cnt = rsp->tx_chan_cnt;
162 nix->lso_tsov4_idx = rsp->lso_tsov4_idx;
163 nix->lso_tsov6_idx = rsp->lso_tsov6_idx;
164 nix->lf_tx_stats = rsp->lf_tx_stats;
165 nix->lf_rx_stats = rsp->lf_rx_stats;
166 nix->cints = rsp->cints;
167 roc_nix->cints = rsp->cints;
168 nix->qints = rsp->qints;
169 nix->ptp_en = rsp->hw_rx_tstamp_en;
170 roc_nix->rx_ptp_ena = rsp->hw_rx_tstamp_en;
171 nix->cgx_links = rsp->cgx_links;
172 nix->lbk_links = rsp->lbk_links;
173 nix->sdp_links = rsp->sdp_links;
174 nix->tx_link = rsp->tx_link;
175 nix->nb_rx_queues = nb_rxq;
176 nix->nb_tx_queues = nb_txq;
177 nix->sqs = plt_zmalloc(sizeof(struct roc_nix_sq *) * nb_txq, 0);
185 roc_nix_lf_free(struct roc_nix *roc_nix)
187 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
188 struct mbox *mbox = (&nix->dev)->mbox;
189 struct nix_lf_free_req *req;
190 struct ndc_sync_op *ndc_req;
196 /* Sync NDC-NIX for LF */
197 ndc_req = mbox_alloc_msg_ndc_sync_op(mbox);
200 ndc_req->nix_lf_tx_sync = 1;
201 ndc_req->nix_lf_rx_sync = 1;
202 rc = mbox_process(mbox);
204 plt_err("Error on NDC-NIX-[TX, RX] LF sync, rc %d", rc);
206 req = mbox_alloc_msg_nix_lf_free(mbox);
209 /* Let AF driver free all this nix lf's
210 * NPC entries allocated using NPC MBOX.
214 return mbox_process(mbox);
218 nix_lf_attach(struct dev *dev)
220 struct mbox *mbox = dev->mbox;
221 struct rsrc_attach_req *req;
225 req = mbox_alloc_msg_attach_resources(mbox);
231 return mbox_process(mbox);
235 nix_lf_get_msix_offset(struct dev *dev, struct nix *nix)
237 struct msix_offset_rsp *msix_rsp;
238 struct mbox *mbox = dev->mbox;
241 /* Get MSIX vector offsets */
242 mbox_alloc_msg_msix_offset(mbox);
243 rc = mbox_process_msg(mbox, (void *)&msix_rsp);
245 nix->msixoff = msix_rsp->nix_msixoff;
251 nix_lf_detach(struct nix *nix)
253 struct mbox *mbox = (&nix->dev)->mbox;
254 struct rsrc_detach_req *req;
257 req = mbox_alloc_msg_detach_resources(mbox);
263 return mbox_process(mbox);
267 roc_nix_get_hw_info(struct roc_nix *roc_nix)
269 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
270 struct mbox *mbox = (&nix->dev)->mbox;
271 struct nix_hw_info *hw_info;
274 mbox_alloc_msg_nix_get_hw_info(mbox);
275 rc = mbox_process_msg(mbox, (void *)&hw_info);
277 nix->vwqe_interval = hw_info->vwqe_delay;
283 sdp_lbk_id_update(struct plt_pci_device *pci_dev, struct nix *nix)
285 nix->sdp_link = false;
286 nix->lbk_link = false;
288 /* Update SDP/LBK link based on PCI device id */
289 switch (pci_dev->id.device_id) {
290 case PCI_DEVID_CNXK_RVU_SDP_PF:
291 case PCI_DEVID_CNXK_RVU_SDP_VF:
292 nix->sdp_link = true;
294 case PCI_DEVID_CNXK_RVU_AF_VF:
295 nix->lbk_link = true;
302 static inline uint64_t
303 nix_get_blkaddr(struct dev *dev)
307 /* Reading the discovery register to know which NIX is the LF
310 reg = plt_read64(dev->bar2 +
311 RVU_PF_BLOCK_ADDRX_DISC(RVU_BLOCK_ADDR_NIX0));
313 return reg & 0x1FFULL ? RVU_BLOCK_ADDR_NIX0 : RVU_BLOCK_ADDR_NIX1;
317 roc_nix_dev_init(struct roc_nix *roc_nix)
319 enum roc_nix_rss_reta_sz reta_sz;
320 struct plt_pci_device *pci_dev;
321 uint16_t max_sqb_count;
327 if (roc_nix == NULL || roc_nix->pci_dev == NULL)
328 return NIX_ERR_PARAM;
330 reta_sz = roc_nix->reta_sz;
331 if (reta_sz != 0 && reta_sz != 64 && reta_sz != 128 && reta_sz != 256)
332 return NIX_ERR_PARAM;
335 reta_sz = ROC_NIX_RSS_RETA_SZ_64;
337 max_sqb_count = roc_nix->max_sqb_count;
338 max_sqb_count = PLT_MIN(max_sqb_count, NIX_MAX_SQB);
339 max_sqb_count = PLT_MAX(max_sqb_count, NIX_MIN_SQB);
340 roc_nix->max_sqb_count = max_sqb_count;
342 PLT_STATIC_ASSERT(sizeof(struct nix) <= ROC_NIX_MEM_SZ);
343 nix = roc_nix_to_nix_priv(roc_nix);
344 pci_dev = roc_nix->pci_dev;
347 if (nix->dev.drv_inited)
350 if (dev->mbox_active)
353 memset(nix, 0, sizeof(*nix));
354 /* Initialize device */
355 rc = dev_init(dev, pci_dev);
357 plt_err("Failed to init roc device");
362 dev->roc_nix = roc_nix;
364 nix->lmt_base = dev->lmt_base;
365 /* Expose base LMT line address for
366 * "Per Core LMT line" mode.
368 roc_nix->lmt_base = dev->lmt_base;
371 rc = nix_lf_attach(dev);
375 blkaddr = nix_get_blkaddr(dev);
376 nix->is_nix1 = (blkaddr == RVU_BLOCK_ADDR_NIX1);
378 /* Calculating base address based on which NIX block LF
381 nix->base = dev->bar2 + (blkaddr << 20);
383 /* Get NIX MSIX offset */
384 rc = nix_lf_get_msix_offset(dev, nix);
388 /* Update nix context */
389 sdp_lbk_id_update(pci_dev, nix);
390 nix->pci_dev = pci_dev;
391 nix->reta_sz = reta_sz;
392 nix->mtu = ROC_NIX_DEFAULT_HW_FRS;
394 /* Register error and ras interrupts */
395 rc = nix_register_irqs(nix);
399 /* Get NIX HW info */
400 roc_nix_get_hw_info(roc_nix);
401 nix->dev.drv_inited = true;
407 rc |= dev_fini(dev, pci_dev);
413 roc_nix_dev_fini(struct roc_nix *roc_nix)
415 struct nix *nix = roc_nix_to_nix_priv(roc_nix);
419 return NIX_ERR_PARAM;
421 if (!nix->dev.drv_inited)
424 nix_unregister_irqs(nix);
426 rc = nix_lf_detach(nix);
427 nix->dev.drv_inited = false;
429 rc |= dev_fini(&nix->dev, nix->pci_dev);