1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
4 #ifndef _ROC_NIX_INL_PRIV_H_
5 #define _ROC_NIX_INL_PRIV_H_
8 /* Base device object */
12 struct plt_pci_device *pci_dev;
14 /* LF specific BAR2 regions */
20 /* MSIX vector offsets */
22 uint16_t ssow_msixoff;
27 uint32_t xaq_buf_size;
32 roc_nix_inl_sso_work_cb_t work_cb;
38 uint16_t vwqe_interval;
50 struct roc_cpt_lf cpt_lf;
52 /* Device arguments */
56 bool is_multi_channel;
57 uint16_t ipsec_in_max_spi;
61 int nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev);
62 void nix_inl_sso_unregister_irqs(struct nix_inl_dev *inl_dev);
64 int nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev);
65 void nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev);
67 uint16_t nix_inl_dev_pffunc_get(void);
69 #endif /* _ROC_NIX_INL_PRIV_H_ */