drivers/common/cnxk/roc_nix_xstats.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4 #ifndef _ROC_NIX_XSTAT_H_
   5 #define _ROC_NIX_XSTAT_H_
   6
   7 #include <inttypes.h>
   8
   9 struct cnxk_nix_xstats_name {
  10         char name[ROC_NIX_XSTATS_NAME_SIZE];
  11         uint32_t offset;
  12 };
  13
  14 static const struct cnxk_nix_xstats_name nix_tx_xstats[] = {
  15         {"tx_ucast", NIX_STAT_LF_TX_TX_UCAST},
  16         {"tx_bcast", NIX_STAT_LF_TX_TX_BCAST},
  17         {"tx_mcast", NIX_STAT_LF_TX_TX_MCAST},
  18         {"tx_drop", NIX_STAT_LF_TX_TX_DROP},
  19         {"tx_octs", NIX_STAT_LF_TX_TX_OCTS},
  20 };
  21
  22 static const struct cnxk_nix_xstats_name nix_rx_xstats[] = {
  23         {"rx_octs", NIX_STAT_LF_RX_RX_OCTS},
  24         {"rx_ucast", NIX_STAT_LF_RX_RX_UCAST},
  25         {"rx_bcast", NIX_STAT_LF_RX_RX_BCAST},
  26         {"rx_mcast", NIX_STAT_LF_RX_RX_MCAST},
  27         {"rx_drop", NIX_STAT_LF_RX_RX_DROP},
  28         {"rx_drop_octs", NIX_STAT_LF_RX_RX_DROP_OCTS},
  29         {"rx_fcs", NIX_STAT_LF_RX_RX_FCS},
  30         {"rx_err", NIX_STAT_LF_RX_RX_ERR},
  31         {"rx_drp_bcast", NIX_STAT_LF_RX_RX_DRP_BCAST},
  32         {"rx_drp_mcast", NIX_STAT_LF_RX_RX_DRP_MCAST},
  33         {"rx_drp_l3bcast", NIX_STAT_LF_RX_RX_DRP_L3BCAST},
  34         {"rx_drp_l3mcast", NIX_STAT_LF_RX_RX_DRP_L3MCAST},
  35 };
  36
  37 static const struct cnxk_nix_xstats_name nix_cn10k_rx_xstats[] = {
  38         {"rx_gc_octs_pass", NIX_STAT_LF_RX_RX_GC_OCTS_PASSED},
  39         {"rx_gc_pkts_pass", NIX_STAT_LF_RX_RX_GC_PKTS_PASSED},
  40         {"rx_yc_octs_pass", NIX_STAT_LF_RX_RX_YC_OCTS_PASSED},
  41         {"rx_yc_pkts_pass", NIX_STAT_LF_RX_RX_YC_PKTS_PASSED},
  42         {"rx_rc_octs_pass", NIX_STAT_LF_RX_RX_RC_OCTS_PASSED},
  43         {"rx_rc_pkts_pass", NIX_STAT_LF_RX_RX_RC_PKTS_PASSED},
  44         {"rx_gc_octs_drop", NIX_STAT_LF_RX_RX_GC_OCTS_DROP},
  45         {"rx_gc_pkts_drop", NIX_STAT_LF_RX_RX_GC_PKTS_DROP},
  46         {"rx_yc_octs_drop", NIX_STAT_LF_RX_RX_YC_OCTS_DROP},
  47         {"rx_yc_pkts_drop", NIX_STAT_LF_RX_RX_YC_PKTS_DROP},
  48         {"rx_rc_octs_drop", NIX_STAT_LF_RX_RX_RC_OCTS_DROP},
  49         {"rx_rc_pkts_drop", NIX_STAT_LF_RX_RX_RC_PKTS_DROP},
  50         {"rx_cpt_pkts_drop", NIX_STAT_LF_RX_RX_CPT_DROP_PKTS},
  51         {"rx_ipsecd_pkts_drop", NIX_STAT_LF_RX_RX_IPSECD_DROP_PKTS},
  52 };
  53
  54 static const struct cnxk_nix_xstats_name nix_q_xstats[] = {
  55         {"rq_op_re_pkts", NIX_LF_RQ_OP_RE_PKTS},
  56 };
  57
  58 static const struct cnxk_nix_xstats_name nix_rx_xstats_rpm[] = {
  59         {"rpm_rx_etherStatsOctets", RPM_MTI_STAT_RX_OCT_CNT},
  60         {"rpm_rx_OctetsReceivedOK", RPM_MTI_STAT_RX_OCT_RECV_OK},
  61         {"rpm_rx_aAlignmentErrors", RPM_MTI_STAT_RX_ALIG_ERR},
  62         {"rpm_rx_aPAUSEMACCtrlFramesReceived", RPM_MTI_STAT_RX_CTRL_FRM_RECV},
  63         {"rpm_rx_aFrameTooLongErrors", RPM_MTI_STAT_RX_FRM_LONG},
  64         {"rpm_rx_aInRangeLengthErrors", RPM_MTI_STAT_RX_LEN_ERR},
  65         {"rpm_rx_aFramesReceivedOK", RPM_MTI_STAT_RX_FRM_RECV},
  66         {"rpm_rx_aFrameCheckSequenceErrors", RPM_MTI_STAT_RX_FRM_SEQ_ERR},
  67         {"rpm_rx_VLANReceivedOK", RPM_MTI_STAT_RX_VLAN_OK},
  68         {"rpm_rx_ifInErrors", RPM_MTI_STAT_RX_IN_ERR},
  69         {"rpm_rx_ifInUcastPkts", RPM_MTI_STAT_RX_IN_UCAST_PKT},
  70         {"rpm_rx_ifInMulticastPkts", RPM_MTI_STAT_RX_IN_MCAST_PKT},
  71         {"rpm_rx_ifInBroadcastPkts", RPM_MTI_STAT_RX_IN_BCAST_PKT},
  72         {"rpm_rx_etherStatsDropEvents", RPM_MTI_STAT_RX_DRP_EVENTS},
  73         {"rpm_rx_etherStatsPkts", RPM_MTI_STAT_RX_PKT},
  74         {"rpm_rx_etherStatsUndersizePkts", RPM_MTI_STAT_RX_UNDER_SIZE},
  75         {"rpm_rx_etherStatsPkts64Octets", RPM_MTI_STAT_RX_1_64_PKT_CNT},
  76         {"rpm_rx_etherStatsPkts65to127Octets", RPM_MTI_STAT_RX_65_127_PKT_CNT},
  77         {"rpm_rx_etherStatsPkts128to255Octets",
  78          RPM_MTI_STAT_RX_128_255_PKT_CNT},
  79         {"rpm_rx_etherStatsPkts256to511Octets",
  80          RPM_MTI_STAT_RX_256_511_PKT_CNT},
  81         {"rpm_rx_etherStatsPkts512to1023Octets",
  82          RPM_MTI_STAT_RX_512_1023_PKT_CNT},
  83         {"rpm_rx_etherStatsPkts1024to1518Octets",
  84          RPM_MTI_STAT_RX_1024_1518_PKT_CNT},
  85         {"rpm_rx_etherStatsPkts1519toMaxOctets",
  86          RPM_MTI_STAT_RX_1519_MAX_PKT_CNT},
  87         {"rpm_rx_etherStatsOversizePkts", RPM_MTI_STAT_RX_OVER_SIZE},
  88         {"rpm_rx_etherStatsJabbers", RPM_MTI_STAT_RX_JABBER},
  89         {"rpm_rx_etherStatsFragments", RPM_MTI_STAT_RX_ETH_FRAGS},
  90         {"rpm_rx_CBFC_pause_frames_class_0", RPM_MTI_STAT_RX_CBFC_CLASS_0},
  91         {"rpm_rx_CBFC_pause_frames_class_1", RPM_MTI_STAT_RX_CBFC_CLASS_1},
  92         {"rpm_rx_CBFC_pause_frames_class_2", RPM_MTI_STAT_RX_CBFC_CLASS_2},
  93         {"rpm_rx_CBFC_pause_frames_class_3", RPM_MTI_STAT_RX_CBFC_CLASS_3},
  94         {"rpm_rx_CBFC_pause_frames_class_4", RPM_MTI_STAT_RX_CBFC_CLASS_4},
  95         {"rpm_rx_CBFC_pause_frames_class_5", RPM_MTI_STAT_RX_CBFC_CLASS_5},
  96         {"rpm_rx_CBFC_pause_frames_class_6", RPM_MTI_STAT_RX_CBFC_CLASS_6},
  97         {"rpm_rx_CBFC_pause_frames_class_7", RPM_MTI_STAT_RX_CBFC_CLASS_7},
  98         {"rpm_rx_CBFC_pause_frames_class_8", RPM_MTI_STAT_RX_CBFC_CLASS_8},
  99         {"rpm_rx_CBFC_pause_frames_class_9", RPM_MTI_STAT_RX_CBFC_CLASS_9},
 100         {"rpm_rx_CBFC_pause_frames_class_10", RPM_MTI_STAT_RX_CBFC_CLASS_10},
 101         {"rpm_rx_CBFC_pause_frames_class_11", RPM_MTI_STAT_RX_CBFC_CLASS_11},
 102         {"rpm_rx_CBFC_pause_frames_class_12", RPM_MTI_STAT_RX_CBFC_CLASS_12},
 103         {"rpm_rx_CBFC_pause_frames_class_13", RPM_MTI_STAT_RX_CBFC_CLASS_13},
 104         {"rpm_rx_CBFC_pause_frames_class_14", RPM_MTI_STAT_RX_CBFC_CLASS_14},
 105         {"rpm_rx_CBFC_pause_frames_class_15", RPM_MTI_STAT_RX_CBFC_CLASS_15},
 106         {"rpm_rx_aMACControlFramesReceived", RPM_MTI_STAT_RX_MAC_CONTROL},
 107 };
 108
 109 static const struct cnxk_nix_xstats_name nix_tx_xstats_rpm[] = {
 110         {"rpm_tx_etherStatsOctets", RPM_MTI_STAT_TX_OCT_CNT},
 111         {"rpm_tx_OctetsTransmittedOK", RPM_MTI_STAT_TX_OCT_TX_OK},
 112         {"rpm_tx_aPAUSEMACCtrlFramesTransmitted",
 113          RPM_MTI_STAT_TX_PAUSE_MAC_CTRL},
 114         {"rpm_tx_aFramesTransmittedOK", RPM_MTI_STAT_TX_FRAMES_OK},
 115         {"rpm_tx_VLANTransmittedOK", RPM_MTI_STAT_TX_VLAN_OK},
 116         {"rpm_tx_ifOutErrors", RPM_MTI_STAT_TX_OUT_ERR},
 117         {"rpm_tx_ifOutUcastPkts", RPM_MTI_STAT_TX_UCAST_PKT_CNT},
 118         {"rpm_tx_ifOutMulticastPkts", RPM_MTI_STAT_TX_MCAST_PKT_CNT},
 119         {"rpm_tx_ifOutBroadcastPkts", RPM_MTI_STAT_TX_BCAST_PKT_CNT},
 120         {"rpm_tx_etherStatsPkts64Octets", RPM_MTI_STAT_TX_1_64_PKT_CNT},
 121         {"rpm_tx_etherStatsPkts65to127Octets", RPM_MTI_STAT_TX_65_127_PKT_CNT},
 122         {"rpm_tx_etherStatsPkts128to255Octets",
 123          RPM_MTI_STAT_TX_128_255_PKT_CNT},
 124         {"rpm_tx_etherStatsPkts256to511Octets",
 125          RPM_MTI_STAT_TX_256_511_PKT_CNT},
 126         {"rpm_tx_etherStatsPkts512to1023Octets",
 127          RPM_MTI_STAT_TX_512_1023_PKT_CNT},
 128         {"rpm_tx_etherStatsPkts1024to1518Octets",
 129          RPM_MTI_STAT_TX_1024_1518_PKT_CNT},
 130         {"rpm_tx_etherStatsPkts1519toMaxOctets",
 131          RPM_MTI_STAT_TX_1519_MAX_PKT_CNT},
 132         {"rpm_tx_CBFC_pause_frames_class_0", RPM_MTI_STAT_TX_CBFC_CLASS_0},
 133         {"rpm_tx_CBFC_pause_frames_class_1", RPM_MTI_STAT_TX_CBFC_CLASS_1},
 134         {"rpm_tx_CBFC_pause_frames_class_2", RPM_MTI_STAT_TX_CBFC_CLASS_2},
 135         {"rpm_tx_CBFC_pause_frames_class_3", RPM_MTI_STAT_TX_CBFC_CLASS_3},
 136         {"rpm_tx_CBFC_pause_frames_class_4", RPM_MTI_STAT_TX_CBFC_CLASS_4},
 137         {"rpm_tx_CBFC_pause_frames_class_5", RPM_MTI_STAT_TX_CBFC_CLASS_5},
 138         {"rpm_tx_CBFC_pause_frames_class_6", RPM_MTI_STAT_TX_CBFC_CLASS_6},
 139         {"rpm_tx_CBFC_pause_frames_class_7", RPM_MTI_STAT_TX_CBFC_CLASS_7},
 140         {"rpm_tx_CBFC_pause_frames_class_8", RPM_MTI_STAT_TX_CBFC_CLASS_8},
 141         {"rpm_tx_CBFC_pause_frames_class_9", RPM_MTI_STAT_TX_CBFC_CLASS_9},
 142         {"rpm_tx_CBFC_pause_frames_class_10", RPM_MTI_STAT_TX_CBFC_CLASS_10},
 143         {"rpm_tx_CBFC_pause_frames_class_11", RPM_MTI_STAT_TX_CBFC_CLASS_11},
 144         {"rpm_tx_CBFC_pause_frames_class_12", RPM_MTI_STAT_TX_CBFC_CLASS_12},
 145         {"rpm_tx_CBFC_pause_frames_class_13", RPM_MTI_STAT_TX_CBFC_CLASS_13},
 146         {"rpm_tx_CBFC_pause_frames_class_14", RPM_MTI_STAT_TX_CBFC_CLASS_14},
 147         {"rpm_tx_CBFC_pause_frames_class_15", RPM_MTI_STAT_TX_CBFC_CLASS_15},
 148         {"rpm_tx_aMACControlFramesTransmitted",
 149          RPM_MTI_STAT_TX_MAC_CONTROL_FRAMES},
 150         {"rpm_tx_etherStatsPkts", RPM_MTI_STAT_TX_PKT_CNT},
 151 };
 152
 153 static const struct cnxk_nix_xstats_name nix_rx_xstats_cgx[] = {
 154         {"cgx_rx_pkts", CGX_RX_PKT_CNT},
 155         {"cgx_rx_octs", CGX_RX_OCT_CNT},
 156         {"cgx_rx_pause_pkts", CGX_RX_PAUSE_PKT_CNT},
 157         {"cgx_rx_pause_octs", CGX_RX_PAUSE_OCT_CNT},
 158         {"cgx_rx_dmac_filt_pkts", CGX_RX_DMAC_FILT_PKT_CNT},
 159         {"cgx_rx_dmac_filt_octs", CGX_RX_DMAC_FILT_OCT_CNT},
 160         {"cgx_rx_fifo_drop_pkts", CGX_RX_FIFO_DROP_PKT_CNT},
 161         {"cgx_rx_fifo_drop_octs", CGX_RX_FIFO_DROP_OCT_CNT},
 162         {"cgx_rx_errors", CGX_RX_ERR_CNT},
 163 };
 164
 165 static const struct cnxk_nix_xstats_name nix_tx_xstats_cgx[] = {
 166         {"cgx_tx_collision_drop", CGX_TX_COLLISION_DROP},
 167         {"cgx_tx_frame_deferred_cnt", CGX_TX_FRAME_DEFER_CNT},
 168         {"cgx_tx_multiple_collision", CGX_TX_MULTIPLE_COLLISION},
 169         {"cgx_tx_single_collision", CGX_TX_SINGLE_COLLISION},
 170         {"cgx_tx_octs", CGX_TX_OCT_CNT},
 171         {"cgx_tx_pkts", CGX_TX_PKT_CNT},
 172         {"cgx_tx_1_to_63_oct_frames", CGX_TX_1_63_PKT_CNT},
 173         {"cgx_tx_64_oct_frames", CGX_TX_64_PKT_CNT},
 174         {"cgx_tx_65_to_127_oct_frames", CGX_TX_65_127_PKT_CNT},
 175         {"cgx_tx_128_to_255_oct_frames", CGX_TX_128_255_PKT_CNT},
 176         {"cgx_tx_256_to_511_oct_frames", CGX_TX_256_511_PKT_CNT},
 177         {"cgx_tx_512_to_1023_oct_frames", CGX_TX_512_1023_PKT_CNT},
 178         {"cgx_tx_1024_to_1518_oct_frames", CGX_TX_1024_1518_PKT_CNT},
 179         {"cgx_tx_1519_to_max_oct_frames", CGX_TX_1519_MAX_PKT_CNT},
 180         {"cgx_tx_broadcast_packets", CGX_TX_BCAST_PKTS},
 181         {"cgx_tx_multicast_packets", CGX_TX_MCAST_PKTS},
 182         {"cgx_tx_underflow_packets", CGX_TX_UFLOW_PKTS},
 183         {"cgx_tx_pause_packets", CGX_TX_PAUSE_PKTS},
 184 };
 185
 186 #define CNXK_NIX_NUM_RX_XSTATS     PLT_DIM(nix_rx_xstats)
 187 #define CNXK_NIX_NUM_TX_XSTATS     PLT_DIM(nix_tx_xstats)
 188 #define CNXK_NIX_NUM_QUEUE_XSTATS  PLT_DIM(nix_q_xstats)
 189 #define CNXK_NIX_NUM_RX_XSTATS_CGX PLT_DIM(nix_rx_xstats_cgx)
 190 #define CNXK_NIX_NUM_TX_XSTATS_CGX PLT_DIM(nix_tx_xstats_cgx)
 191 #define CNXK_NIX_NUM_RX_XSTATS_RPM PLT_DIM(nix_rx_xstats_rpm)
 192 #define CNXK_NIX_NUM_TX_XSTATS_RPM PLT_DIM(nix_tx_xstats_rpm)
 193 #define CNXK_NIX_NUM_CN10K_RX_XSTATS PLT_DIM(nix_cn10k_rx_xstats)
 194
 195 #define CNXK_NIX_NUM_XSTATS_REG                                                \
 196         (CNXK_NIX_NUM_RX_XSTATS + CNXK_NIX_NUM_TX_XSTATS +                     \
 197          CNXK_NIX_NUM_QUEUE_XSTATS)
 198 #define CNXK_NIX_NUM_XSTATS_CGX                                                \
 199         (CNXK_NIX_NUM_XSTATS_REG + CNXK_NIX_NUM_RX_XSTATS_CGX +                \
 200          CNXK_NIX_NUM_TX_XSTATS_CGX)
 201 #define CNXK_NIX_NUM_XSTATS_RPM                                                \
 202         (CNXK_NIX_NUM_XSTATS_REG + CNXK_NIX_NUM_RX_XSTATS_RPM +                \
 203          CNXK_NIX_NUM_TX_XSTATS_RPM + CNXK_NIX_NUM_CN10K_RX_XSTATS)
 204
 205 static inline uint64_t
 206 roc_nix_num_rx_xstats(void)
 207 {
 208         if (roc_model_is_cn9k())
 209                 return CNXK_NIX_NUM_RX_XSTATS_CGX;
 210
 211         return CNXK_NIX_NUM_RX_XSTATS_RPM;
 212 }
 213
 214 static inline uint64_t
 215 roc_nix_num_tx_xstats(void)
 216 {
 217         if (roc_model_is_cn9k())
 218                 return CNXK_NIX_NUM_TX_XSTATS_CGX;
 219
 220         return CNXK_NIX_NUM_TX_XSTATS_RPM;
 221 }
 222 #endif /* _ROC_NIX_XSTAT_H_ */