1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
8 #define ROC_AURA_ID_MASK (BIT_ULL(16) - 1)
9 #define ROC_AURA_OP_LIMIT_MASK (BIT_ULL(36) - 1)
11 #define ROC_NPA_MAX_BLOCK_SZ (128 * 1024)
12 #define ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS 512
13 #define ROC_CN10K_NPA_BATCH_FREE_MAX_PTRS 15
15 /* This value controls how much of the present average resource level is used to
16 * calculate the new resource level.
18 #define ROC_NPA_AVG_CONT 0xE0
20 /* 16 CASP instructions can be outstanding in CN9k, but we use only 15
21 * outstanding CASPs as we run out of registers.
23 #define ROC_CN9K_NPA_BULK_ALLOC_MAX_PTRS 30
26 * Generate 64bit handle to have optimized alloc and free aura operation.
27 * 0 - ROC_AURA_ID_MASK for storing the aura_id.
28 * [ROC_AURA_ID_MASK+1, (2^64 - 1)] for storing the lf base address.
29 * This scheme is valid when OS can give ROC_AURA_ID_MASK
30 * aligned address for lf base address.
32 static inline uint64_t
33 roc_npa_aura_handle_gen(uint32_t aura_id, uintptr_t addr)
37 val = aura_id & ROC_AURA_ID_MASK;
38 return (uint64_t)addr | val;
41 static inline uint64_t
42 roc_npa_aura_handle_to_aura(uint64_t aura_handle)
44 return aura_handle & ROC_AURA_ID_MASK;
47 static inline uintptr_t
48 roc_npa_aura_handle_to_base(uint64_t aura_handle)
50 return (uintptr_t)(aura_handle & ~ROC_AURA_ID_MASK);
53 static inline uint64_t
54 roc_npa_aura_op_alloc(uint64_t aura_handle, const int drop)
56 uint64_t wdata = roc_npa_aura_handle_to_aura(aura_handle);
60 wdata |= BIT_ULL(63); /* DROP */
62 addr = (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) +
63 NPA_LF_AURA_OP_ALLOCX(0));
64 return roc_atomic64_add_nosync(wdata, addr);
68 roc_npa_aura_op_free(uint64_t aura_handle, const int fabs, uint64_t iova)
70 uint64_t reg = roc_npa_aura_handle_to_aura(aura_handle);
72 roc_npa_aura_handle_to_base(aura_handle) + NPA_LF_AURA_OP_FREE0;
74 reg |= BIT_ULL(63); /* FABS */
76 roc_store_pair(iova, reg, addr);
79 static inline uint64_t
80 roc_npa_aura_op_cnt_get(uint64_t aura_handle)
86 wdata = roc_npa_aura_handle_to_aura(aura_handle) << 44;
87 addr = (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) +
89 reg = roc_atomic64_add_nosync(wdata, addr);
91 if (reg & BIT_ULL(42) /* OP_ERR */)
94 return reg & 0xFFFFFFFFF;
98 roc_npa_aura_op_cnt_set(uint64_t aura_handle, const int sign, uint64_t count)
100 uint64_t reg = count & (BIT_ULL(36) - 1);
103 reg |= BIT_ULL(43); /* CNT_ADD */
105 reg |= (roc_npa_aura_handle_to_aura(aura_handle) << 44);
107 plt_write64(reg, roc_npa_aura_handle_to_base(aura_handle) +
111 static inline uint64_t
112 roc_npa_aura_op_limit_get(uint64_t aura_handle)
118 wdata = roc_npa_aura_handle_to_aura(aura_handle) << 44;
119 addr = (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) +
120 NPA_LF_AURA_OP_LIMIT);
121 reg = roc_atomic64_add_nosync(wdata, addr);
123 if (reg & BIT_ULL(42) /* OP_ERR */)
126 return reg & ROC_AURA_OP_LIMIT_MASK;
130 roc_npa_aura_op_limit_set(uint64_t aura_handle, uint64_t limit)
132 uint64_t reg = limit & ROC_AURA_OP_LIMIT_MASK;
134 reg |= (roc_npa_aura_handle_to_aura(aura_handle) << 44);
136 plt_write64(reg, roc_npa_aura_handle_to_base(aura_handle) +
137 NPA_LF_AURA_OP_LIMIT);
140 static inline uint64_t
141 roc_npa_aura_op_available(uint64_t aura_handle)
147 wdata = roc_npa_aura_handle_to_aura(aura_handle) << 44;
148 addr = (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) +
149 NPA_LF_POOL_OP_AVAILABLE);
150 reg = roc_atomic64_add_nosync(wdata, addr);
152 if (reg & BIT_ULL(42) /* OP_ERR */)
155 return reg & 0xFFFFFFFFF;
158 /* Wait for a given timeout, repeatedly checking whether the available
159 * pointers has reached the given count. Returns the available pointer
160 * count if it has reached the given count or if timeout has expired
162 static inline uint32_t
163 roc_npa_aura_op_available_wait(uint64_t aura_handle, uint32_t count,
166 #define OP_AVAIL_WAIT_MS_DEFAULT (100)
167 #define OP_AVAIL_CHECK_INTERVAL_MS (1)
171 tmo_ms = tmo_ms ? tmo_ms : OP_AVAIL_WAIT_MS_DEFAULT;
173 retry = tmo_ms / OP_AVAIL_CHECK_INTERVAL_MS;
174 op_avail = roc_npa_aura_op_available(aura_handle);
175 while (retry && (op_avail < count)) {
176 plt_delay_ms(OP_AVAIL_CHECK_INTERVAL_MS);
177 op_avail = roc_npa_aura_op_available(aura_handle);
184 static inline uint64_t
185 roc_npa_pool_op_performance_counter(uint64_t aura_handle, const int drop)
189 struct npa_aura_op_wdata_s s;
195 op_wdata.s.aura = roc_npa_aura_handle_to_aura(aura_handle);
197 op_wdata.s.drop |= BIT_ULL(63); /* DROP */
199 addr = (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) +
202 reg = roc_atomic64_add_nosync(op_wdata.u, addr);
204 * NPA_LF_POOL_OP_PC Read Data
207 * -----------------------------
208 * | Reserved | OP_ERR | OP_PC |
209 * -----------------------------
212 if (reg & BIT_ULL(48) /* OP_ERR */)
215 return reg & 0xFFFFFFFFFFFF;
219 roc_npa_aura_batch_alloc_issue(uint64_t aura_handle, uint64_t *buf,
220 unsigned int num, const int dis_wait,
228 struct npa_batch_alloc_compare_s compare_s;
231 if (num > ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS)
234 /* Zero first word of every cache line */
235 for (i = 0; i < num; i += (ROC_ALIGN / sizeof(uint64_t)))
238 addr = (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) +
239 NPA_LF_AURA_BATCH_ALLOC);
241 cmp.compare_s.aura = roc_npa_aura_handle_to_aura(aura_handle);
242 cmp.compare_s.drop = drop;
243 cmp.compare_s.stype = ALLOC_STYPE_STF;
244 cmp.compare_s.dis_wait = dis_wait;
245 cmp.compare_s.count = num;
247 res = roc_atomic64_casl(cmp.u, (uint64_t)buf, addr);
248 if (res != ALLOC_RESULT_ACCEPTED && res != ALLOC_RESULT_NOCORE)
255 roc_npa_batch_alloc_wait(uint64_t *cache_line)
257 /* Batch alloc status code is updated in bits [5:6] of the first word
258 * of the 128 byte cache line.
260 while (((__atomic_load_n(cache_line, __ATOMIC_RELAXED) >> 5) & 0x3) ==
265 static inline unsigned int
266 roc_npa_aura_batch_alloc_count(uint64_t *aligned_buf, unsigned int num)
268 unsigned int count, i;
270 if (num > ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS)
274 /* Check each ROC cache line one by one */
275 for (i = 0; i < num; i += (ROC_ALIGN >> 3)) {
276 struct npa_batch_alloc_status_s *status;
278 status = (struct npa_batch_alloc_status_s *)&aligned_buf[i];
280 roc_npa_batch_alloc_wait(&aligned_buf[i]);
281 count += status->count;
287 static inline unsigned int
288 roc_npa_aura_batch_alloc_extract(uint64_t *buf, uint64_t *aligned_buf,
291 unsigned int count, i;
293 if (num > ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS)
297 /* Check each ROC cache line one by one */
298 for (i = 0; i < num; i += (ROC_ALIGN >> 3)) {
299 struct npa_batch_alloc_status_s *status;
302 status = (struct npa_batch_alloc_status_s *)&aligned_buf[i];
304 roc_npa_batch_alloc_wait(&aligned_buf[i]);
306 line_count = status->count;
308 /* Clear the status from the cache line */
312 /* 'Compress' the allocated buffers as there can
313 * be 'holes' at the end of the 128 byte cache
316 memmove(&buf[count], &aligned_buf[i],
317 line_count * sizeof(uint64_t));
326 roc_npa_aura_op_bulk_free(uint64_t aura_handle, uint64_t const *buf,
327 unsigned int num, const int fabs)
331 for (i = 0; i < num; i++) {
332 const uint64_t inbuf = buf[i];
334 roc_npa_aura_op_free(aura_handle, fabs, inbuf);
338 static inline unsigned int
339 roc_npa_aura_op_batch_alloc(uint64_t aura_handle, uint64_t *buf,
340 uint64_t *aligned_buf, unsigned int num,
341 const int dis_wait, const int drop,
344 unsigned int count, chunk, num_alloc;
346 /* The buffer should be 128 byte cache line aligned */
347 if (((uint64_t)aligned_buf & (ROC_ALIGN - 1)) != 0)
352 chunk = (num > ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS) ?
353 ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS :
356 if (roc_npa_aura_batch_alloc_issue(aura_handle, aligned_buf,
357 chunk, dis_wait, drop))
360 num_alloc = roc_npa_aura_batch_alloc_extract(buf, aligned_buf,
367 if (num_alloc != chunk)
371 /* If the requested number of pointers was not allocated and if partial
372 * alloc is not desired, then free allocated pointers.
374 if (unlikely(num != 0 && !partial)) {
375 roc_npa_aura_op_bulk_free(aura_handle, buf - count, count, 1);
383 roc_npa_aura_batch_free(uint64_t aura_handle, uint64_t const *buf,
384 unsigned int num, const int fabs, uint64_t lmt_addr,
387 uint64_t addr, tar_addr, free0;
388 volatile uint64_t *lmt_data;
391 if (num > ROC_CN10K_NPA_BATCH_FREE_MAX_PTRS)
394 lmt_data = (uint64_t *)lmt_addr;
396 addr = roc_npa_aura_handle_to_base(aura_handle) +
397 NPA_LF_AURA_BATCH_FREE0;
400 * NPA_LF_AURA_BATCH_FREE0
402 * 63 63 62 33 32 32 31 20 19 0
403 * -----------------------------------------
404 * | FABS | Rsvd | COUNT_EOT | Rsvd | AURA |
405 * -----------------------------------------
407 free0 = roc_npa_aura_handle_to_aura(aura_handle);
409 free0 |= (0x1UL << 63);
411 free0 |= (0x1UL << 32);
413 /* tar_addr[4:6] is LMTST size-1 in units of 128b */
414 tar_addr = addr | ((num >> 1) << 4);
417 for (i = 0; i < num; i++)
418 lmt_data[i + 1] = buf[i];
420 roc_lmt_submit_steorl(lmt_id, tar_addr);
425 roc_npa_aura_op_batch_free(uint64_t aura_handle, uint64_t const *buf,
426 unsigned int num, const int fabs, uint64_t lmt_addr,
432 chunk = (num >= ROC_CN10K_NPA_BATCH_FREE_MAX_PTRS) ?
433 ROC_CN10K_NPA_BATCH_FREE_MAX_PTRS :
436 roc_npa_aura_batch_free(aura_handle, buf, chunk, fabs, lmt_addr,
444 static inline unsigned int
445 roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,
448 #if defined(__aarch64__)
449 uint64_t wdata = roc_npa_aura_handle_to_aura(aura_handle);
450 unsigned int i, count;
454 wdata |= BIT_ULL(63); /* DROP */
456 addr = roc_npa_aura_handle_to_base(aura_handle) +
457 NPA_LF_AURA_OP_ALLOCX(0);
462 ".arch_extension lse\n"
463 "mov v18.d[0], %[dst]\n"
464 "mov v18.d[1], %[loc]\n"
465 "mov v19.d[0], %[wdata]\n"
466 "mov v19.d[1], x30\n"
467 "mov v20.d[0], x24\n"
468 "mov v20.d[1], x25\n"
469 "mov v21.d[0], x26\n"
470 "mov v21.d[1], x27\n"
471 "mov v22.d[0], x28\n"
472 "mov v22.d[1], x29\n"
473 "mov x28, v19.d[0]\n"
474 "mov x29, v19.d[0]\n"
475 "mov x30, v18.d[1]\n"
476 "casp x0, x1, x28, x29, [x30]\n"
477 "casp x2, x3, x28, x29, [x30]\n"
478 "casp x4, x5, x28, x29, [x30]\n"
479 "casp x6, x7, x28, x29, [x30]\n"
480 "casp x8, x9, x28, x29, [x30]\n"
481 "casp x10, x11, x28, x29, [x30]\n"
482 "casp x12, x13, x28, x29, [x30]\n"
483 "casp x14, x15, x28, x29, [x30]\n"
484 "casp x16, x17, x28, x29, [x30]\n"
485 "casp x18, x19, x28, x29, [x30]\n"
486 "casp x20, x21, x28, x29, [x30]\n"
487 "casp x22, x23, x28, x29, [x30]\n"
488 "casp x24, x25, x28, x29, [x30]\n"
489 "casp x26, x27, x28, x29, [x30]\n"
490 "casp x28, x29, x28, x29, [x30]\n"
491 "mov x30, v18.d[0]\n"
492 "stp x0, x1, [x30]\n"
493 "stp x2, x3, [x30, #16]\n"
494 "stp x4, x5, [x30, #32]\n"
495 "stp x6, x7, [x30, #48]\n"
496 "stp x8, x9, [x30, #64]\n"
497 "stp x10, x11, [x30, #80]\n"
498 "stp x12, x13, [x30, #96]\n"
499 "stp x14, x15, [x30, #112]\n"
500 "stp x16, x17, [x30, #128]\n"
501 "stp x18, x19, [x30, #144]\n"
502 "stp x20, x21, [x30, #160]\n"
503 "stp x22, x23, [x30, #176]\n"
504 "stp x24, x25, [x30, #192]\n"
505 "stp x26, x27, [x30, #208]\n"
506 "stp x28, x29, [x30, #224]\n"
507 "mov %[dst], v18.d[0]\n"
508 "mov %[loc], v18.d[1]\n"
509 "mov %[wdata], v19.d[0]\n"
510 "mov x30, v19.d[1]\n"
511 "mov x24, v20.d[0]\n"
512 "mov x25, v20.d[1]\n"
513 "mov x26, v21.d[0]\n"
514 "mov x27, v21.d[1]\n"
515 "mov x28, v22.d[0]\n"
516 "mov x29, v22.d[1]\n"
518 : [wdata] "r"(wdata), [loc] "r"(addr), [dst] "r"(buf)
519 : "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6",
520 "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14",
521 "x15", "x16", "x17", "x18", "x19", "x20", "x21",
522 "x22", "x23", "v18", "v19", "v20", "v21", "v22");
526 ".arch_extension lse\n"
527 "mov x16, %[wdata]\n"
528 "mov x17, %[wdata]\n"
529 "casp x0, x1, x16, x17, [%[loc]]\n"
530 "casp x2, x3, x16, x17, [%[loc]]\n"
531 "casp x4, x5, x16, x17, [%[loc]]\n"
532 "casp x6, x7, x16, x17, [%[loc]]\n"
533 "casp x8, x9, x16, x17, [%[loc]]\n"
534 "casp x10, x11, x16, x17, [%[loc]]\n"
535 "casp x12, x13, x16, x17, [%[loc]]\n"
536 "casp x14, x15, x16, x17, [%[loc]]\n"
537 "stp x0, x1, [%[dst]]\n"
538 "stp x2, x3, [%[dst], #16]\n"
539 "stp x4, x5, [%[dst], #32]\n"
540 "stp x6, x7, [%[dst], #48]\n"
541 "stp x8, x9, [%[dst], #64]\n"
542 "stp x10, x11, [%[dst], #80]\n"
543 "stp x12, x13, [%[dst], #96]\n"
544 "stp x14, x15, [%[dst], #112]\n"
546 : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr)
547 : "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6",
548 "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14",
549 "x15", "x16", "x17");
553 ".arch_extension lse\n"
554 "mov x16, %[wdata]\n"
555 "mov x17, %[wdata]\n"
556 "casp x0, x1, x16, x17, [%[loc]]\n"
557 "casp x2, x3, x16, x17, [%[loc]]\n"
558 "casp x4, x5, x16, x17, [%[loc]]\n"
559 "casp x6, x7, x16, x17, [%[loc]]\n"
560 "stp x0, x1, [%[dst]]\n"
561 "stp x2, x3, [%[dst], #16]\n"
562 "stp x4, x5, [%[dst], #32]\n"
563 "stp x6, x7, [%[dst], #48]\n"
565 : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr)
566 : "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6",
571 ".arch_extension lse\n"
572 "mov x16, %[wdata]\n"
573 "mov x17, %[wdata]\n"
574 "casp x0, x1, x16, x17, [%[loc]]\n"
575 "casp x2, x3, x16, x17, [%[loc]]\n"
576 "stp x0, x1, [%[dst]]\n"
577 "stp x2, x3, [%[dst], #16]\n"
579 : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr)
580 : "memory", "x0", "x1", "x2", "x3", "x16", "x17");
584 ".arch_extension lse\n"
585 "mov x16, %[wdata]\n"
586 "mov x17, %[wdata]\n"
587 "casp x0, x1, x16, x17, [%[loc]]\n"
588 "stp x0, x1, [%[dst]]\n"
590 : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr)
591 : "memory", "x0", "x1", "x16", "x17");
594 buf[0] = roc_npa_aura_op_alloc(aura_handle, drop);
598 /* Pack the pointers */
599 for (i = 0, count = 0; i < num; i++)
601 buf[count++] = buf[i];
605 unsigned int i, count;
607 for (i = 0, count = 0; i < num; i++) {
608 buf[count] = roc_npa_aura_op_alloc(aura_handle, drop);
617 static inline unsigned int
618 roc_npa_aura_op_bulk_alloc(uint64_t aura_handle, uint64_t *buf,
619 unsigned int num, const int drop, const int partial)
621 unsigned int chunk, count, num_alloc;
625 chunk = (num >= ROC_CN9K_NPA_BULK_ALLOC_MAX_PTRS) ?
626 ROC_CN9K_NPA_BULK_ALLOC_MAX_PTRS :
627 plt_align32prevpow2(num);
630 roc_npa_aura_bulk_alloc(aura_handle, buf, chunk, drop);
636 if (unlikely(num_alloc != chunk))
640 /* If the requested number of pointers was not allocated and if partial
641 * alloc is not desired, then free allocated pointers.
643 if (unlikely(num != 0 && !partial)) {
644 roc_npa_aura_op_bulk_free(aura_handle, buf - count, count, 1);
652 struct plt_pci_device *pci_dev;
654 #define ROC_NPA_MEM_SZ (1 * 1024)
655 uint8_t reserved[ROC_NPA_MEM_SZ] __plt_cache_aligned;
656 } __plt_cache_aligned;
658 int __roc_api roc_npa_dev_init(struct roc_npa *roc_npa);
659 int __roc_api roc_npa_dev_fini(struct roc_npa *roc_npa);
662 int __roc_api roc_npa_pool_create(uint64_t *aura_handle, uint32_t block_size,
663 uint32_t block_count, struct npa_aura_s *aura,
664 struct npa_pool_s *pool);
665 int __roc_api roc_npa_aura_limit_modify(uint64_t aura_handle,
666 uint16_t aura_limit);
667 int __roc_api roc_npa_pool_destroy(uint64_t aura_handle);
668 int __roc_api roc_npa_pool_range_update_check(uint64_t aura_handle);
669 void __roc_api roc_npa_aura_op_range_set(uint64_t aura_handle,
674 typedef int (*roc_npa_lf_init_cb_t)(struct plt_pci_device *pci_dev);
675 int __roc_api roc_npa_lf_init_cb_register(roc_npa_lf_init_cb_t cb);
678 int __roc_api roc_npa_ctx_dump(void);
679 int __roc_api roc_npa_dump(void);
681 /* Reset operation performance counter. */
682 int __roc_api roc_npa_pool_op_pc_reset(uint64_t aura_handle);
684 #endif /* _ROC_NPA_H_ */