1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #ifndef _ROC_NPA_PRIV_H_
6 #define _ROC_NPA_PRIV_H_
8 enum npa_error_status {
11 NPA_ERR_INVALID_BLOCK_SZ = -514,
12 NPA_ERR_AURA_ID_ALLOC = -515,
13 NPA_ERR_AURA_POOL_INIT = -516,
14 NPA_ERR_AURA_POOL_FINI = -517,
15 NPA_ERR_BASE_INVALID = -518,
16 NPA_ERR_DEVICE_NOT_BOUNDED = -519,
20 struct plt_intr_handle *intr_handle;
21 struct npa_aura_lim *aura_lim;
22 struct plt_pci_device *pci_dev;
23 struct plt_bitmap *npa_bmp;
25 uint32_t stack_pg_ptrs;
26 uint32_t stack_pg_bytes;
49 static inline struct npa *
50 roc_npa_to_npa_priv(struct roc_npa *roc_npa)
52 return (struct npa *)&roc_npa->reserved[0];
56 int npa_lf_init(struct dev *dev, struct plt_pci_device *pci_dev);
57 int npa_lf_fini(void);
60 int npa_register_irqs(struct npa_lf *lf);
61 void npa_unregister_irqs(struct npa_lf *lf);
63 #endif /* _ROC_NPA_PRIV_H_ */