1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Cavium, Inc
5 #ifndef _CPT_MCODE_DEFINES_H_
6 #define _CPT_MCODE_DEFINES_H_
8 #include <rte_byteorder.h>
9 #include <rte_memory.h>
12 * This file defines macros and structures according to microcode spec
16 #define CPT_BYTE_16 16
17 #define CPT_BYTE_24 24
18 #define CPT_BYTE_32 32
19 #define CPT_MAX_SG_IN_OUT_CNT 32
20 #define CPT_MAX_SG_CNT (CPT_MAX_SG_IN_OUT_CNT/2)
22 #define COMPLETION_CODE_SIZE 8
23 #define COMPLETION_CODE_INIT 0
25 #define SG_LIST_HDR_SIZE (8u)
26 #define SG_ENTRY_SIZE sizeof(sg_comp_t)
28 /* #define CPT_ALWAYS_USE_SG_MODE */
29 #define CPT_ALWAYS_USE_SEPARATE_BUF
31 typedef struct sglist_comp {
41 struct cpt_sess_misc {
44 /** ZUC, SNOW3G & KASUMI flags */
46 /** Flag for AES GCM */
48 /** Flag for AES CTR */
50 /** Flag for NULL cipher/auth */
56 /** MAC len in bytes */
58 /** IV length in bytes */
60 /** Auth IV length in bytes */
61 uint8_t auth_iv_length;
64 /** IV offset in bytes */
66 /** Auth IV offset in bytes */
67 uint16_t auth_iv_offset;
70 /** Context DMA address */
71 phys_addr_t ctx_dma_addr;
77 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
78 uint64_t enc_cipher : 4;
79 uint64_t reserved1 : 1;
81 uint64_t iv_source : 1;
82 uint64_t hash_type : 4;
83 uint64_t reserved2 : 3;
84 uint64_t auth_input_type : 1;
86 uint64_t reserved3 : 8;
87 uint64_t encr_offset : 16;
88 uint64_t iv_offset : 8;
89 uint64_t auth_offset : 8;
91 uint64_t auth_offset : 8;
92 uint64_t iv_offset : 8;
93 uint64_t encr_offset : 16;
94 uint64_t reserved3 : 8;
96 uint64_t auth_input_type : 1;
97 uint64_t reserved2 : 3;
98 uint64_t hash_type : 4;
99 uint64_t iv_source : 1;
100 uint64_t aes_key : 2;
101 uint64_t reserved1 : 1;
102 uint64_t enc_cipher : 4;
108 encr_ctrl_t enc_ctrl;
109 uint8_t encr_key[32];
116 } mc_fc_hmac_context_t;
119 mc_enc_context_t enc;
120 mc_fc_hmac_context_t hmac;
124 uint8_t encr_auth_iv[16];
126 uint8_t zuc_const[32];
127 } mc_zuc_snow3g_ctx_t;
135 /* Below fields are accessed by sw */
136 uint64_t enc_cipher :8;
137 uint64_t hash_type :8;
139 uint64_t auth_key_len :8;
142 uint64_t zsk_flags :3;
146 /* Below fields are accessed by hardware */
148 mc_fc_context_t fctx;
149 mc_zuc_snow3g_ctx_t zs_ctx;
150 mc_kasumi_ctx_t k_ctx;
152 uint8_t auth_key[64];
155 #define CPT_P_ENC_CTRL(fctx) fctx->enc.enc_ctrl.e
157 #endif /* _CPT_MCODE_DEFINES_H_ */