1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Cavium, Inc
5 #ifndef _CPT_MCODE_DEFINES_H_
6 #define _CPT_MCODE_DEFINES_H_
8 #include <rte_byteorder.h>
9 #include <rte_crypto_asym.h>
10 #include <rte_memory.h>
13 * This file defines macros and structures according to microcode spec
17 #define CPT_MAJOR_OP_FC 0x33
18 #define CPT_MAJOR_OP_HASH 0x34
19 #define CPT_MAJOR_OP_HMAC 0x35
20 #define CPT_MAJOR_OP_ZUC_SNOW3G 0x37
21 #define CPT_MAJOR_OP_KASUMI 0x38
22 #define CPT_MAJOR_OP_MISC 0x01
25 #define CPT_MAJOR_OP_MODEX 0x03
26 #define CPT_MAJOR_OP_ECDSA 0x04
27 #define CPT_MINOR_OP_MODEX 0x01
28 #define CPT_MINOR_OP_PKCS_ENC 0x02
29 #define CPT_MINOR_OP_PKCS_ENC_CRT 0x03
30 #define CPT_MINOR_OP_PKCS_DEC 0x04
31 #define CPT_MINOR_OP_PKCS_DEC_CRT 0x05
32 #define CPT_MINOR_OP_MODEX_CRT 0x06
33 #define CPT_MINOR_OP_ECDSA_SIGN 0x01
34 #define CPT_MINOR_OP_ECDSA_VERIFY 0x02
36 #define CPT_BLOCK_TYPE1 0
37 #define CPT_BLOCK_TYPE2 1
39 #define CPT_BYTE_16 16
40 #define CPT_BYTE_24 24
41 #define CPT_BYTE_32 32
42 #define CPT_MAX_SG_IN_OUT_CNT 32
43 #define CPT_MAX_SG_CNT (CPT_MAX_SG_IN_OUT_CNT/2)
45 #define COMPLETION_CODE_SIZE 8
46 #define COMPLETION_CODE_INIT 0
48 #define SG_LIST_HDR_SIZE (8u)
49 #define SG_ENTRY_SIZE sizeof(sg_comp_t)
51 #define CPT_DMA_MODE (1 << 7)
53 #define CPT_FROM_CTX 0
54 #define CPT_FROM_DPTR 1
57 #define ZUC_SNOW3G 0x2
66 #define CPT_OP_CIPHER_ENCRYPT 0x1
67 #define CPT_OP_CIPHER_DECRYPT 0x2
68 #define CPT_OP_CIPHER_MASK 0x3
70 #define CPT_OP_AUTH_VERIFY 0x4
71 #define CPT_OP_AUTH_GENERATE 0x8
72 #define CPT_OP_AUTH_MASK 0xC
74 #define CPT_OP_ENCODE (CPT_OP_CIPHER_ENCRYPT | CPT_OP_AUTH_GENERATE)
75 #define CPT_OP_DECODE (CPT_OP_CIPHER_DECRYPT | CPT_OP_AUTH_VERIFY)
77 /* #define CPT_ALWAYS_USE_SG_MODE */
78 #define CPT_ALWAYS_USE_SEPARATE_BUF
81 * Parameters for Flexi Crypto
84 #define VALID_AAD_BUF 0x01
85 #define VALID_MAC_BUF 0x02
86 #define VALID_IV_BUF 0x04
87 #define SINGLE_BUF_INPLACE 0x08
88 #define SINGLE_BUF_HEADTAILROOM 0x10
90 #define ENCR_IV_OFFSET(__d_offs) ((__d_offs >> 32) & 0xffff)
91 #define ENCR_OFFSET(__d_offs) ((__d_offs >> 16) & 0xffff)
92 #define AUTH_OFFSET(__d_offs) (__d_offs & 0xffff)
93 #define ENCR_DLEN(__d_lens) (__d_lens >> 32)
94 #define AUTH_DLEN(__d_lens) (__d_lens & 0xffffffff)
96 /* FC offset_control at start of DPTR in bytes */
97 #define OFF_CTRL_LEN 8 /**< bytes */
115 /* These are only for software use */
118 KASUMI_F9_CBC = 0x92,
119 KASUMI_F9_ECB = 0x93,
123 /* To support passthrough */
126 * These are defined by MC for Flexi crypto
127 * for field of 4 bits
138 /* These are only for software use */
141 KASUMI_F8_CBC = 0x92,
142 KASUMI_F8_ECB = 0x93,
152 /* Microcode errors */
154 ERR_OPCODE_UNSUPPORTED = 0x01,
157 ERR_SCATTER_GATHER_WRITE_LENGTH = 0x02,
158 ERR_SCATTER_GATHER_LIST = 0x03,
159 ERR_SCATTER_GATHER_NOT_SUPPORTED = 0x04,
162 ERR_GC_LENGTH_INVALID = 0x41,
163 ERR_GC_RANDOM_LEN_INVALID = 0x42,
164 ERR_GC_DATA_LEN_INVALID = 0x43,
165 ERR_GC_DRBG_TYPE_INVALID = 0x44,
166 ERR_GC_CTX_LEN_INVALID = 0x45,
167 ERR_GC_CIPHER_UNSUPPORTED = 0x46,
168 ERR_GC_AUTH_UNSUPPORTED = 0x47,
169 ERR_GC_OFFSET_INVALID = 0x48,
170 ERR_GC_HASH_MODE_UNSUPPORTED = 0x49,
171 ERR_GC_DRBG_ENTROPY_LEN_INVALID = 0x4a,
172 ERR_GC_DRBG_ADDNL_LEN_INVALID = 0x4b,
173 ERR_GC_ICV_MISCOMPARE = 0x4c,
174 ERR_GC_DATA_UNALIGNED = 0x4d,
177 ERR_BAD_ALT_CCODE = 0xfd,
178 ERR_REQ_PENDING = 0xfe,
179 ERR_REQ_TIMEOUT = 0xff,
181 ERR_BAD_INPUT_LENGTH = (0x40000000 | 384), /* 0x40000180 */
184 ERR_BAD_CONTEXT_HANDLE,
185 ERR_BAD_SCALAR_LENGTH,
186 ERR_BAD_DIGEST_LENGTH,
188 ERR_BAD_RECORD_PADDING,
189 ERR_NB_REQUEST_PENDING,
195 * Enumeration cpt_comp_e
197 * CPT Completion Enumeration
198 * Enumerates the values of CPT_RES_S[COMPCODE].
201 CPT_8X_COMP_E_NOTDONE = (0x00),
202 CPT_8X_COMP_E_GOOD = (0x01),
203 CPT_8X_COMP_E_FAULT = (0x02),
204 CPT_8X_COMP_E_SWERR = (0x03),
205 CPT_8X_COMP_E_HWERR = (0x04),
206 CPT_8X_COMP_E_LAST_ENTRY = (0xFF)
210 * Enumeration cpt_ec_id
212 * Enumerates supported elliptic curves
223 typedef struct sglist_comp {
233 struct cpt_sess_misc {
236 /** ZUC, SNOW3G & KASUMI flags */
238 /** Flag for AES GCM */
240 /** Flag for AES CTR */
242 /** Flag for NULL cipher/auth */
250 /** MAC len in bytes */
252 /** IV length in bytes */
254 /** Auth IV length in bytes */
255 uint8_t auth_iv_length;
256 /** Reserved field */
258 /** IV offset in bytes */
260 /** Auth IV offset in bytes */
261 uint16_t auth_iv_offset;
264 /** Context DMA address */
265 phys_addr_t ctx_dma_addr;
271 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
272 uint64_t enc_cipher : 4;
273 uint64_t reserved1 : 1;
274 uint64_t aes_key : 2;
275 uint64_t iv_source : 1;
276 uint64_t hash_type : 4;
277 uint64_t reserved2 : 3;
278 uint64_t auth_input_type : 1;
279 uint64_t mac_len : 8;
280 uint64_t reserved3 : 8;
281 uint64_t encr_offset : 16;
282 uint64_t iv_offset : 8;
283 uint64_t auth_offset : 8;
285 uint64_t auth_offset : 8;
286 uint64_t iv_offset : 8;
287 uint64_t encr_offset : 16;
288 uint64_t reserved3 : 8;
289 uint64_t mac_len : 8;
290 uint64_t auth_input_type : 1;
291 uint64_t reserved2 : 3;
292 uint64_t hash_type : 4;
293 uint64_t iv_source : 1;
294 uint64_t aes_key : 2;
295 uint64_t reserved1 : 1;
296 uint64_t enc_cipher : 4;
302 encr_ctrl_t enc_ctrl;
303 uint8_t encr_key[32];
310 } mc_fc_hmac_context_t;
313 mc_enc_context_t enc;
314 mc_fc_hmac_context_t hmac;
318 uint8_t encr_auth_iv[16];
320 uint8_t zuc_const[32];
321 } mc_zuc_snow3g_ctx_t;
329 /* Below fields are accessed by sw */
330 uint64_t enc_cipher :8;
331 uint64_t hash_type :8;
333 uint64_t auth_key_len :8;
336 uint64_t zsk_flags :3;
340 /* Below fields are accessed by hardware */
342 mc_fc_context_t fctx;
343 mc_zuc_snow3g_ctx_t zs_ctx;
344 mc_kasumi_ctx_t k_ctx;
346 uint8_t auth_key[64];
349 /* Prime and order fields of built-in elliptic curves */
350 struct cpt_ec_group {
352 /* P521 maximum length */
358 /* P521 maximum length */
364 struct cpt_asym_ec_ctx {
365 /* Prime length defined by microcode for EC operations */
369 struct cpt_asym_sess_misc {
370 enum rte_crypto_asym_xform_type xfrm_type;
372 struct rte_crypto_rsa_xform rsa_ctx;
373 struct rte_crypto_modex_xform mod_ctx;
374 struct cpt_asym_ec_ctx ec_ctx;
379 typedef struct buf_ptr {
381 phys_addr_t dma_addr;
392 typedef union opcode_info {
400 typedef struct fc_params {
422 * Parameters for asymmetric operations
424 struct asym_op_params {
425 struct cpt_request_info *req;
426 phys_addr_t meta_buf;
430 * Parameters for digest
432 * Only src_iov, op, ctx_buf, mac_buf, prep_req
433 * meta_buf, auth_data_len are used for digest gen.
435 typedef struct fc_params digest_params_t;
437 /* Cipher Algorithms */
438 typedef mc_cipher_type_t cipher_type_t;
440 /* Auth Algorithms */
441 typedef mc_hash_type_t auth_type_t;
445 #define CPT_P_ENC_CTRL(fctx) fctx->enc.enc_ctrl.e
447 #define SRC_IOV_SIZE \
448 (sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
449 #define DST_IOV_SIZE \
450 (sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
452 #define SESS_PRIV(__sess) \
453 (void *)((uint8_t *)__sess + sizeof(struct cpt_sess_misc))
456 * Get the session size
461 static __rte_always_inline unsigned int
462 cpt_get_session_size(void)
464 unsigned int ctx_len = sizeof(struct cpt_ctx);
465 return (sizeof(struct cpt_sess_misc) + RTE_ALIGN_CEIL(ctx_len, 8));
467 #endif /* _CPT_MCODE_DEFINES_H_ */