common/mlx5: fix device list operations concurrency
[dpdk.git] / drivers / common / iavf / iavf_adminq.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2001-2021 Intel Corporation
3  */
4
5 #ifndef _IAVF_ADMINQ_H_
6 #define _IAVF_ADMINQ_H_
7
8 #include "iavf_osdep.h"
9 #include "iavf_status.h"
10 #include "iavf_adminq_cmd.h"
11
12 #define IAVF_ADMINQ_DESC(R, i)   \
13         (&(((struct iavf_aq_desc *)((R).desc_buf.va))[i]))
14
15 #define IAVF_ADMINQ_DESC_ALIGNMENT 4096
16
17 struct iavf_adminq_ring {
18         struct iavf_virt_mem dma_head;  /* space for dma structures */
19         struct iavf_dma_mem desc_buf;   /* descriptor ring memory */
20         struct iavf_virt_mem cmd_buf;   /* command buffer memory */
21
22         union {
23                 struct iavf_dma_mem *asq_bi;
24                 struct iavf_dma_mem *arq_bi;
25         } r;
26
27         u16 count;              /* Number of descriptors */
28         u16 rx_buf_len;         /* Admin Receive Queue buffer length */
29
30         /* used for interrupt processing */
31         u16 next_to_use;
32         u16 next_to_clean;
33
34         /* used for queue tracking */
35         u32 head;
36         u32 tail;
37         u32 len;
38         u32 bah;
39         u32 bal;
40 };
41
42 /* ASQ transaction details */
43 struct iavf_asq_cmd_details {
44         void *callback; /* cast from type IAVF_ADMINQ_CALLBACK */
45         u64 cookie;
46         u16 flags_ena;
47         u16 flags_dis;
48         bool async;
49         bool postpone;
50         struct iavf_aq_desc *wb_desc;
51 };
52
53 #define IAVF_ADMINQ_DETAILS(R, i)   \
54         (&(((struct iavf_asq_cmd_details *)((R).cmd_buf.va))[i]))
55
56 /* ARQ event information */
57 struct iavf_arq_event_info {
58         struct iavf_aq_desc desc;
59         u16 msg_len;
60         u16 buf_len;
61         u8 *msg_buf;
62 };
63
64 /* Admin Queue information */
65 struct iavf_adminq_info {
66         struct iavf_adminq_ring arq;    /* receive queue */
67         struct iavf_adminq_ring asq;    /* send queue */
68         u32 asq_cmd_timeout;            /* send queue cmd write back timeout*/
69         u16 num_arq_entries;            /* receive queue depth */
70         u16 num_asq_entries;            /* send queue depth */
71         u16 arq_buf_size;               /* receive queue buffer size */
72         u16 asq_buf_size;               /* send queue buffer size */
73         u16 fw_maj_ver;                 /* firmware major version */
74         u16 fw_min_ver;                 /* firmware minor version */
75         u32 fw_build;                   /* firmware build number */
76         u16 api_maj_ver;                /* api major version */
77         u16 api_min_ver;                /* api minor version */
78
79         struct iavf_spinlock asq_spinlock; /* Send queue spinlock */
80         struct iavf_spinlock arq_spinlock; /* Receive queue spinlock */
81
82         /* last status values on send and receive queues */
83         enum iavf_admin_queue_err asq_last_status;
84         enum iavf_admin_queue_err arq_last_status;
85 };
86
87 /* general information */
88 #define IAVF_AQ_LARGE_BUF       512
89 #define IAVF_ASQ_CMD_TIMEOUT    250000  /* usecs */
90
91 void iavf_fill_default_direct_cmd_desc(struct iavf_aq_desc *desc,
92                                        u16 opcode);
93
94 #endif /* _IAVF_ADMINQ_H_ */