1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2019 Mellanox Technologies, Ltd
10 #include <rte_mempool.h>
11 #include <rte_class.h>
12 #include <rte_malloc.h>
13 #include <rte_eal_paging.h>
15 #include "mlx5_common.h"
16 #include "mlx5_common_os.h"
17 #include "mlx5_common_mp.h"
18 #include "mlx5_common_log.h"
19 #include "mlx5_common_defs.h"
20 #include "mlx5_common_private.h"
22 uint8_t haswell_broadwell_cpu;
24 /* Driver type key for new device global syntax. */
25 #define MLX5_DRIVER_KEY "driver"
27 /* Device parameter to get file descriptor for import device. */
28 #define MLX5_DEVICE_FD "cmd_fd"
30 /* Device parameter to get PD number for import Protection Domain. */
31 #define MLX5_PD_HANDLE "pd_handle"
33 /* Enable extending memsegs when creating a MR. */
34 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
36 /* Device parameter to configure implicit registration of mempool memory. */
37 #define MLX5_MR_MEMPOOL_REG_EN "mr_mempool_reg_en"
39 /* The default memory allocator used in PMD. */
40 #define MLX5_SYS_MEM_EN "sys_mem_en"
43 * Device parameter to force doorbell register mapping
44 * to non-cached region eliminating the extra write memory barrier.
45 * Deprecated, ignored (Name changed to sq_db_nc).
47 #define MLX5_TX_DB_NC "tx_db_nc"
50 * Device parameter to force doorbell register mapping
51 * to non-cached region eliminating the extra write memory barrier.
53 #define MLX5_SQ_DB_NC "sq_db_nc"
55 /* In case this is an x86_64 intel processor to check if
56 * we should use relaxed ordering.
58 #ifdef RTE_ARCH_X86_64
60 * This function returns processor identification and feature information
63 * @param eax, ebx, ecx, edx
64 * Pointers to the registers that will hold cpu information.
66 * The main category of information returned.
68 static inline void mlx5_cpu_id(unsigned int level,
69 unsigned int *eax, unsigned int *ebx,
70 unsigned int *ecx, unsigned int *edx)
73 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
78 RTE_LOG_REGISTER_DEFAULT(mlx5_common_logtype, NOTICE)
80 /* Head of list of drivers. */
81 static TAILQ_HEAD(mlx5_drivers, mlx5_class_driver) drivers_list =
82 TAILQ_HEAD_INITIALIZER(drivers_list);
84 /* Head of devices. */
85 static TAILQ_HEAD(mlx5_devices, mlx5_common_device) devices_list =
86 TAILQ_HEAD_INITIALIZER(devices_list);
87 static pthread_mutex_t devices_list_lock;
91 unsigned int drv_class;
93 { .name = "vdpa", .drv_class = MLX5_CLASS_VDPA },
94 { .name = "eth", .drv_class = MLX5_CLASS_ETH },
95 /* Keep class "net" for backward compatibility. */
96 { .name = "net", .drv_class = MLX5_CLASS_ETH },
97 { .name = "regex", .drv_class = MLX5_CLASS_REGEX },
98 { .name = "compress", .drv_class = MLX5_CLASS_COMPRESS },
99 { .name = "crypto", .drv_class = MLX5_CLASS_CRYPTO },
103 class_name_to_value(const char *class_name)
107 for (i = 0; i < RTE_DIM(mlx5_classes); i++) {
108 if (strcmp(class_name, mlx5_classes[i].name) == 0)
109 return mlx5_classes[i].drv_class;
114 static struct mlx5_class_driver *
115 driver_get(uint32_t class)
117 struct mlx5_class_driver *driver;
119 TAILQ_FOREACH(driver, &drivers_list, next) {
120 if ((uint32_t)driver->drv_class == class)
127 mlx5_kvargs_process(struct mlx5_kvargs_ctrl *mkvlist, const char *const keys[],
128 arg_handler_t handler, void *opaque_arg)
130 const struct rte_kvargs_pair *pair;
133 MLX5_ASSERT(mkvlist && mkvlist->kvlist);
134 /* Process parameters. */
135 for (i = 0; i < mkvlist->kvlist->count; i++) {
136 pair = &mkvlist->kvlist->pairs[i];
137 for (j = 0; keys[j] != NULL; ++j) {
138 if (strcmp(pair->key, keys[j]) != 0)
140 if ((*handler)(pair->key, pair->value, opaque_arg) < 0)
142 mkvlist->is_used[i] = true;
150 * Prepare a mlx5 kvargs control.
152 * @param[out] mkvlist
153 * Pointer to mlx5 kvargs control.
155 * The input string containing the key/value associations.
158 * 0 on success, a negative errno value otherwise and rte_errno is set.
161 mlx5_kvargs_prepare(struct mlx5_kvargs_ctrl *mkvlist,
162 const struct rte_devargs *devargs)
164 struct rte_kvargs *kvlist;
169 kvlist = rte_kvargs_parse(devargs->args, NULL);
170 if (kvlist == NULL) {
175 * rte_kvargs_parse enable key without value, in mlx5 PMDs we disable
178 for (i = 0; i < kvlist->count; i++) {
179 const struct rte_kvargs_pair *pair = &kvlist->pairs[i];
180 if (pair->value == NULL || *(pair->value) == '\0') {
181 DRV_LOG(ERR, "Key %s is missing value.", pair->key);
182 rte_kvargs_free(kvlist);
187 /* Makes sure all devargs used array is false. */
188 memset(mkvlist, 0, sizeof(*mkvlist));
189 mkvlist->kvlist = kvlist;
190 DRV_LOG(DEBUG, "Parse successfully %u devargs.",
191 mkvlist->kvlist->count);
196 * Release a mlx5 kvargs control.
198 * @param[out] mkvlist
199 * Pointer to mlx5 kvargs control.
202 mlx5_kvargs_release(struct mlx5_kvargs_ctrl *mkvlist)
206 rte_kvargs_free(mkvlist->kvlist);
207 memset(mkvlist, 0, sizeof(*mkvlist));
211 * Validate device arguments list.
212 * It report about the first unknown parameter.
215 * Pointer to mlx5 kvargs control.
218 * 0 on success, a negative errno value otherwise and rte_errno is set.
221 mlx5_kvargs_validate(struct mlx5_kvargs_ctrl *mkvlist)
225 /* Secondary process should not handle devargs. */
226 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
230 for (i = 0; i < mkvlist->kvlist->count; i++) {
231 if (mkvlist->is_used[i] == 0) {
232 DRV_LOG(ERR, "Key \"%s\" "
233 "is unknown for the provided classes.",
234 mkvlist->kvlist->pairs[i].key);
243 * Verify and store value for devargs.
246 * Key argument to verify.
248 * Value associated with key.
253 * 0 on success, a negative errno value otherwise and rte_errno is set.
256 mlx5_common_args_check_handler(const char *key, const char *val, void *opaque)
258 struct mlx5_common_dev_config *config = opaque;
261 if (strcmp(MLX5_DRIVER_KEY, key) == 0 ||
262 strcmp(RTE_DEVARGS_KEY_CLASS, key) == 0)
265 tmp = strtol(val, NULL, 0);
268 DRV_LOG(WARNING, "%s: \"%s\" is an invalid integer.", key, val);
271 if (strcmp(key, MLX5_TX_DB_NC) == 0)
273 "%s: deprecated parameter, converted to queue_db_nc",
275 if (strcmp(key, MLX5_SQ_DB_NC) == 0 ||
276 strcmp(key, MLX5_TX_DB_NC) == 0) {
277 if (tmp != MLX5_SQ_DB_CACHED &&
278 tmp != MLX5_SQ_DB_NCACHED &&
279 tmp != MLX5_SQ_DB_HEURISTIC) {
281 "Invalid Send Queue doorbell mapping parameter.");
286 } else if (strcmp(key, MLX5_MR_EXT_MEMSEG_EN) == 0) {
287 config->mr_ext_memseg_en = !!tmp;
288 } else if (strcmp(key, MLX5_MR_MEMPOOL_REG_EN) == 0) {
289 config->mr_mempool_reg_en = !!tmp;
290 } else if (strcmp(key, MLX5_SYS_MEM_EN) == 0) {
291 config->sys_mem_en = !!tmp;
292 } else if (strcmp(key, MLX5_DEVICE_FD) == 0) {
293 config->device_fd = tmp;
294 } else if (strcmp(key, MLX5_PD_HANDLE) == 0) {
295 config->pd_handle = tmp;
301 * Parse common device parameters.
304 * Device arguments structure.
306 * Pointer to device configuration structure.
309 * 0 on success, a negative errno value otherwise and rte_errno is set.
312 mlx5_common_config_get(struct mlx5_kvargs_ctrl *mkvlist,
313 struct mlx5_common_dev_config *config)
315 const char **params = (const char *[]){
316 RTE_DEVARGS_KEY_CLASS,
320 MLX5_MR_EXT_MEMSEG_EN,
322 MLX5_MR_MEMPOOL_REG_EN,
332 config->mr_ext_memseg_en = 1;
333 config->mr_mempool_reg_en = 1;
334 config->sys_mem_en = 0;
335 config->dbnc = MLX5_ARG_UNSET;
336 config->device_fd = MLX5_ARG_UNSET;
337 config->pd_handle = MLX5_ARG_UNSET;
338 /* Process common parameters. */
339 ret = mlx5_kvargs_process(mkvlist, params,
340 mlx5_common_args_check_handler, config);
345 /* Validate user arguments for remote PD and CTX if it is given. */
346 ret = mlx5_os_remote_pd_and_ctx_validate(config);
349 DRV_LOG(DEBUG, "mr_ext_memseg_en is %u.", config->mr_ext_memseg_en);
350 DRV_LOG(DEBUG, "mr_mempool_reg_en is %u.", config->mr_mempool_reg_en);
351 DRV_LOG(DEBUG, "sys_mem_en is %u.", config->sys_mem_en);
352 DRV_LOG(DEBUG, "Send Queue doorbell mapping parameter is %d.",
358 devargs_class_handler(__rte_unused const char *key,
359 const char *class_names, void *opaque)
368 scratch = strdup(class_names);
369 if (scratch == NULL) {
373 found = strtok_r(scratch, ":", &refstr);
378 /* Extract each individual class name. Multiple
379 * classes can be supplied as class=net:regex:foo:bar.
381 class_val = class_name_to_value(found);
382 /* Check if its a valid class. */
388 found = strtok_r(NULL, ":", &refstr);
389 } while (found != NULL);
393 DRV_LOG(ERR, "Invalid mlx5 class options: %s.\n", class_names);
398 parse_class_options(const struct rte_devargs *devargs,
399 struct mlx5_kvargs_ctrl *mkvlist)
405 if (devargs->cls != NULL && devargs->cls->name != NULL)
406 /* Global syntax, only one class type. */
407 return class_name_to_value(devargs->cls->name);
408 /* Legacy devargs support multiple classes. */
409 rte_kvargs_process(mkvlist->kvlist, RTE_DEVARGS_KEY_CLASS,
410 devargs_class_handler, &ret);
414 static const unsigned int mlx5_class_invalid_combinations[] = {
415 MLX5_CLASS_ETH | MLX5_CLASS_VDPA,
416 /* New class combination should be added here. */
420 is_valid_class_combination(uint32_t user_classes)
424 /* Verify if user specified unsupported combination. */
425 for (i = 0; i < RTE_DIM(mlx5_class_invalid_combinations); i++) {
426 if ((mlx5_class_invalid_combinations[i] & user_classes) ==
427 mlx5_class_invalid_combinations[i])
430 /* Not found any invalid class combination. */
435 mlx5_bus_match(const struct mlx5_class_driver *drv,
436 const struct rte_device *dev)
438 if (mlx5_dev_is_pci(dev))
439 return mlx5_dev_pci_match(drv, dev);
443 static struct mlx5_common_device *
444 to_mlx5_device(const struct rte_device *rte_dev)
446 struct mlx5_common_device *cdev;
448 TAILQ_FOREACH(cdev, &devices_list, next) {
449 if (rte_dev == cdev->dev)
456 mlx5_dev_to_pci_str(const struct rte_device *dev, char *addr, size_t size)
458 struct rte_pci_addr pci_addr = { 0 };
461 if (mlx5_dev_is_pci(dev)) {
462 /* Input might be <BDF>, format PCI address to <DBDF>. */
463 ret = rte_pci_addr_parse(dev->name, &pci_addr);
466 rte_pci_device_name(&pci_addr, addr, size);
469 #ifdef RTE_EXEC_ENV_LINUX
470 return mlx5_auxiliary_get_pci_str(RTE_DEV_TO_AUXILIARY_CONST(dev),
479 * Register the mempool for the protection domain.
482 * Pointer to the mlx5 common device.
484 * Mempool being registered.
487 * 0 on success, (-1) on failure and rte_errno is set.
490 mlx5_dev_mempool_register(struct mlx5_common_device *cdev,
491 struct rte_mempool *mp, bool is_extmem)
493 return mlx5_mr_mempool_register(cdev, mp, is_extmem);
497 * Unregister the mempool from the protection domain.
500 * Pointer to the mlx5 common device.
502 * Mempool being unregistered.
505 mlx5_dev_mempool_unregister(struct mlx5_common_device *cdev,
506 struct rte_mempool *mp)
508 if (mlx5_mr_mempool_unregister(cdev, mp) < 0)
509 DRV_LOG(WARNING, "Failed to unregister mempool %s for PD %p: %s",
510 mp->name, cdev->pd, rte_strerror(rte_errno));
514 * rte_mempool_walk() callback to register mempools for the protection domain.
517 * The mempool being walked.
519 * Pointer to the device shared context.
522 mlx5_dev_mempool_register_cb(struct rte_mempool *mp, void *arg)
524 struct mlx5_common_device *cdev = arg;
527 ret = mlx5_dev_mempool_register(cdev, mp, false);
528 if (ret < 0 && rte_errno != EEXIST)
530 "Failed to register existing mempool %s for PD %p: %s",
531 mp->name, cdev->pd, rte_strerror(rte_errno));
535 * rte_mempool_walk() callback to unregister mempools
536 * from the protection domain.
539 * The mempool being walked.
541 * Pointer to the device shared context.
544 mlx5_dev_mempool_unregister_cb(struct rte_mempool *mp, void *arg)
546 mlx5_dev_mempool_unregister((struct mlx5_common_device *)arg, mp);
550 * Mempool life cycle callback for mlx5 common devices.
553 * Mempool life cycle event.
555 * Associated mempool.
557 * Pointer to a device shared context.
560 mlx5_dev_mempool_event_cb(enum rte_mempool_event event, struct rte_mempool *mp,
563 struct mlx5_common_device *cdev = arg;
566 case RTE_MEMPOOL_EVENT_READY:
567 if (mlx5_dev_mempool_register(cdev, mp, false) < 0)
569 "Failed to register new mempool %s for PD %p: %s",
570 mp->name, cdev->pd, rte_strerror(rte_errno));
572 case RTE_MEMPOOL_EVENT_DESTROY:
573 mlx5_dev_mempool_unregister(cdev, mp);
579 mlx5_dev_mempool_subscribe(struct mlx5_common_device *cdev)
583 if (!cdev->config.mr_mempool_reg_en)
585 rte_rwlock_write_lock(&cdev->mr_scache.mprwlock);
586 if (cdev->mr_scache.mp_cb_registered)
588 /* Callback for this device may be already registered. */
589 ret = rte_mempool_event_callback_register(mlx5_dev_mempool_event_cb,
591 if (ret != 0 && rte_errno != EEXIST)
593 /* Register mempools only once for this device. */
595 rte_mempool_walk(mlx5_dev_mempool_register_cb, cdev);
597 cdev->mr_scache.mp_cb_registered = 1;
599 rte_rwlock_write_unlock(&cdev->mr_scache.mprwlock);
604 mlx5_dev_mempool_unsubscribe(struct mlx5_common_device *cdev)
608 if (!cdev->mr_scache.mp_cb_registered ||
609 !cdev->config.mr_mempool_reg_en)
611 /* Stop watching for mempool events and unregister all mempools. */
612 ret = rte_mempool_event_callback_unregister(mlx5_dev_mempool_event_cb,
615 rte_mempool_walk(mlx5_dev_mempool_unregister_cb, cdev);
619 * Callback for memory event.
629 mlx5_mr_mem_event_cb(enum rte_mem_event event_type, const void *addr,
630 size_t len, void *arg __rte_unused)
632 struct mlx5_common_device *cdev;
634 /* Must be called from the primary process. */
635 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
636 switch (event_type) {
637 case RTE_MEM_EVENT_FREE:
638 pthread_mutex_lock(&devices_list_lock);
639 /* Iterate all the existing mlx5 devices. */
640 TAILQ_FOREACH(cdev, &devices_list, next)
641 mlx5_free_mr_by_addr(&cdev->mr_scache,
642 mlx5_os_get_ctx_device_name
645 pthread_mutex_unlock(&devices_list_lock);
647 case RTE_MEM_EVENT_ALLOC:
654 * Uninitialize all HW global of device context.
657 * Pointer to mlx5 device structure.
660 * 0 on success, a negative errno value otherwise and rte_errno is set.
663 mlx5_dev_hw_global_release(struct mlx5_common_device *cdev)
665 if (cdev->pd != NULL) {
666 claim_zero(mlx5_os_pd_release(cdev));
669 if (cdev->ctx != NULL) {
670 claim_zero(mlx5_glue->close_device(cdev->ctx));
676 * Initialize all HW global of device context.
679 * Pointer to mlx5 device structure.
681 * Chosen classes come from user device arguments.
684 * 0 on success, a negative errno value otherwise and rte_errno is set.
687 mlx5_dev_hw_global_prepare(struct mlx5_common_device *cdev, uint32_t classes)
691 /* Create context device */
692 ret = mlx5_os_open_device(cdev, classes);
696 * When CTX is created by Verbs, query HCA attribute is unsupported.
697 * When CTX is imported, we cannot know if it is created by DevX or
698 * Verbs. So, we use query HCA attribute function to check it.
700 if (cdev->config.devx || cdev->config.device_fd != MLX5_ARG_UNSET) {
701 /* Query HCA attributes. */
702 ret = mlx5_devx_cmd_query_hca_attr(cdev->ctx,
703 &cdev->config.hca_attr);
705 DRV_LOG(ERR, "Unable to read HCA caps in DevX mode.");
709 cdev->config.devx = 1;
711 DRV_LOG(DEBUG, "DevX is %ssupported.", cdev->config.devx ? "" : "NOT ");
712 /* Prepare Protection Domain object and extract its pdn. */
713 ret = mlx5_os_pd_prepare(cdev);
718 mlx5_dev_hw_global_release(cdev);
723 mlx5_common_dev_release(struct mlx5_common_device *cdev)
725 pthread_mutex_lock(&devices_list_lock);
726 TAILQ_REMOVE(&devices_list, cdev, next);
727 pthread_mutex_unlock(&devices_list_lock);
728 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
729 if (TAILQ_EMPTY(&devices_list))
730 rte_mem_event_callback_unregister("MLX5_MEM_EVENT_CB",
732 mlx5_dev_mempool_unsubscribe(cdev);
733 mlx5_mr_release_cache(&cdev->mr_scache);
734 mlx5_dev_hw_global_release(cdev);
739 static struct mlx5_common_device *
740 mlx5_common_dev_create(struct rte_device *eal_dev, uint32_t classes,
741 struct mlx5_kvargs_ctrl *mkvlist)
743 struct mlx5_common_device *cdev;
746 cdev = rte_zmalloc("mlx5_common_device", sizeof(*cdev), 0);
748 DRV_LOG(ERR, "Device allocation failure.");
753 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
755 /* Parse device parameters. */
756 ret = mlx5_common_config_get(mkvlist, &cdev->config);
758 DRV_LOG(ERR, "Failed to process device arguments: %s",
759 strerror(rte_errno));
763 mlx5_malloc_mem_select(cdev->config.sys_mem_en);
764 /* Initialize all HW global of device context. */
765 ret = mlx5_dev_hw_global_prepare(cdev, classes);
767 DRV_LOG(ERR, "Failed to initialize device context.");
771 /* Initialize global MR cache resources and update its functions. */
772 ret = mlx5_mr_create_cache(&cdev->mr_scache, eal_dev->numa_node);
774 DRV_LOG(ERR, "Failed to initialize global MR share cache.");
775 mlx5_dev_hw_global_release(cdev);
779 /* Register callback function for global shared MR cache management. */
780 if (TAILQ_EMPTY(&devices_list))
781 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
782 mlx5_mr_mem_event_cb, NULL);
784 pthread_mutex_lock(&devices_list_lock);
785 TAILQ_INSERT_HEAD(&devices_list, cdev, next);
786 pthread_mutex_unlock(&devices_list_lock);
791 * Validate common devargs when probing again.
793 * When common device probing again, it cannot change its configurations.
794 * If user ask non compatible configurations in devargs, it is error.
795 * This function checks the match between:
796 * - Common device configurations requested by probe again devargs.
797 * - Existing common device configurations.
800 * Pointer to mlx5 device structure.
802 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
805 * 0 on success, a negative errno value otherwise and rte_errno is set.
808 mlx5_common_probe_again_args_validate(struct mlx5_common_device *cdev,
809 struct mlx5_kvargs_ctrl *mkvlist)
811 struct mlx5_common_dev_config *config;
814 /* Secondary process should not handle devargs. */
815 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
817 /* Probe again doesn't have to generate devargs. */
820 config = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
821 sizeof(struct mlx5_common_dev_config),
822 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
823 if (config == NULL) {
828 * Creates a temporary common configure structure according to new
829 * devargs attached in probing again.
831 ret = mlx5_common_config_get(mkvlist, config);
833 DRV_LOG(ERR, "Failed to process device configure: %s",
834 strerror(rte_errno));
839 * Checks the match between the temporary structure and the existing
840 * common device structure.
842 if (cdev->config.mr_ext_memseg_en != config->mr_ext_memseg_en) {
843 DRV_LOG(ERR, "\"" MLX5_MR_EXT_MEMSEG_EN "\" "
844 "configuration mismatch for device %s.",
848 if (cdev->config.mr_mempool_reg_en != config->mr_mempool_reg_en) {
849 DRV_LOG(ERR, "\"" MLX5_MR_MEMPOOL_REG_EN "\" "
850 "configuration mismatch for device %s.",
854 if (cdev->config.device_fd != config->device_fd) {
855 DRV_LOG(ERR, "\"" MLX5_DEVICE_FD "\" "
856 "configuration mismatch for device %s.",
860 if (cdev->config.pd_handle != config->pd_handle) {
861 DRV_LOG(ERR, "\"" MLX5_PD_HANDLE "\" "
862 "configuration mismatch for device %s.",
866 if (cdev->config.sys_mem_en != config->sys_mem_en) {
867 DRV_LOG(ERR, "\"" MLX5_SYS_MEM_EN "\" "
868 "configuration mismatch for device %s.",
872 if (cdev->config.dbnc != config->dbnc) {
873 DRV_LOG(ERR, "\"" MLX5_SQ_DB_NC "\" "
874 "configuration mismatch for device %s.",
887 drivers_remove(struct mlx5_common_device *cdev, uint32_t enabled_classes)
889 struct mlx5_class_driver *driver;
890 int local_ret = -ENODEV;
894 while (enabled_classes) {
895 driver = driver_get(RTE_BIT64(i));
896 if (driver != NULL) {
897 local_ret = driver->remove(cdev);
899 cdev->classes_loaded &= ~RTE_BIT64(i);
903 enabled_classes &= ~RTE_BIT64(i);
906 if (local_ret != 0 && ret == 0)
912 drivers_probe(struct mlx5_common_device *cdev, uint32_t user_classes,
913 struct mlx5_kvargs_ctrl *mkvlist)
915 struct mlx5_class_driver *driver;
916 uint32_t enabled_classes = 0;
920 TAILQ_FOREACH(driver, &drivers_list, next) {
921 if ((driver->drv_class & user_classes) == 0)
923 if (!mlx5_bus_match(driver, cdev->dev))
925 already_loaded = cdev->classes_loaded & driver->drv_class;
926 if (already_loaded && driver->probe_again == 0) {
927 DRV_LOG(ERR, "Device %s is already probed",
932 ret = driver->probe(cdev, mkvlist);
934 DRV_LOG(ERR, "Failed to load driver %s",
938 enabled_classes |= driver->drv_class;
941 cdev->classes_loaded |= enabled_classes;
946 * Need to remove only drivers which were not probed before this probe
947 * instance, but have already been probed before this failure.
949 enabled_classes &= ~cdev->classes_loaded;
950 drivers_remove(cdev, enabled_classes);
955 mlx5_common_dev_probe(struct rte_device *eal_dev)
957 struct mlx5_common_device *cdev;
958 struct mlx5_kvargs_ctrl mkvlist;
959 struct mlx5_kvargs_ctrl *mkvlist_p = NULL;
960 uint32_t classes = 0;
961 bool new_device = false;
964 DRV_LOG(INFO, "probe device \"%s\".", eal_dev->name);
965 if (eal_dev->devargs != NULL)
966 mkvlist_p = &mkvlist;
967 ret = mlx5_kvargs_prepare(mkvlist_p, eal_dev->devargs);
969 DRV_LOG(ERR, "Unsupported device arguments: %s",
970 eal_dev->devargs->args);
973 ret = parse_class_options(eal_dev->devargs, mkvlist_p);
975 DRV_LOG(ERR, "Unsupported mlx5 class type: %s",
976 eal_dev->devargs->args);
981 /* Default to net class. */
982 classes = MLX5_CLASS_ETH;
984 * MLX5 common driver supports probing again in two scenarios:
985 * - Add new driver under existing common device (regardless of the
986 * driver's own support in probing again).
987 * - Transfer the probing again support of the drivers themselves.
989 * In both scenarios it uses in the existing device. here it looks for
990 * device that match to rte device, if it exists, the request classes
991 * were probed with this device.
993 cdev = to_mlx5_device(eal_dev);
995 /* It isn't probing again, creates a new device. */
996 cdev = mlx5_common_dev_create(eal_dev, classes, mkvlist_p);
1003 /* It is probing again, validate common devargs match. */
1004 ret = mlx5_common_probe_again_args_validate(cdev, mkvlist_p);
1007 "Probe again parameters aren't compatible : %s",
1008 strerror(rte_errno));
1013 * Validate combination here.
1014 * For new device, the classes_loaded field is 0 and it check only
1015 * the classes given as user device arguments.
1017 ret = is_valid_class_combination(classes | cdev->classes_loaded);
1019 DRV_LOG(ERR, "Unsupported mlx5 classes combination.");
1022 ret = drivers_probe(cdev, classes, mkvlist_p);
1026 * Validate that all devargs have been used, unused key -> unknown Key.
1027 * When probe again validate is failed, the added drivers aren't removed
1028 * here but when device is released.
1030 ret = mlx5_kvargs_validate(mkvlist_p);
1033 mlx5_kvargs_release(mkvlist_p);
1038 * For new device, classes_loaded is always 0 before
1039 * drivers_probe function.
1041 if (cdev->classes_loaded)
1042 drivers_remove(cdev, cdev->classes_loaded);
1043 mlx5_common_dev_release(cdev);
1045 mlx5_kvargs_release(mkvlist_p);
1050 mlx5_common_dev_remove(struct rte_device *eal_dev)
1052 struct mlx5_common_device *cdev;
1055 cdev = to_mlx5_device(eal_dev);
1058 /* Matching device found, cleanup and unload drivers. */
1059 ret = drivers_remove(cdev, cdev->classes_loaded);
1061 mlx5_common_dev_release(cdev);
1066 * Callback to DMA map external memory to a device.
1069 * Pointer to the generic device.
1071 * Starting virtual address of memory to be mapped.
1073 * Starting IOVA address of memory to be mapped.
1075 * Length of memory segment being mapped.
1078 * 0 on success, negative value on error.
1081 mlx5_common_dev_dma_map(struct rte_device *rte_dev, void *addr,
1082 uint64_t iova __rte_unused, size_t len)
1084 struct mlx5_common_device *dev;
1087 dev = to_mlx5_device(rte_dev);
1090 "Unable to find matching mlx5 device to device %s",
1095 mr = mlx5_create_mr_ext(dev->pd, (uintptr_t)addr, len,
1096 SOCKET_ID_ANY, dev->mr_scache.reg_mr_cb);
1098 DRV_LOG(WARNING, "Device %s unable to DMA map", rte_dev->name);
1102 rte_rwlock_write_lock(&dev->mr_scache.rwlock);
1103 LIST_INSERT_HEAD(&dev->mr_scache.mr_list, mr, mr);
1104 /* Insert to the global cache table. */
1105 mlx5_mr_insert_cache(&dev->mr_scache, mr);
1106 rte_rwlock_write_unlock(&dev->mr_scache.rwlock);
1111 * Callback to DMA unmap external memory to a device.
1114 * Pointer to the generic device.
1116 * Starting virtual address of memory to be unmapped.
1118 * Starting IOVA address of memory to be unmapped.
1120 * Length of memory segment being unmapped.
1123 * 0 on success, negative value on error.
1126 mlx5_common_dev_dma_unmap(struct rte_device *rte_dev, void *addr,
1127 uint64_t iova __rte_unused, size_t len __rte_unused)
1129 struct mlx5_common_device *dev;
1130 struct mr_cache_entry entry;
1133 dev = to_mlx5_device(rte_dev);
1136 "Unable to find matching mlx5 device to device %s.",
1141 rte_rwlock_read_lock(&dev->mr_scache.rwlock);
1142 mr = mlx5_mr_lookup_list(&dev->mr_scache, &entry, (uintptr_t)addr);
1144 rte_rwlock_read_unlock(&dev->mr_scache.rwlock);
1146 "Address 0x%" PRIxPTR " wasn't registered to device %s",
1147 (uintptr_t)addr, rte_dev->name);
1151 LIST_REMOVE(mr, mr);
1152 DRV_LOG(DEBUG, "MR(%p) is removed from list.", (void *)mr);
1153 mlx5_mr_free(mr, dev->mr_scache.dereg_mr_cb);
1154 mlx5_mr_rebuild_cache(&dev->mr_scache);
1156 * No explicit wmb is needed after updating dev_gen due to
1157 * store-release ordering in unlock that provides the
1158 * implicit barrier at the software visible level.
1160 ++dev->mr_scache.dev_gen;
1161 DRV_LOG(DEBUG, "Broadcasting local cache flush, gen=%d.",
1162 dev->mr_scache.dev_gen);
1163 rte_rwlock_read_unlock(&dev->mr_scache.rwlock);
1168 mlx5_class_driver_register(struct mlx5_class_driver *driver)
1170 mlx5_common_driver_on_register_pci(driver);
1171 TAILQ_INSERT_TAIL(&drivers_list, driver, next);
1174 static void mlx5_common_driver_init(void)
1176 mlx5_common_pci_init();
1177 #ifdef RTE_EXEC_ENV_LINUX
1178 mlx5_common_auxiliary_init();
1182 static bool mlx5_common_initialized;
1185 * One time initialization routine for run-time dependency on glue library
1186 * for multiple PMDs. Each mlx5 PMD that depends on mlx5_common module,
1187 * must invoke in its constructor.
1190 mlx5_common_init(void)
1192 if (mlx5_common_initialized)
1195 pthread_mutex_init(&devices_list_lock, NULL);
1196 mlx5_glue_constructor();
1197 mlx5_common_driver_init();
1198 mlx5_common_initialized = true;
1202 * This function is responsible of initializing the variable
1203 * haswell_broadwell_cpu by checking if the cpu is intel
1204 * and reading the data returned from mlx5_cpu_id().
1205 * since haswell and broadwell cpus don't have improved performance
1206 * when using relaxed ordering we want to check the cpu type before
1207 * before deciding whether to enable RO or not.
1208 * if the cpu is haswell or broadwell the variable will be set to 1
1209 * otherwise it will be 0.
1211 RTE_INIT_PRIO(mlx5_is_haswell_broadwell_cpu, LOG)
1213 #ifdef RTE_ARCH_X86_64
1214 unsigned int broadwell_models[4] = {0x3d, 0x47, 0x4F, 0x56};
1215 unsigned int haswell_models[4] = {0x3c, 0x3f, 0x45, 0x46};
1216 unsigned int i, model, family, brand_id, vendor;
1217 unsigned int signature_intel_ebx = 0x756e6547;
1218 unsigned int extended_model;
1219 unsigned int eax = 0;
1220 unsigned int ebx = 0;
1221 unsigned int ecx = 0;
1222 unsigned int edx = 0;
1225 mlx5_cpu_id(0, &eax, &ebx, &ecx, &edx);
1228 if (max_level < 1) {
1229 haswell_broadwell_cpu = 0;
1232 mlx5_cpu_id(1, &eax, &ebx, &ecx, &edx);
1233 model = (eax >> 4) & 0x0f;
1234 family = (eax >> 8) & 0x0f;
1235 brand_id = ebx & 0xff;
1236 extended_model = (eax >> 12) & 0xf0;
1237 /* Check if the processor is Haswell or Broadwell */
1238 if (vendor == signature_intel_ebx) {
1240 model += extended_model;
1241 if (brand_id == 0 && family == 0x6) {
1242 for (i = 0; i < RTE_DIM(broadwell_models); i++)
1243 if (model == broadwell_models[i]) {
1244 haswell_broadwell_cpu = 1;
1247 for (i = 0; i < RTE_DIM(haswell_models); i++)
1248 if (model == haswell_models[i]) {
1249 haswell_broadwell_cpu = 1;
1255 haswell_broadwell_cpu = 0;
1259 * Allocate the User Access Region with DevX on specified device.
1260 * This routine handles the following UAR allocation issues:
1262 * - Try to allocate the UAR with the most appropriate memory mapping
1263 * type from the ones supported by the host.
1265 * - Try to allocate the UAR with non-NULL base address OFED 5.0.x and
1266 * Upstream rdma_core before v29 returned the NULL as UAR base address
1267 * if UAR was not the first object in the UAR page.
1268 * It caused the PMD failure and we should try to get another UAR till
1269 * we get the first one with non-NULL base address returned.
1272 * Pointer to mlx5 device structure to perform allocation on its context.
1275 * UAR object pointer on success, NULL otherwise and rte_errno is set.
1278 mlx5_devx_alloc_uar(struct mlx5_common_device *cdev)
1281 uint32_t retry, uar_mapping;
1284 for (retry = 0; retry < MLX5_ALLOC_UAR_RETRY; ++retry) {
1285 #ifdef MLX5DV_UAR_ALLOC_TYPE_NC
1286 /* Control the mapping type according to the settings. */
1287 uar_mapping = (cdev->config.dbnc == MLX5_SQ_DB_NCACHED) ?
1288 MLX5DV_UAR_ALLOC_TYPE_NC : MLX5DV_UAR_ALLOC_TYPE_BF;
1291 * It seems we have no way to control the memory mapping type
1292 * for the UAR, the default "Write-Combining" type is supposed.
1296 uar = mlx5_glue->devx_alloc_uar(cdev->ctx, uar_mapping);
1297 #ifdef MLX5DV_UAR_ALLOC_TYPE_NC
1298 if (!uar && uar_mapping == MLX5DV_UAR_ALLOC_TYPE_BF) {
1300 * In some environments like virtual machine the
1301 * Write Combining mapped might be not supported and
1302 * UAR allocation fails. We tried "Non-Cached" mapping
1305 DRV_LOG(DEBUG, "Failed to allocate DevX UAR (BF)");
1306 uar_mapping = MLX5DV_UAR_ALLOC_TYPE_NC;
1307 uar = mlx5_glue->devx_alloc_uar(cdev->ctx, uar_mapping);
1308 } else if (!uar && uar_mapping == MLX5DV_UAR_ALLOC_TYPE_NC) {
1310 * If Verbs/kernel does not support "Non-Cached"
1311 * try the "Write-Combining".
1313 DRV_LOG(DEBUG, "Failed to allocate DevX UAR (NC)");
1314 uar_mapping = MLX5DV_UAR_ALLOC_TYPE_BF;
1315 uar = mlx5_glue->devx_alloc_uar(cdev->ctx, uar_mapping);
1319 DRV_LOG(ERR, "Failed to allocate DevX UAR (BF/NC)");
1323 base_addr = mlx5_os_get_devx_uar_base_addr(uar);
1327 * The UARs are allocated by rdma_core within the
1328 * IB device context, on context closure all UARs
1329 * will be freed, should be no memory/object leakage.
1331 DRV_LOG(DEBUG, "Retrying to allocate DevX UAR");
1334 /* Check whether we finally succeeded with valid UAR allocation. */
1336 DRV_LOG(ERR, "Failed to allocate DevX UAR (NULL base)");
1340 * Return void * instead of struct mlx5dv_devx_uar *
1341 * is for compatibility with older rdma-core library headers.
1348 mlx5_devx_uar_release(struct mlx5_uar *uar)
1350 if (uar->obj != NULL)
1351 mlx5_glue->devx_free_uar(uar->obj);
1352 memset(uar, 0, sizeof(*uar));
1356 mlx5_devx_uar_prepare(struct mlx5_common_device *cdev, struct mlx5_uar *uar)
1358 off_t uar_mmap_offset;
1359 const size_t page_size = rte_mem_page_size();
1363 if (page_size == (size_t)-1) {
1364 DRV_LOG(ERR, "Failed to get mem page size");
1368 uar_obj = mlx5_devx_alloc_uar(cdev);
1369 if (uar_obj == NULL || mlx5_os_get_devx_uar_reg_addr(uar_obj) == NULL) {
1371 DRV_LOG(ERR, "Failed to allocate UAR.");
1375 uar_mmap_offset = mlx5_os_get_devx_uar_mmap_offset(uar_obj);
1376 base_addr = mlx5_os_get_devx_uar_base_addr(uar_obj);
1377 uar->dbnc = mlx5_db_map_type_get(uar_mmap_offset, page_size);
1378 uar->bf_db.db = mlx5_os_get_devx_uar_reg_addr(uar_obj);
1379 uar->cq_db.db = RTE_PTR_ADD(base_addr, MLX5_CQ_DOORBELL);
1381 rte_spinlock_init(&uar->bf_sl);
1382 rte_spinlock_init(&uar->cq_sl);
1383 uar->bf_db.sl_p = &uar->bf_sl;
1384 uar->cq_db.sl_p = &uar->cq_sl;
1385 #endif /* RTE_ARCH_64 */
1389 RTE_PMD_EXPORT_NAME(mlx5_common_driver, __COUNTER__);