1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 6WIND S.A.
3 * Copyright 2018 Mellanox Technologies, Ltd
6 #ifndef RTE_PMD_MLX5_COMMON_MR_H_
7 #define RTE_PMD_MLX5_COMMON_MR_H_
11 #include <sys/queue.h>
14 #include <rte_rwlock.h>
15 #include <rte_bitmap.h>
17 #include <rte_memory.h>
19 #include "mlx5_glue.h"
20 #include "mlx5_common_mp.h"
21 #include "mlx5_common_defs.h"
23 /* mlx5 PMD MR struct. */
28 void *obj; /* verbs mr object or devx umem object. */
29 struct mlx5_devx_obj *mkey; /* devx mkey object. */
33 * mr operations typedef
35 typedef int (*mlx5_reg_mr_t)(void *pd, void *addr, size_t length,
36 struct mlx5_pmd_mr *pmd_mr);
37 typedef void (*mlx5_dereg_mr_t)(struct mlx5_pmd_mr *pmd_mr);
39 /* Memory Region object. */
41 LIST_ENTRY(mlx5_mr) mr; /**< Pointer to the prev/next entry. */
42 struct mlx5_pmd_mr pmd_mr; /* PMD memory region. */
43 const struct rte_memseg_list *msl;
44 int ms_base_idx; /* Start index of msl->memseg_arr[]. */
45 int ms_n; /* Number of memsegs in use. */
46 uint32_t ms_bmp_n; /* Number of bits in memsegs bit-mask. */
47 struct rte_bitmap *ms_bmp; /* Bit-mask of memsegs belonged to MR. */
50 /* Cache entry for Memory Region. */
51 struct mr_cache_entry {
52 uintptr_t start; /* Start address of MR. */
53 uintptr_t end; /* End address of MR. */
54 uint32_t lkey; /* rte_cpu_to_be_32(lkey). */
57 /* MR Cache table for Binary search. */
58 struct mlx5_mr_btree {
59 uint16_t len; /* Number of entries. */
60 uint16_t size; /* Total number of entries. */
61 int overflow; /* Mark failure of table expansion. */
62 struct mr_cache_entry (*table)[];
65 /* Per-queue MR control descriptor. */
67 uint32_t *dev_gen_ptr; /* Generation number of device to poll. */
68 uint32_t cur_gen; /* Generation number saved to flush caches. */
69 uint16_t mru; /* Index of last hit entry in top-half cache. */
70 uint16_t head; /* Index of the oldest entry in top-half cache. */
71 struct mr_cache_entry cache[MLX5_MR_CACHE_N]; /* Cache for top-half. */
72 struct mlx5_mr_btree cache_bh; /* Cache for bottom-half. */
75 LIST_HEAD(mlx5_mr_list, mlx5_mr);
76 LIST_HEAD(mlx5_mempool_reg_list, mlx5_mempool_reg);
78 /* Global per-device MR cache. */
79 struct mlx5_mr_share_cache {
80 uint32_t dev_gen; /* Generation number to flush local caches. */
81 rte_rwlock_t rwlock; /* MR cache Lock. */
82 rte_rwlock_t mprwlock; /* Mempool Registration Lock. */
83 uint8_t mp_cb_registered; /* Mempool are Registered. */
84 struct mlx5_mr_btree cache; /* Global MR cache table. */
85 struct mlx5_mr_list mr_list; /* Registered MR list. */
86 struct mlx5_mr_list mr_free_list; /* Freed MR list. */
87 struct mlx5_mempool_reg_list mempool_reg_list; /* Mempool database. */
88 mlx5_reg_mr_t reg_mr_cb; /* Callback to reg_mr func */
89 mlx5_dereg_mr_t dereg_mr_cb; /* Callback to dereg_mr func */
92 /* Multi-Packet RQ buffer header. */
93 struct mlx5_mprq_buf {
94 struct rte_mempool *mp;
95 uint16_t refcnt; /* Atomically accessed refcnt. */
96 uint8_t pad[RTE_PKTMBUF_HEADROOM]; /* Headroom for the first packet. */
97 struct rte_mbuf_ext_shared_info shinfos[];
99 * Shared information per stride.
100 * More memory will be allocated for the first stride head-room and for
103 } __rte_cache_aligned;
106 void mlx5_mprq_buf_free_cb(void *addr, void *opaque);
109 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which the
110 * cloned mbuf is allocated is returned instead.
116 * Memory pool where data is located for given mbuf.
118 static inline struct rte_mempool *
119 mlx5_mb2mp(struct rte_mbuf *buf)
121 if (unlikely(RTE_MBUF_CLONED(buf)))
122 return rte_mbuf_from_indirect(buf)->pool;
127 * Look up LKey from given lookup table by linear search. Firstly look up the
128 * last-hit entry. If miss, the entire array is searched. If found, update the
129 * last-hit index and return LKey.
132 * Pointer to lookup table.
133 * @param[in,out] cached_idx
134 * Pointer to last-hit index.
136 * Size of lookup table.
141 * Searched LKey on success, UINT32_MAX on no match.
143 static __rte_always_inline uint32_t
144 mlx5_mr_lookup_lkey(struct mr_cache_entry *lkp_tbl, uint16_t *cached_idx,
145 uint16_t n, uintptr_t addr)
149 if (likely(addr >= lkp_tbl[*cached_idx].start &&
150 addr < lkp_tbl[*cached_idx].end))
151 return lkp_tbl[*cached_idx].lkey;
152 for (idx = 0; idx < n && lkp_tbl[idx].start != 0; ++idx) {
153 if (addr >= lkp_tbl[idx].start &&
154 addr < lkp_tbl[idx].end) {
157 return lkp_tbl[idx].lkey;
163 /* mlx5_common_mr.c */
166 int mlx5_mr_ctrl_init(struct mlx5_mr_ctrl *mr_ctrl, uint32_t *dev_gen_ptr,
169 void mlx5_mr_btree_free(struct mlx5_mr_btree *bt);
170 void mlx5_mr_btree_dump(struct mlx5_mr_btree *bt __rte_unused);
172 uint32_t mlx5_mr_mempool2mr_bh(struct mlx5_mr_share_cache *share_cache,
173 struct mlx5_mr_ctrl *mr_ctrl,
174 struct rte_mempool *mp, uintptr_t addr);
175 void mlx5_mr_release_cache(struct mlx5_mr_share_cache *mr_cache);
176 int mlx5_mr_create_cache(struct mlx5_mr_share_cache *share_cache, int socket);
177 void mlx5_mr_dump_cache(struct mlx5_mr_share_cache *share_cache __rte_unused);
178 void mlx5_mr_rebuild_cache(struct mlx5_mr_share_cache *share_cache);
180 void mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl);
181 void mlx5_free_mr_by_addr(struct mlx5_mr_share_cache *share_cache,
182 const char *ibdev_name, const void *addr, size_t len);
183 int mlx5_mr_insert_cache(struct mlx5_mr_share_cache *share_cache,
186 mlx5_mr_lookup_list(struct mlx5_mr_share_cache *share_cache,
187 struct mr_cache_entry *entry, uintptr_t addr);
189 mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len, int socket_id,
190 mlx5_reg_mr_t reg_mr_cb);
191 void mlx5_mr_free(struct mlx5_mr *mr, mlx5_dereg_mr_t dereg_mr_cb);
194 mlx5_mr_create_primary(void *pd,
195 struct mlx5_mr_share_cache *share_cache,
196 struct mr_cache_entry *entry, uintptr_t addr,
197 unsigned int mr_ext_memseg_en);
199 /* mlx5_common_verbs.c */
203 mlx5_common_verbs_reg_mr(void *pd, void *addr, size_t length,
204 struct mlx5_pmd_mr *pmd_mr);
207 mlx5_common_verbs_dereg_mr(struct mlx5_pmd_mr *pmd_mr);
210 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, mlx5_dereg_mr_t *dereg_mr_cb);
214 mlx5_mr_mempool_register(struct mlx5_mr_share_cache *share_cache, void *pd,
215 struct rte_mempool *mp, struct mlx5_mp_id *mp_id);
218 mlx5_mr_mempool_unregister(struct mlx5_mr_share_cache *share_cache,
219 struct rte_mempool *mp, struct mlx5_mp_id *mp_id);
221 #endif /* RTE_PMD_MLX5_COMMON_MR_H_ */