1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
5 #include <rte_atomic.h>
6 #include <rte_malloc.h>
9 #include "otx2_common.h"
11 #include "otx2_mbox.h"
15 * Set default NPA configuration.
18 otx2_npa_set_defaults(struct otx2_idev_cfg *idev)
20 idev->npa_pf_func = 0;
21 rte_atomic16_set(&idev->npa_refcnt, 0);
26 * Get intra device config structure.
28 struct otx2_idev_cfg *
29 otx2_intra_dev_get_cfg(void)
31 const char name[] = "octeontx2_intra_device_conf";
32 const struct rte_memzone *mz;
33 struct otx2_idev_cfg *idev;
35 mz = rte_memzone_lookup(name);
39 /* Request for the first time */
40 mz = rte_memzone_reserve_aligned(name, sizeof(struct otx2_idev_cfg),
41 SOCKET_ID_ANY, 0, OTX2_ALIGN);
44 idev->sso_pf_func = 0;
46 otx2_npa_set_defaults(idev);
57 otx2_sso_pf_func_get(void)
59 struct otx2_idev_cfg *idev;
63 idev = otx2_intra_dev_get_cfg();
66 sso_pf_func = idev->sso_pf_func;
76 otx2_sso_pf_func_set(uint16_t sso_pf_func)
78 struct otx2_idev_cfg *idev;
80 idev = otx2_intra_dev_get_cfg();
83 idev->sso_pf_func = sso_pf_func;
93 otx2_npa_pf_func_get(void)
95 struct otx2_idev_cfg *idev;
99 idev = otx2_intra_dev_get_cfg();
102 npa_pf_func = idev->npa_pf_func;
112 otx2_npa_lf_obj_get(void)
114 struct otx2_idev_cfg *idev;
116 idev = otx2_intra_dev_get_cfg();
118 if (idev != NULL && rte_atomic16_read(&idev->npa_refcnt))
126 * Is NPA lf active for the given device?.
129 otx2_npa_lf_active(void *otx2_dev)
131 struct otx2_dev *dev = otx2_dev;
132 struct otx2_idev_cfg *idev;
134 /* Check if npalf is actively used on this dev */
135 idev = otx2_intra_dev_get_cfg();
136 if (!idev || !idev->npa_lf || idev->npa_lf->mbox != dev->mbox)
139 return rte_atomic16_read(&idev->npa_refcnt);
144 * Gets reference only to existing NPA LF object.
146 int otx2_npa_lf_obj_ref(void)
148 struct otx2_idev_cfg *idev;
152 idev = otx2_intra_dev_get_cfg();
154 /* Check if ref not possible */
159 /* Get ref only if > 0 */
160 cnt = rte_atomic16_read(&idev->npa_refcnt);
162 rc = rte_atomic16_cmpset(&idev->npa_refcnt_u16, cnt, cnt + 1);
166 cnt = rte_atomic16_read(&idev->npa_refcnt);
169 return cnt ? 0 : -EINVAL;
175 int otx2_logtype_base;
179 int otx2_logtype_mbox;
183 int otx2_logtype_npa;
187 int otx2_logtype_nix;
191 int otx2_logtype_npc;
199 int otx2_logtype_sso;
203 int otx2_logtype_tim;
207 int otx2_logtype_dpi;
213 RTE_INIT(otx2_log_init);
217 otx2_logtype_base = rte_log_register("pmd.octeontx2.base");
218 if (otx2_logtype_base >= 0)
219 rte_log_set_level(otx2_logtype_base, RTE_LOG_NOTICE);
221 otx2_logtype_mbox = rte_log_register("pmd.octeontx2.mbox");
222 if (otx2_logtype_mbox >= 0)
223 rte_log_set_level(otx2_logtype_mbox, RTE_LOG_NOTICE);
225 otx2_logtype_npa = rte_log_register("pmd.mempool.octeontx2");
226 if (otx2_logtype_npa >= 0)
227 rte_log_set_level(otx2_logtype_npa, RTE_LOG_NOTICE);
229 otx2_logtype_nix = rte_log_register("pmd.net.octeontx2");
230 if (otx2_logtype_nix >= 0)
231 rte_log_set_level(otx2_logtype_nix, RTE_LOG_NOTICE);
233 otx2_logtype_npc = rte_log_register("pmd.net.octeontx2.flow");
234 if (otx2_logtype_npc >= 0)
235 rte_log_set_level(otx2_logtype_npc, RTE_LOG_NOTICE);
237 otx2_logtype_tm = rte_log_register("pmd.net.octeontx2.tm");
238 if (otx2_logtype_tm >= 0)
239 rte_log_set_level(otx2_logtype_tm, RTE_LOG_NOTICE);
241 otx2_logtype_sso = rte_log_register("pmd.event.octeontx2");
242 if (otx2_logtype_sso >= 0)
243 rte_log_set_level(otx2_logtype_sso, RTE_LOG_NOTICE);
245 otx2_logtype_tim = rte_log_register("pmd.event.octeontx2.timer");
246 if (otx2_logtype_tim >= 0)
247 rte_log_set_level(otx2_logtype_tim, RTE_LOG_NOTICE);
249 otx2_logtype_dpi = rte_log_register("pmd.raw.octeontx2.dpi");
250 if (otx2_logtype_dpi >= 0)
251 rte_log_set_level(otx2_logtype_dpi, RTE_LOG_NOTICE);
253 otx2_logtype_ep = rte_log_register("pmd.raw.octeontx2.ep");
254 if (otx2_logtype_ep >= 0)
255 rte_log_set_level(otx2_logtype_ep, RTE_LOG_NOTICE);