1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
10 #include <rte_common.h>
12 #include <rte_memcpy.h>
15 #include "otx2_mbox.h"
17 /* PF/VF message handling timer */
18 #define VF_PF_MBOX_TIMER_MS (20 * 1000)
21 mbox_mem_map(off_t off, size_t size)
23 void *va = MAP_FAILED;
29 mem_fd = open("/dev/mem", O_RDWR);
33 va = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, mem_fd, off);
37 otx2_err("Failed to mmap sz=0x%zx, fd=%d, off=%jd",
38 size, mem_fd, (intmax_t)off);
44 mbox_mem_unmap(void *va, size_t size)
51 otx2_update_pass_hwcap(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
53 RTE_SET_USED(pci_dev);
55 /* Update this logic when we have A1 */
56 dev->hwcap |= OTX2_HWCAP_F_A0;
60 otx2_update_vf_hwcap(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
64 switch (pci_dev->id.device_id) {
65 case PCI_DEVID_OCTEONTX2_RVU_PF:
67 case PCI_DEVID_OCTEONTX2_RVU_SSO_TIM_VF:
68 case PCI_DEVID_OCTEONTX2_RVU_NPA_VF:
69 case PCI_DEVID_OCTEONTX2_RVU_CPT_VF:
70 case PCI_DEVID_OCTEONTX2_RVU_AF_VF:
71 case PCI_DEVID_OCTEONTX2_RVU_VF:
72 dev->hwcap |= OTX2_HWCAP_F_VF;
79 * Initialize the otx2 device
82 otx2_dev_init(struct rte_pci_device *pci_dev, void *otx2_dev)
84 int up_direction = MBOX_DIR_PFAF_UP;
85 int rc, direction = MBOX_DIR_PFAF;
86 struct otx2_dev *dev = otx2_dev;
91 bar2 = (uintptr_t)pci_dev->mem_resource[2].addr;
92 bar4 = (uintptr_t)pci_dev->mem_resource[4].addr;
94 if (bar2 == 0 || bar4 == 0) {
95 otx2_err("Failed to get pci bars");
100 dev->node = pci_dev->device.numa_node;
101 dev->maxvf = pci_dev->max_vfs;
105 otx2_update_vf_hwcap(pci_dev, dev);
106 otx2_update_pass_hwcap(pci_dev, dev);
108 if (otx2_dev_is_vf(dev)) {
109 direction = MBOX_DIR_VFPF;
110 up_direction = MBOX_DIR_VFPF_UP;
113 /* Initialize the local mbox */
114 rc = otx2_mbox_init(&dev->mbox_local, bar4, bar2, direction, 1);
117 dev->mbox = &dev->mbox_local;
119 rc = otx2_mbox_init(&dev->mbox_up, bar4, bar2, up_direction, 1);
123 /* Check the readiness of PF/VF */
124 rc = otx2_send_ready_msg(dev->mbox, &dev->pf_func);
128 dev->pf = otx2_get_pf(dev->pf_func);
129 dev->vf = otx2_get_vf(dev->pf_func);
130 memset(&dev->active_vfs, 0, sizeof(dev->active_vfs));
132 /* Found VF devices in a PF device */
133 if (pci_dev->max_vfs > 0) {
135 /* Remap mbox area for all vf's */
136 bar4_addr = otx2_read64(bar2 + RVU_PF_VF_BAR4_ADDR);
137 if (bar4_addr == 0) {
142 hwbase = mbox_mem_map(bar4_addr, MBOX_SIZE * pci_dev->max_vfs);
143 if (hwbase == MAP_FAILED) {
147 /* Init mbox object */
148 rc = otx2_mbox_init(&dev->mbox_vfpf, (uintptr_t)hwbase,
149 bar2, MBOX_DIR_PFVF, pci_dev->max_vfs);
153 /* PF -> VF UP messages */
154 rc = otx2_mbox_init(&dev->mbox_vfpf_up, (uintptr_t)hwbase,
155 bar2, MBOX_DIR_PFVF_UP, pci_dev->max_vfs);
160 dev->mbox_active = 1;
164 mbox_mem_unmap(hwbase, MBOX_SIZE * pci_dev->max_vfs);
166 otx2_mbox_fini(dev->mbox);
167 otx2_mbox_fini(&dev->mbox_up);
174 * Finalize the otx2 device
177 otx2_dev_fini(struct rte_pci_device *pci_dev, void *otx2_dev)
179 struct otx2_dev *dev = otx2_dev;
180 struct otx2_idev_cfg *idev;
181 struct otx2_mbox *mbox;
183 /* Clear references to this pci dev */
184 idev = otx2_intra_dev_get_cfg();
185 if (idev->npa_lf && idev->npa_lf->pci_dev == pci_dev)
188 /* Release PF - VF */
189 mbox = &dev->mbox_vfpf;
190 if (mbox->hwbase && mbox->dev)
191 mbox_mem_unmap((void *)mbox->hwbase,
192 MBOX_SIZE * pci_dev->max_vfs);
193 otx2_mbox_fini(mbox);
194 mbox = &dev->mbox_vfpf_up;
195 otx2_mbox_fini(mbox);
197 /* Release PF - AF */
199 otx2_mbox_fini(mbox);
200 mbox = &dev->mbox_up;
201 otx2_mbox_fini(mbox);
202 dev->mbox_active = 0;