1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
8 #include <rte_bus_pci.h>
10 #include "otx2_common.h"
12 #include "otx2_mbox.h"
13 #include "otx2_mempool.h"
15 /* Common HWCAP flags. Use from LSB bits */
16 #define OTX2_HWCAP_F_VF BIT_ULL(8) /* VF device */
17 #define otx2_dev_is_vf(dev) (dev->hwcap & OTX2_HWCAP_F_VF)
18 #define otx2_dev_is_pf(dev) (!(dev->hwcap & OTX2_HWCAP_F_VF))
19 #define otx2_dev_is_lbk(dev) ((dev->hwcap & OTX2_HWCAP_F_VF) && \
20 (dev->tx_chan_base < 0x700))
21 #define otx2_dev_revid(dev) (dev->hwcap & 0xFF)
22 #define otx2_dev_is_sdp(dev) (dev->sdp_link)
24 #define otx2_dev_is_vf_or_sdp(dev) \
25 (otx2_dev_is_vf(dev) || otx2_dev_is_sdp(dev))
27 #define otx2_dev_is_A0(dev) \
28 ((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) && \
29 (RVU_PCI_REV_MINOR(otx2_dev_revid(dev)) == 0x0))
30 #define otx2_dev_is_Ax(dev) \
31 ((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0))
33 #define otx2_dev_is_95xx_A0(dev) \
34 ((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) && \
35 (RVU_PCI_REV_MINOR(otx2_dev_revid(dev)) == 0x0) && \
36 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x1))
37 #define otx2_dev_is_95xx_Ax(dev) \
38 ((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) && \
39 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x1))
41 #define otx2_dev_is_96xx_A0(dev) \
42 ((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) && \
43 (RVU_PCI_REV_MINOR(otx2_dev_revid(dev)) == 0x0) && \
44 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x0))
45 #define otx2_dev_is_96xx_Ax(dev) \
46 ((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) && \
47 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x0))
51 /* Link status callback */
52 typedef void (*otx2_link_status_t)(struct otx2_dev *dev,
53 struct cgx_link_user_info *link);
54 /* PTP info callback */
55 typedef int (*otx2_ptp_info_t)(struct otx2_dev *dev, bool ptp_en);
58 otx2_link_status_t link_status_update;
59 otx2_ptp_info_t ptp_info_update;
63 int node __rte_cache_aligned; \
67 uint8_t mbox_active; \
69 uint64_t active_vfs[MAX_VFPF_DWORD_BITS]; \
72 struct otx2_mbox mbox_local; \
73 struct otx2_mbox mbox_up; \
74 struct otx2_mbox mbox_vfpf; \
75 struct otx2_mbox mbox_vfpf_up; \
77 int timer_set; /* ~0 : no alarm handling */ \
79 struct otx2_npa_lf npalf; \
80 struct otx2_mbox *mbox; \
82 const struct otx2_dev_ops *ops
88 int otx2_dev_priv_init(struct rte_pci_device *pci_dev, void *otx2_dev);
90 /* Common dev init and fini routines */
92 static __rte_always_inline int
93 otx2_dev_init(struct rte_pci_device *pci_dev, void *otx2_dev)
95 struct otx2_dev *dev = otx2_dev;
99 rc = rte_pci_read_config(pci_dev, &rev_id,
100 1, RVU_PCI_REVISION_ID);
102 otx2_err("Failed to read pci revision id, rc=%d", rc);
107 return otx2_dev_priv_init(pci_dev, otx2_dev);
110 void otx2_dev_fini(struct rte_pci_device *pci_dev, void *otx2_dev);
111 int otx2_dev_active_vfs(void *otx2_dev);
113 #define RVU_PFVF_PF_SHIFT 10
114 #define RVU_PFVF_PF_MASK 0x3F
115 #define RVU_PFVF_FUNC_SHIFT 0
116 #define RVU_PFVF_FUNC_MASK 0x3FF
119 otx2_get_vf(uint16_t pf_func)
121 return (((pf_func >> RVU_PFVF_FUNC_SHIFT) & RVU_PFVF_FUNC_MASK) - 1);
125 otx2_get_pf(uint16_t pf_func)
127 return (pf_func >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK;
131 otx2_pfvf_func(int pf, int vf)
133 return (pf << RVU_PFVF_PF_SHIFT) | ((vf << RVU_PFVF_FUNC_SHIFT) + 1);
137 otx2_is_afvf(uint16_t pf_func)
139 return !(pf_func & ~RVU_PFVF_FUNC_MASK);
142 #endif /* _OTX2_DEV_H */