1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
11 /**< Intel(R) QAT device name for PCI registration */
12 #define QAT_PCI_NAME qat
14 * Maximum number of SGL entries
16 #define QAT_SGL_MAX_NUMBER 16
18 #define QAT_64_BTYE_ALIGN_MASK (~0x3f)
20 /* Intel(R) QuickAssist Technology device generation is enumerated
21 * from one according to the generation of the device
28 enum qat_service_type {
29 QAT_SERVICE_ASYMMETRIC = 0,
30 QAT_SERVICE_SYMMETRIC,
31 QAT_SERVICE_COMPRESSION,
34 #define QAT_MAX_SERVICES (QAT_SERVICE_INVALID)
36 /**< Common struct for scatter-gather list operations */
46 uint32_t num_mapped_bufs;
47 struct qat_flat_buf buffers[QAT_SGL_MAX_NUMBER];
48 } __rte_packed __rte_cache_aligned;
50 /** Common, i.e. not service-specific, statistics */
51 struct qat_common_stats {
52 uint64_t enqueued_count;
53 /**< Count of all operations enqueued */
54 uint64_t dequeued_count;
55 /**< Count of all operations dequeued */
57 uint64_t enqueue_err_count;
58 /**< Total error count on operations enqueued */
59 uint64_t dequeue_err_count;
60 /**< Total error count on operations dequeued */
63 struct qat_pci_device;
66 qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buf_start,
67 struct qat_sgl *list, uint32_t data_len);
69 qat_stats_get(struct qat_pci_device *dev,
70 struct qat_common_stats *stats,
71 enum qat_service_type service);
73 qat_stats_reset(struct qat_pci_device *dev,
74 enum qat_service_type service);
76 #endif /* _QAT_COMMON_H_ */