1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
7 #include <rte_bus_pci.h>
9 #include "qat_common.h"
11 #include "adf_transport_access_macros.h"
14 #define QAT_DETACHED (0)
15 #define QAT_ATTACHED (1)
17 #define QAT_DEV_NAME_MAX_LEN 64
19 #define SYM_ENQ_THRESHOLD_NAME "qat_sym_enq_threshold"
20 #define ASYM_ENQ_THRESHOLD_NAME "qat_asym_enq_threshold"
21 #define COMP_ENQ_THRESHOLD_NAME "qat_comp_enq_threshold"
22 #define MAX_QP_THRESHOLD_SIZE 32
24 struct qat_dev_cmd_param {
29 enum qat_comp_num_im_buffers {
30 QAT_NUM_INTERM_BUFS_GEN1 = 12,
31 QAT_NUM_INTERM_BUFS_GEN2 = 20,
32 QAT_NUM_INTERM_BUFS_GEN3 = 20
36 * This struct holds all the data about a QAT pci device
37 * including data about all services it supports.
43 struct qat_sym_dev_private;
44 struct qat_asym_dev_private;
45 struct qat_comp_dev_private;
47 struct qat_pci_device {
49 /* Data used by all services */
50 char name[QAT_DEV_NAME_MAX_LEN];
51 /**< Name of qat pci device */
53 /**< Device instance for this qat pci device */
54 struct rte_pci_device *pci_dev;
55 /**< PCI information. */
56 enum qat_device_gen qat_dev_gen;
57 /**< QAT device generation */
58 rte_spinlock_t arb_csr_lock;
59 /**< lock to protect accesses to the arbiter CSR */
62 /**< Flag indicating the device is attached */
64 struct qat_qp *qps_in_use[QAT_MAX_SERVICES][ADF_MAX_QPS_ON_ANY_SERVICE];
65 /**< links to qps set up for each service, index same as on API */
67 /* Data relating to symmetric crypto service */
68 struct qat_sym_dev_private *sym_dev;
69 /**< link back to cryptodev private data */
70 struct rte_device sym_rte_dev;
71 /**< This represents the crypto sym subset of this pci device.
72 * Register with this rather than with the one in
73 * pci_dev so that its driver can have a crypto-specific name
76 /* Data relating to asymmetric crypto service */
77 struct qat_asym_dev_private *asym_dev;
78 /**< link back to cryptodev private data */
79 struct rte_device asym_rte_dev;
80 /**< This represents the crypto asym subset of this pci device.
81 * Register with this rather than with the one in
82 * pci_dev so that its driver can have a crypto-specific name
85 /* Data relating to compression service */
86 struct qat_comp_dev_private *comp_dev;
87 /**< link back to compressdev private data */
88 struct rte_device comp_rte_dev;
89 /**< This represents the compression subset of this pci device.
90 * Register with this rather than with the one in
91 * pci_dev so that its driver can have a compression-specific name
94 /* Data relating to asymmetric crypto service */
98 struct qat_gen_hw_data {
99 enum qat_device_gen dev_gen;
100 const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_ON_ANY_SERVICE];
101 enum qat_comp_num_im_buffers comp_num_im_bufs_required;
104 extern struct qat_gen_hw_data qat_gen_config[];
106 struct qat_pci_device *
107 qat_pci_device_allocate(struct rte_pci_device *pci_dev,
108 struct qat_dev_cmd_param *qat_dev_cmd_param);
111 qat_pci_device_release(struct rte_pci_device *pci_dev);
113 struct qat_pci_device *
114 qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev);
116 /* declaration needed for weak functions */
118 qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,
119 struct qat_dev_cmd_param *qat_dev_cmd_param);
122 qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,
123 struct qat_dev_cmd_param *qat_dev_cmd_param);
126 qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused);
129 qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused);
132 qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,
133 struct qat_dev_cmd_param *qat_dev_cmd_param);
136 qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused);
138 #endif /* _QAT_DEVICE_H_ */