1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
7 #include <rte_bus_pci.h>
9 #include "qat_common.h"
11 #include "adf_transport_access_macros.h"
14 #define QAT_DETACHED (0)
15 #define QAT_ATTACHED (1)
17 #define QAT_DEV_NAME_MAX_LEN 64
19 #define SYM_ENQ_THRESHOLD_NAME "qat_sym_enq_threshold"
20 #define ASYM_ENQ_THRESHOLD_NAME "qat_asym_enq_threshold"
21 #define COMP_ENQ_THRESHOLD_NAME "qat_comp_enq_threshold"
22 #define MAX_QP_THRESHOLD_SIZE 32
25 * Function prototypes for GENx specific device operations.
27 typedef int (*qat_dev_reset_ring_pairs_t)
28 (struct qat_pci_device *);
29 typedef const struct rte_mem_resource* (*qat_dev_get_transport_bar_t)
30 (struct rte_pci_device *);
31 typedef int (*qat_dev_get_misc_bar_t)
32 (struct rte_mem_resource **, struct rte_pci_device *);
33 typedef int (*qat_dev_read_config_t)
34 (struct qat_pci_device *);
35 typedef int (*qat_dev_get_extra_size_t)(void);
37 struct qat_dev_hw_spec_funcs {
38 qat_dev_reset_ring_pairs_t qat_dev_reset_ring_pairs;
39 qat_dev_get_transport_bar_t qat_dev_get_transport_bar;
40 qat_dev_get_misc_bar_t qat_dev_get_misc_bar;
41 qat_dev_read_config_t qat_dev_read_config;
42 qat_dev_get_extra_size_t qat_dev_get_extra_size;
45 extern struct qat_dev_hw_spec_funcs *qat_dev_hw_spec[];
47 struct qat_dev_cmd_param {
52 enum qat_comp_num_im_buffers {
53 QAT_NUM_INTERM_BUFS_GEN1 = 12,
54 QAT_NUM_INTERM_BUFS_GEN2 = 20,
55 QAT_NUM_INTERM_BUFS_GEN3 = 64
58 struct qat_device_info {
59 const struct rte_memzone *mz;
60 /**< mz to store the qat_pci_device so it can be
61 * shared across processes
63 struct rte_pci_device *pci_dev;
64 struct rte_device sym_rte_dev;
65 /**< This represents the crypto sym subset of this pci device.
66 * Register with this rather than with the one in
67 * pci_dev so that its driver can have a crypto-specific name
70 struct rte_device asym_rte_dev;
71 /**< This represents the crypto asym subset of this pci device.
72 * Register with this rather than with the one in
73 * pci_dev so that its driver can have a crypto-specific name
76 struct rte_device comp_rte_dev;
77 /**< This represents the compression subset of this pci device.
78 * Register with this rather than with the one in
79 * pci_dev so that its driver can have a compression-specific name
83 extern struct qat_device_info qat_pci_devs[];
85 struct qat_sym_dev_private;
86 struct qat_asym_dev_private;
87 struct qat_comp_dev_private;
90 * This struct holds all the data about a QAT pci device
91 * including data about all services it supports.
96 * Note: as this data can be shared in a multi-process scenario,
97 * any pointers in it must also point to shared memory.
99 struct qat_pci_device {
101 /* Data used by all services */
102 char name[QAT_DEV_NAME_MAX_LEN];
103 /**< Name of qat pci device */
105 /**< Id of device instance for this qat pci device */
106 enum qat_device_gen qat_dev_gen;
107 /**< QAT device generation */
108 rte_spinlock_t arb_csr_lock;
109 /**< lock to protect accesses to the arbiter CSR */
111 struct qat_qp *qps_in_use[QAT_MAX_SERVICES][ADF_MAX_QPS_ON_ANY_SERVICE];
112 /**< links to qps set up for each service, index same as on API */
114 /* Data relating to symmetric crypto service */
115 struct qat_sym_dev_private *sym_dev;
116 /**< link back to cryptodev private data */
118 int qat_sym_driver_id;
119 /**< Symmetric driver id used by this device */
121 /* Data relating to asymmetric crypto service */
122 struct qat_asym_dev_private *asym_dev;
123 /**< link back to cryptodev private data */
125 int qat_asym_driver_id;
126 /**< Symmetric driver id used by this device */
128 /* Data relating to compression service */
129 struct qat_comp_dev_private *comp_dev;
130 /**< link back to compressdev private data */
131 struct qat_qp_hw_data qp_gen4_data[QAT_GEN4_BUNDLE_NUM]
132 [QAT_GEN4_QPS_PER_BUNDLE_NUM];
133 /**< Data of ring configuration on gen4 */
134 void *misc_bar_io_addr;
135 /**< Address of misc bar */
138 struct qat_gen_hw_data {
139 enum qat_device_gen dev_gen;
140 const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_ON_ANY_SERVICE];
141 enum qat_comp_num_im_buffers comp_num_im_bufs_required;
142 struct qat_pf2vf_dev *pf2vf_dev;
145 struct qat_pf2vf_dev {
146 uint32_t pf2vf_offset;
147 uint32_t vf2pf_offset;
148 int pf2vf_type_shift;
149 uint32_t pf2vf_type_mask;
150 int pf2vf_data_shift;
151 uint32_t pf2vf_data_mask;
154 extern struct qat_gen_hw_data qat_gen_config[];
156 struct qat_pci_device *
157 qat_pci_device_allocate(struct rte_pci_device *pci_dev,
158 struct qat_dev_cmd_param *qat_dev_cmd_param);
160 struct qat_pci_device *
161 qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev);
163 /* declaration needed for weak functions */
165 qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,
166 struct qat_dev_cmd_param *qat_dev_cmd_param);
169 qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,
170 struct qat_dev_cmd_param *qat_dev_cmd_param);
173 qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused);
176 qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused);
179 qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,
180 struct qat_dev_cmd_param *qat_dev_cmd_param);
183 qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused);
186 qat_query_svc(struct qat_pci_device *qat_pci_dev, uint8_t *ret);
188 #endif /* _QAT_DEVICE_H_ */