1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
7 #include "qat_common.h"
8 #include "adf_transport_access_macros.h"
10 struct qat_pci_device;
12 #define QAT_CSR_HEAD_WRITE_THRESH 32U
13 /* number of requests to accumulate before writing head CSR */
15 #define QAT_QP_MIN_INFL_THRESHOLD 256
17 typedef int (*build_request_t)(void *op,
18 uint8_t *req, void *op_cookie,
19 enum qat_device_gen qat_dev_gen);
20 /**< Build a request from an op. */
23 * Structure with data needed for creation of queue pair.
25 struct qat_qp_hw_data {
26 enum qat_service_type service_type;
27 uint8_t hw_bundle_num;
34 * Structure with data needed for creation of queue pair.
36 struct qat_qp_config {
37 const struct qat_qp_hw_data *hw;
38 uint32_t nb_descriptors;
41 build_request_t build_request;
42 const char *service_str;
46 * Structure associated with each queue.
49 char memz_name[RTE_MEMZONE_NAMESIZE];
50 void *base_addr; /* Base address */
51 rte_iova_t base_phys_addr; /* Queue physical address */
52 uint32_t head; /* Shadow copy of the head */
53 uint32_t tail; /* Shadow copy of the tail */
57 uint8_t hw_bundle_number;
58 uint8_t hw_queue_number;
59 /* HW queue aka ring offset on bundle */
60 uint32_t csr_head; /* last written head value */
61 uint32_t csr_tail; /* last written tail value */
62 uint16_t nb_processed_responses;
63 /* number of responses processed since last CSR head write */
68 struct qat_queue tx_q;
69 struct qat_queue rx_q;
70 struct qat_common_stats stats;
71 struct rte_mempool *op_cookie_pool;
73 uint32_t nb_descriptors;
74 enum qat_device_gen qat_dev_gen;
75 build_request_t build_request;
76 enum qat_service_type service_type;
77 struct qat_pci_device *qat_dev;
78 /**< qat device this qp is on */
80 uint32_t dequeued __rte_aligned(4);
81 uint16_t max_inflights;
82 uint16_t min_enq_burst_threshold;
83 } __rte_cache_aligned;
85 extern const struct qat_qp_hw_data qat_gen1_qps[][ADF_MAX_QPS_ON_ANY_SERVICE];
86 extern const struct qat_qp_hw_data qat_gen3_qps[][ADF_MAX_QPS_ON_ANY_SERVICE];
89 qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops);
92 qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops);
95 qat_qp_release(struct qat_qp **qp_addr);
98 qat_qp_setup(struct qat_pci_device *qat_dev,
99 struct qat_qp **qp_addr, uint16_t queue_pair_id,
100 struct qat_qp_config *qat_qp_conf);
103 qat_qps_per_service(const struct qat_qp_hw_data *qp_hw_data,
104 enum qat_service_type service);
106 /* Needed for weak function*/
108 qat_comp_process_response(void **op __rte_unused, uint8_t *resp __rte_unused,
109 void *op_cookie __rte_unused,
110 uint64_t *dequeue_err_count __rte_unused);
112 #endif /* _QAT_QP_H_ */