drivers/common/qat/qat_qp.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Intel Corporation
   3  */
   4 #ifndef _QAT_QP_H_
   5 #define _QAT_QP_H_
   6
   7 #include "qat_common.h"
   8 #include "adf_transport_access_macros.h"
   9
  10 #define QAT_CSR_HEAD_WRITE_THRESH 32U
  11 /* number of requests to accumulate before writing head CSR */
  12
  13 #define QAT_QP_MIN_INFL_THRESHOLD       256
  14
  15 /* Default qp configuration for GEN4 devices */
  16 #define QAT_GEN4_QP_DEFCON      (QAT_SERVICE_SYMMETRIC |        \
  17                                 QAT_SERVICE_SYMMETRIC << 8 |    \
  18                                 QAT_SERVICE_SYMMETRIC << 16 |   \
  19                                 QAT_SERVICE_SYMMETRIC << 24)
  20
  21 /* QAT GEN 4 specific macros */
  22 #define QAT_GEN4_BUNDLE_NUM             4
  23 #define QAT_GEN4_QPS_PER_BUNDLE_NUM     1
  24
  25 struct qat_pci_device;
  26
  27 /**
  28  * Structure associated with each queue.
  29  */
  30 struct qat_queue {
  31         char            memz_name[RTE_MEMZONE_NAMESIZE];
  32         void            *base_addr;             /* Base address */
  33         rte_iova_t      base_phys_addr;         /* Queue physical address */
  34         uint32_t        head;                   /* Shadow copy of the head */
  35         uint32_t        tail;                   /* Shadow copy of the tail */
  36         uint32_t        modulo_mask;
  37         uint32_t        msg_size;
  38         uint32_t        queue_size;
  39         uint8_t         trailz;
  40         uint8_t         hw_bundle_number;
  41         uint8_t         hw_queue_number;
  42         /* HW queue aka ring offset on bundle */
  43         uint32_t        csr_head;               /* last written head value */
  44         uint32_t        csr_tail;               /* last written tail value */
  45         uint16_t        nb_processed_responses;
  46         /* number of responses processed since last CSR head write */
  47 };
  48
  49 struct qat_qp {
  50         void                    *mmap_bar_addr;
  51         struct qat_queue        tx_q;
  52         struct qat_queue        rx_q;
  53         struct qat_common_stats stats;
  54         struct rte_mempool *op_cookie_pool;
  55         void **op_cookies;
  56         uint32_t nb_descriptors;
  57         enum qat_device_gen qat_dev_gen;
  58         enum qat_service_type service_type;
  59         struct qat_pci_device *qat_dev;
  60         /**< qat device this qp is on */
  61         uint32_t enqueued;
  62         uint32_t dequeued __rte_aligned(4);
  63         uint16_t max_inflights;
  64         uint16_t min_enq_burst_threshold;
  65 } __rte_cache_aligned;
  66
  67 /**
  68  * Structure with data needed for creation of queue pair.
  69  */
  70 struct qat_qp_hw_data {
  71         enum qat_service_type service_type;
  72         uint8_t hw_bundle_num;
  73         uint8_t tx_ring_num;
  74         uint8_t rx_ring_num;
  75         uint16_t tx_msg_size;
  76         uint16_t rx_msg_size;
  77 };
  78
  79 /**
  80  * Structure with data needed for creation of queue pair.
  81  */
  82 struct qat_qp_config {
  83         const struct qat_qp_hw_data *hw;
  84         uint32_t nb_descriptors;
  85         uint32_t cookie_size;
  86         int socket_id;
  87         const char *service_str;
  88 };
  89
  90 uint16_t
  91 qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops);
  92
  93 uint16_t
  94 qat_enqueue_comp_op_burst(void *qp, void **ops, uint16_t nb_ops);
  95
  96 uint16_t
  97 qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops);
  98
  99 int
 100 qat_qp_release(enum qat_device_gen qat_dev_gen, struct qat_qp **qp_addr);
 101
 102 int
 103 qat_qp_setup(struct qat_pci_device *qat_dev,
 104                 struct qat_qp **qp_addr, uint16_t queue_pair_id,
 105                 struct qat_qp_config *qat_qp_conf);
 106
 107 int
 108 qat_qps_per_service(struct qat_pci_device *qat_dev,
 109                         enum qat_service_type service);
 110
 111 int
 112 qat_cq_get_fw_version(struct qat_qp *qp);
 113
 114 /* Needed for weak function*/
 115 int
 116 qat_comp_process_response(void **op __rte_unused, uint8_t *resp __rte_unused,
 117                           void *op_cookie __rte_unused,
 118                           uint64_t *dequeue_err_count __rte_unused);
 119
 120 int
 121 qat_select_valid_queue(struct qat_pci_device *qat_dev, int qp_id,
 122                         enum qat_service_type service_type);
 123
 124 int
 125 qat_read_qp_config(struct qat_pci_device *qat_dev);
 126
 127 /**
 128  * Function prototypes for GENx specific queue pair operations.
 129  **/
 130 typedef int (*qat_qp_rings_per_service_t)
 131                 (struct qat_pci_device *, enum qat_service_type);
 132
 133 typedef void (*qat_qp_build_ring_base_t)(void *, struct qat_queue *);
 134
 135 typedef void (*qat_qp_adf_arb_enable_t)(const struct qat_queue *, void *,
 136                 rte_spinlock_t *);
 137
 138 typedef void (*qat_qp_adf_arb_disable_t)(const struct qat_queue *, void *,
 139                 rte_spinlock_t *);
 140
 141 typedef void (*qat_qp_adf_configure_queues_t)(struct qat_qp *);
 142
 143 typedef void (*qat_qp_csr_write_tail_t)(struct qat_qp *qp, struct qat_queue *q);
 144
 145 typedef void (*qat_qp_csr_write_head_t)(struct qat_qp *qp, struct qat_queue *q,
 146                 uint32_t new_head);
 147
 148 typedef void (*qat_qp_csr_setup_t)(struct qat_pci_device*, void *,
 149                 struct qat_qp *);
 150
 151 typedef const struct qat_qp_hw_data * (*qat_qp_get_hw_data_t)(
 152                 struct qat_pci_device *dev, enum qat_service_type service_type,
 153                 uint16_t qp_id);
 154
 155 struct qat_qp_hw_spec_funcs {
 156         qat_qp_rings_per_service_t      qat_qp_rings_per_service;
 157         qat_qp_build_ring_base_t        qat_qp_build_ring_base;
 158         qat_qp_adf_arb_enable_t         qat_qp_adf_arb_enable;
 159         qat_qp_adf_arb_disable_t        qat_qp_adf_arb_disable;
 160         qat_qp_adf_configure_queues_t   qat_qp_adf_configure_queues;
 161         qat_qp_csr_write_tail_t         qat_qp_csr_write_tail;
 162         qat_qp_csr_write_head_t         qat_qp_csr_write_head;
 163         qat_qp_csr_setup_t              qat_qp_csr_setup;
 164         qat_qp_get_hw_data_t            qat_qp_get_hw_data;
 165 };
 166
 167 extern struct qat_qp_hw_spec_funcs *qat_qp_hw_spec[];
 168
 169 extern const struct qat_qp_hw_data qat_gen1_qps[][ADF_MAX_QPS_ON_ANY_SERVICE];
 170 extern const struct qat_qp_hw_data qat_gen3_qps[][ADF_MAX_QPS_ON_ANY_SERVICE];
 171
 172 #endif /* _QAT_QP_H_ */