drivers/common/qat/qat_qp.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Intel Corporation
   3  */
   4 #ifndef _QAT_QP_H_
   5 #define _QAT_QP_H_
   6
   7 #include "qat_common.h"
   8 #include "adf_transport_access_macros.h"
   9
  10 #define QAT_CSR_HEAD_WRITE_THRESH 32U
  11 /* number of requests to accumulate before writing head CSR */
  12
  13 #define QAT_QP_MIN_INFL_THRESHOLD       256
  14
  15 struct qat_pci_device;
  16
  17 /**
  18  * Structure associated with each queue.
  19  */
  20 struct qat_queue {
  21         char            memz_name[RTE_MEMZONE_NAMESIZE];
  22         void            *base_addr;             /* Base address */
  23         rte_iova_t      base_phys_addr;         /* Queue physical address */
  24         uint32_t        head;                   /* Shadow copy of the head */
  25         uint32_t        tail;                   /* Shadow copy of the tail */
  26         uint32_t        modulo_mask;
  27         uint32_t        msg_size;
  28         uint32_t        queue_size;
  29         uint8_t         trailz;
  30         uint8_t         hw_bundle_number;
  31         uint8_t         hw_queue_number;
  32         /* HW queue aka ring offset on bundle */
  33         uint32_t        csr_head;               /* last written head value */
  34         uint32_t        csr_tail;               /* last written tail value */
  35         uint16_t        nb_processed_responses;
  36         /* number of responses processed since last CSR head write */
  37 };
  38
  39 struct qat_qp {
  40         void                    *mmap_bar_addr;
  41         struct qat_queue        tx_q;
  42         struct qat_queue        rx_q;
  43         struct qat_common_stats stats;
  44         struct rte_mempool *op_cookie_pool;
  45         void **op_cookies;
  46         uint32_t nb_descriptors;
  47         enum qat_device_gen qat_dev_gen;
  48         enum qat_service_type service_type;
  49         struct qat_pci_device *qat_dev;
  50         /**< qat device this qp is on */
  51         uint32_t enqueued;
  52         uint32_t dequeued __rte_aligned(4);
  53         uint16_t max_inflights;
  54         uint16_t min_enq_burst_threshold;
  55 } __rte_cache_aligned;
  56
  57 /**
  58  * Structure with data needed for creation of queue pair.
  59  */
  60 struct qat_qp_hw_data {
  61         enum qat_service_type service_type;
  62         uint8_t hw_bundle_num;
  63         uint8_t tx_ring_num;
  64         uint8_t rx_ring_num;
  65         uint16_t tx_msg_size;
  66         uint16_t rx_msg_size;
  67 };
  68
  69 /**
  70  * Structure with data needed for creation of queue pair.
  71  */
  72 struct qat_qp_config {
  73         const struct qat_qp_hw_data *hw;
  74         uint32_t nb_descriptors;
  75         uint32_t cookie_size;
  76         int socket_id;
  77         const char *service_str;
  78 };
  79
  80 uint16_t
  81 qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops);
  82
  83 uint16_t
  84 qat_enqueue_comp_op_burst(void *qp, void **ops, uint16_t nb_ops);
  85
  86 uint16_t
  87 qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops);
  88
  89 int
  90 qat_qp_release(enum qat_device_gen qat_dev_gen, struct qat_qp **qp_addr);
  91
  92 int
  93 qat_qp_setup(struct qat_pci_device *qat_dev,
  94                 struct qat_qp **qp_addr, uint16_t queue_pair_id,
  95                 struct qat_qp_config *qat_qp_conf);
  96
  97 int
  98 qat_qps_per_service(struct qat_pci_device *qat_dev,
  99                 enum qat_service_type service);
 100
 101 const struct qat_qp_hw_data *
 102 qat_qp_get_hw_data(struct qat_pci_device *qat_dev,
 103                 enum qat_service_type service, uint16_t qp_id);
 104
 105 int
 106 qat_cq_get_fw_version(struct qat_qp *qp);
 107
 108 /* Needed for weak function*/
 109 int
 110 qat_comp_process_response(void **op __rte_unused, uint8_t *resp __rte_unused,
 111                           void *op_cookie __rte_unused,
 112                           uint64_t *dequeue_err_count __rte_unused);
 113 int
 114 qat_read_qp_config(struct qat_pci_device *qat_dev);
 115
 116 /**
 117  * Function prototypes for GENx specific queue pair operations.
 118  **/
 119 typedef int (*qat_qp_rings_per_service_t)
 120                 (struct qat_pci_device *, enum qat_service_type);
 121
 122 typedef void (*qat_qp_build_ring_base_t)(void *, struct qat_queue *);
 123
 124 typedef void (*qat_qp_adf_arb_enable_t)(const struct qat_queue *, void *,
 125                 rte_spinlock_t *);
 126
 127 typedef void (*qat_qp_adf_arb_disable_t)(const struct qat_queue *, void *,
 128                 rte_spinlock_t *);
 129
 130 typedef void (*qat_qp_adf_configure_queues_t)(struct qat_qp *);
 131
 132 typedef void (*qat_qp_csr_write_tail_t)(struct qat_qp *qp, struct qat_queue *q);
 133
 134 typedef void (*qat_qp_csr_write_head_t)(struct qat_qp *qp, struct qat_queue *q,
 135                 uint32_t new_head);
 136
 137 typedef void (*qat_qp_csr_setup_t)(struct qat_pci_device*, void *,
 138                 struct qat_qp *);
 139
 140 typedef const struct qat_qp_hw_data * (*qat_qp_get_hw_data_t)(
 141                 struct qat_pci_device *dev, enum qat_service_type service_type,
 142                 uint16_t qp_id);
 143
 144 struct qat_qp_hw_spec_funcs {
 145         qat_qp_rings_per_service_t      qat_qp_rings_per_service;
 146         qat_qp_build_ring_base_t        qat_qp_build_ring_base;
 147         qat_qp_adf_arb_enable_t         qat_qp_adf_arb_enable;
 148         qat_qp_adf_arb_disable_t        qat_qp_adf_arb_disable;
 149         qat_qp_adf_configure_queues_t   qat_qp_adf_configure_queues;
 150         qat_qp_csr_write_tail_t         qat_qp_csr_write_tail;
 151         qat_qp_csr_write_head_t         qat_qp_csr_write_head;
 152         qat_qp_csr_setup_t              qat_qp_csr_setup;
 153         qat_qp_get_hw_data_t            qat_qp_get_hw_data;
 154 };
 155
 156 extern struct qat_qp_hw_spec_funcs *qat_qp_hw_spec[];
 157
 158 #endif /* _QAT_QP_H_ */