1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019 Xilinx, Inc. All rights reserved.
13 static __checkReturn efx_rc_t
14 efx_mae_get_capabilities(
18 EFX_MCDI_DECLARE_BUF(payload,
19 MC_CMD_MAE_GET_CAPS_IN_LEN,
20 MC_CMD_MAE_GET_CAPS_OUT_LEN);
21 struct efx_mae_s *maep = enp->en_maep;
24 req.emr_cmd = MC_CMD_MAE_GET_CAPS;
25 req.emr_in_buf = payload;
26 req.emr_in_length = MC_CMD_MAE_GET_CAPS_IN_LEN;
27 req.emr_out_buf = payload;
28 req.emr_out_length = MC_CMD_MAE_GET_CAPS_OUT_LEN;
30 efx_mcdi_execute(enp, &req);
32 if (req.emr_rc != 0) {
37 if (req.emr_out_length_used < MC_CMD_MAE_GET_CAPS_OUT_LEN) {
42 maep->em_max_n_action_prios =
43 MCDI_OUT_DWORD(req, MAE_GET_CAPS_OUT_ACTION_PRIOS);
45 maep->em_max_nfields =
46 MCDI_OUT_DWORD(req, MAE_GET_CAPS_OUT_MATCH_FIELD_COUNT);
53 EFSYS_PROBE1(fail1, efx_rc_t, rc);
57 static __checkReturn efx_rc_t
58 efx_mae_get_action_rule_caps(
60 __in unsigned int field_ncaps,
61 __out_ecount(field_ncaps) efx_mae_field_cap_t *field_caps)
64 EFX_MCDI_DECLARE_BUF(payload,
65 MC_CMD_MAE_GET_AR_CAPS_IN_LEN,
66 MC_CMD_MAE_GET_AR_CAPS_OUT_LENMAX_MCDI2);
67 unsigned int mcdi_field_ncaps;
71 if (MC_CMD_MAE_GET_AR_CAPS_OUT_LEN(field_ncaps) >
72 MC_CMD_MAE_GET_AR_CAPS_OUT_LENMAX_MCDI2) {
77 req.emr_cmd = MC_CMD_MAE_GET_AR_CAPS;
78 req.emr_in_buf = payload;
79 req.emr_in_length = MC_CMD_MAE_GET_AR_CAPS_IN_LEN;
80 req.emr_out_buf = payload;
81 req.emr_out_length = MC_CMD_MAE_GET_AR_CAPS_OUT_LEN(field_ncaps);
83 efx_mcdi_execute(enp, &req);
85 if (req.emr_rc != 0) {
90 mcdi_field_ncaps = MCDI_OUT_DWORD(req, MAE_GET_OR_CAPS_OUT_COUNT);
92 if (req.emr_out_length_used <
93 MC_CMD_MAE_GET_AR_CAPS_OUT_LEN(mcdi_field_ncaps)) {
98 if (mcdi_field_ncaps > field_ncaps) {
103 for (i = 0; i < mcdi_field_ncaps; ++i) {
107 field_caps[i].emfc_support = MCDI_OUT_INDEXED_DWORD_FIELD(req,
108 MAE_GET_AR_CAPS_OUT_FIELD_FLAGS, i,
109 MAE_FIELD_FLAGS_SUPPORT_STATUS);
111 match_flag = MCDI_OUT_INDEXED_DWORD_FIELD(req,
112 MAE_GET_AR_CAPS_OUT_FIELD_FLAGS, i,
113 MAE_FIELD_FLAGS_MATCH_AFFECTS_CLASS);
115 field_caps[i].emfc_match_affects_class =
116 (match_flag != 0) ? B_TRUE : B_FALSE;
118 mask_flag = MCDI_OUT_INDEXED_DWORD_FIELD(req,
119 MAE_GET_AR_CAPS_OUT_FIELD_FLAGS, i,
120 MAE_FIELD_FLAGS_MASK_AFFECTS_CLASS);
122 field_caps[i].emfc_mask_affects_class =
123 (mask_flag != 0) ? B_TRUE : B_FALSE;
135 EFSYS_PROBE1(fail1, efx_rc_t, rc);
139 __checkReturn efx_rc_t
143 const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
144 efx_mae_field_cap_t *ar_fcaps;
145 size_t ar_fcaps_size;
149 if (encp->enc_mae_supported == B_FALSE) {
154 EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (*maep), maep);
162 rc = efx_mae_get_capabilities(enp);
166 ar_fcaps_size = maep->em_max_nfields * sizeof (*ar_fcaps);
167 EFSYS_KMEM_ALLOC(enp->en_esip, ar_fcaps_size, ar_fcaps);
168 if (ar_fcaps == NULL) {
173 maep->em_action_rule_field_caps_size = ar_fcaps_size;
174 maep->em_action_rule_field_caps = ar_fcaps;
176 rc = efx_mae_get_action_rule_caps(enp, maep->em_max_nfields, ar_fcaps);
184 EFSYS_KMEM_FREE(enp->en_esip, ar_fcaps_size, ar_fcaps);
189 EFSYS_KMEM_FREE(enp->en_esip, sizeof (struct efx_mae_s), enp->en_maep);
194 EFSYS_PROBE1(fail1, efx_rc_t, rc);
202 const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
203 efx_mae_t *maep = enp->en_maep;
205 if (encp->enc_mae_supported == B_FALSE)
208 EFSYS_KMEM_FREE(enp->en_esip, maep->em_action_rule_field_caps_size,
209 maep->em_action_rule_field_caps);
210 EFSYS_KMEM_FREE(enp->en_esip, sizeof (*maep), maep);
214 __checkReturn efx_rc_t
217 __out efx_mae_limits_t *emlp)
219 const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
220 struct efx_mae_s *maep = enp->en_maep;
223 if (encp->enc_mae_supported == B_FALSE) {
228 emlp->eml_max_n_action_prios = maep->em_max_n_action_prios;
233 EFSYS_PROBE1(fail1, efx_rc_t, rc);
237 __checkReturn efx_rc_t
238 efx_mae_match_spec_init(
240 __in efx_mae_rule_type_t type,
242 __out efx_mae_match_spec_t **specp)
244 efx_mae_match_spec_t *spec;
248 case EFX_MAE_RULE_ACTION:
255 EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (*spec), spec);
261 spec->emms_type = type;
262 spec->emms_prio = prio;
271 EFSYS_PROBE1(fail1, efx_rc_t, rc);
276 efx_mae_match_spec_fini(
278 __in efx_mae_match_spec_t *spec)
280 EFSYS_KMEM_FREE(enp->en_esip, sizeof (*spec), spec);
283 /* Named identifiers which are valid indices to efx_mae_field_cap_t */
284 typedef enum efx_mae_field_cap_id_e {
285 EFX_MAE_FIELD_CAP_NIDS
286 } efx_mae_field_cap_id_t;
288 typedef enum efx_mae_field_endianness_e {
289 EFX_MAE_FIELD_LE = 0,
292 EFX_MAE_FIELD_ENDIANNESS_NTYPES
293 } efx_mae_field_endianness_t;
296 * The following structure is a means to describe an MAE field.
297 * The information in it is meant to be used internally by
298 * APIs for addressing a given field in a mask-value pairs
299 * structure and for validation purposes.
301 typedef struct efx_mae_mv_desc_s {
302 efx_mae_field_cap_id_t emmd_field_cap_id;
304 size_t emmd_value_size;
305 size_t emmd_value_offset;
306 size_t emmd_mask_size;
307 size_t emmd_mask_offset;
309 efx_mae_field_endianness_t emmd_endianness;
312 /* Indices to this array are provided by efx_mae_field_id_t */
313 static const efx_mae_mv_desc_t __efx_mae_action_rule_mv_desc_set[] = {
316 #define EFX_MASK_BIT_IS_SET(_mask, _mask_page_nbits, _bit) \
317 ((_mask)[(_bit) / (_mask_page_nbits)] & \
318 (1ULL << ((_bit) & ((_mask_page_nbits) - 1))))
320 static inline boolean_t
322 __in size_t mask_nbytes,
323 __in_bcount(mask_nbytes) const uint8_t *maskp)
325 boolean_t prev_bit_is_set = B_TRUE;
328 for (i = 0; i < 8 * mask_nbytes; ++i) {
329 boolean_t bit_is_set = EFX_MASK_BIT_IS_SET(maskp, 8, i);
331 if (!prev_bit_is_set && bit_is_set)
334 prev_bit_is_set = bit_is_set;
340 static inline boolean_t
341 efx_mask_is_all_ones(
342 __in size_t mask_nbytes,
343 __in_bcount(mask_nbytes) const uint8_t *maskp)
348 for (i = 0; i < mask_nbytes; ++i)
351 return (t == (uint8_t)(~0));
354 static inline boolean_t
355 efx_mask_is_all_zeros(
356 __in size_t mask_nbytes,
357 __in_bcount(mask_nbytes) const uint8_t *maskp)
362 for (i = 0; i < mask_nbytes; ++i)
368 __checkReturn boolean_t
369 efx_mae_match_spec_is_valid(
371 __in const efx_mae_match_spec_t *spec)
373 efx_mae_t *maep = enp->en_maep;
374 unsigned int field_ncaps = maep->em_max_nfields;
375 const efx_mae_field_cap_t *field_caps;
376 const efx_mae_mv_desc_t *desc_setp;
377 unsigned int desc_set_nentries;
378 boolean_t is_valid = B_TRUE;
379 efx_mae_field_id_t field_id;
382 switch (spec->emms_type) {
383 case EFX_MAE_RULE_ACTION:
384 field_caps = maep->em_action_rule_field_caps;
385 desc_setp = __efx_mae_action_rule_mv_desc_set;
387 EFX_ARRAY_SIZE(__efx_mae_action_rule_mv_desc_set);
388 mvp = spec->emms_mask_value_pairs.action;
394 if (field_caps == NULL)
397 for (field_id = 0; field_id < desc_set_nentries; ++field_id) {
398 const efx_mae_mv_desc_t *descp = &desc_setp[field_id];
399 efx_mae_field_cap_id_t field_cap_id = descp->emmd_field_cap_id;
400 const uint8_t *m_buf = mvp + descp->emmd_mask_offset;
401 size_t m_size = descp->emmd_mask_size;
404 continue; /* Skip array gap */
406 if (field_cap_id >= field_ncaps)
409 switch (field_caps[field_cap_id].emfc_support) {
410 case MAE_FIELD_SUPPORTED_MATCH_MASK:
413 case MAE_FIELD_SUPPORTED_MATCH_PREFIX:
414 is_valid = efx_mask_is_prefix(m_size, m_buf);
416 case MAE_FIELD_SUPPORTED_MATCH_OPTIONAL:
417 is_valid = (efx_mask_is_all_ones(m_size, m_buf) ||
418 efx_mask_is_all_zeros(m_size, m_buf));
420 case MAE_FIELD_SUPPORTED_MATCH_ALWAYS:
421 is_valid = efx_mask_is_all_ones(m_size, m_buf);
423 case MAE_FIELD_SUPPORTED_MATCH_NEVER:
424 case MAE_FIELD_UNSUPPORTED:
426 is_valid = efx_mask_is_all_zeros(m_size, m_buf);
430 if (is_valid == B_FALSE)
437 #endif /* EFSYS_OPT_MAE */