1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019-2020 Xilinx, Inc.
4 * Copyright(c) 2008-2019 Solarflare Communications Inc.
13 * There are three versions of the MCDI interface:
14 * - MCDIv0: Siena BootROM. Transport uses MCDIv1 headers.
15 * - MCDIv1: Siena firmware and Huntington BootROM.
16 * - MCDIv2: EF10 firmware (Huntington/Medford) and Medford BootROM.
17 * Transport uses MCDIv2 headers.
19 * MCDIv2 Header NOT_EPOCH flag
20 * ----------------------------
21 * A new epoch begins at initial startup or after an MC reboot, and defines when
22 * the MC should reject stale MCDI requests.
24 * The first MCDI request sent by the host should contain NOT_EPOCH=0, and all
25 * subsequent requests (until the next MC reboot) should contain NOT_EPOCH=1.
27 * After rebooting the MC will fail all requests with NOT_EPOCH=1 by writing a
28 * response with ERROR=1 and DATALEN=0 until a request is seen with NOT_EPOCH=0.
35 static const efx_mcdi_ops_t __efx_mcdi_siena_ops = {
36 siena_mcdi_init, /* emco_init */
37 siena_mcdi_send_request, /* emco_send_request */
38 siena_mcdi_poll_reboot, /* emco_poll_reboot */
39 siena_mcdi_poll_response, /* emco_poll_response */
40 siena_mcdi_read_response, /* emco_read_response */
41 siena_mcdi_fini, /* emco_fini */
42 siena_mcdi_feature_supported, /* emco_feature_supported */
43 siena_mcdi_get_timeout, /* emco_get_timeout */
46 #endif /* EFSYS_OPT_SIENA */
50 static const efx_mcdi_ops_t __efx_mcdi_ef10_ops = {
51 ef10_mcdi_init, /* emco_init */
52 ef10_mcdi_send_request, /* emco_send_request */
53 ef10_mcdi_poll_reboot, /* emco_poll_reboot */
54 ef10_mcdi_poll_response, /* emco_poll_response */
55 ef10_mcdi_read_response, /* emco_read_response */
56 ef10_mcdi_fini, /* emco_fini */
57 ef10_mcdi_feature_supported, /* emco_feature_supported */
58 ef10_mcdi_get_timeout, /* emco_get_timeout */
61 #endif /* EFX_OPTS_EF10() */
63 #if EFSYS_OPT_RIVERHEAD
65 static const efx_mcdi_ops_t __efx_mcdi_rhead_ops = {
66 ef10_mcdi_init, /* emco_init */
67 ef10_mcdi_send_request, /* emco_send_request */
68 ef10_mcdi_poll_reboot, /* emco_poll_reboot */
69 ef10_mcdi_poll_response, /* emco_poll_response */
70 ef10_mcdi_read_response, /* emco_read_response */
71 ef10_mcdi_fini, /* emco_fini */
72 ef10_mcdi_feature_supported, /* emco_feature_supported */
73 ef10_mcdi_get_timeout, /* emco_get_timeout */
76 #endif /* EFSYS_OPT_RIVERHEAD */
80 __checkReturn efx_rc_t
83 __in const efx_mcdi_transport_t *emtp)
85 const efx_mcdi_ops_t *emcop;
88 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
89 EFSYS_ASSERT3U(enp->en_mod_flags, ==, 0);
91 switch (enp->en_family) {
93 case EFX_FAMILY_SIENA:
94 emcop = &__efx_mcdi_siena_ops;
96 #endif /* EFSYS_OPT_SIENA */
98 #if EFSYS_OPT_HUNTINGTON
99 case EFX_FAMILY_HUNTINGTON:
100 emcop = &__efx_mcdi_ef10_ops;
102 #endif /* EFSYS_OPT_HUNTINGTON */
104 #if EFSYS_OPT_MEDFORD
105 case EFX_FAMILY_MEDFORD:
106 emcop = &__efx_mcdi_ef10_ops;
108 #endif /* EFSYS_OPT_MEDFORD */
110 #if EFSYS_OPT_MEDFORD2
111 case EFX_FAMILY_MEDFORD2:
112 emcop = &__efx_mcdi_ef10_ops;
114 #endif /* EFSYS_OPT_MEDFORD2 */
116 #if EFSYS_OPT_RIVERHEAD
117 case EFX_FAMILY_RIVERHEAD:
118 emcop = &__efx_mcdi_rhead_ops;
120 #endif /* EFSYS_OPT_RIVERHEAD */
128 if (enp->en_features & EFX_FEATURE_MCDI_DMA) {
129 /* MCDI requires a DMA buffer in host memory */
130 if ((emtp == NULL) || (emtp->emt_dma_mem) == NULL) {
135 enp->en_mcdi.em_emtp = emtp;
137 if (emcop != NULL && emcop->emco_init != NULL) {
138 if ((rc = emcop->emco_init(enp, emtp)) != 0)
142 enp->en_mcdi.em_emcop = emcop;
143 enp->en_mod_flags |= EFX_MOD_MCDI;
152 EFSYS_PROBE1(fail1, efx_rc_t, rc);
154 enp->en_mcdi.em_emcop = NULL;
155 enp->en_mcdi.em_emtp = NULL;
156 enp->en_mod_flags &= ~EFX_MOD_MCDI;
165 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
166 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
168 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
169 EFSYS_ASSERT3U(enp->en_mod_flags, ==, EFX_MOD_MCDI);
171 if (emcop != NULL && emcop->emco_fini != NULL)
172 emcop->emco_fini(enp);
175 emip->emi_aborted = 0;
177 enp->en_mcdi.em_emcop = NULL;
178 enp->en_mod_flags &= ~EFX_MOD_MCDI;
185 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
186 efsys_lock_state_t state;
188 /* Start a new epoch (allow fresh MCDI requests to succeed) */
189 EFSYS_LOCK(enp->en_eslp, state);
190 emip->emi_new_epoch = B_TRUE;
191 EFSYS_UNLOCK(enp->en_eslp, state);
195 efx_mcdi_send_request(
202 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
204 emcop->emco_send_request(enp, hdrp, hdr_len, sdup, sdu_len);
208 efx_mcdi_poll_reboot(
211 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
214 rc = emcop->emco_poll_reboot(enp);
219 efx_mcdi_poll_response(
222 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
225 available = emcop->emco_poll_response(enp);
230 efx_mcdi_read_response(
236 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
238 emcop->emco_read_response(enp, bufferp, offset, length);
242 efx_mcdi_request_start(
244 __in efx_mcdi_req_t *emrp,
245 __in boolean_t ev_cpl)
247 #if EFSYS_OPT_MCDI_LOGGING
248 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
250 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
253 unsigned int max_version;
257 efsys_lock_state_t state;
259 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
260 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
261 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
264 * efx_mcdi_request_start() is naturally serialised against both
265 * efx_mcdi_request_poll() and efx_mcdi_ev_cpl()/efx_mcdi_ev_death(),
266 * by virtue of there only being one outstanding MCDI request.
267 * Unfortunately, upper layers may also call efx_mcdi_request_abort()
268 * at any time, to timeout a pending mcdi request, That request may
269 * then subsequently complete, meaning efx_mcdi_ev_cpl() or
270 * efx_mcdi_ev_death() may end up running in parallel with
271 * efx_mcdi_request_start(). This race is handled by ensuring that
272 * %emi_pending_req, %emi_ev_cpl and %emi_seq are protected by the
275 EFSYS_LOCK(enp->en_eslp, state);
276 EFSYS_ASSERT(emip->emi_pending_req == NULL);
277 emip->emi_pending_req = emrp;
278 emip->emi_ev_cpl = ev_cpl;
279 emip->emi_poll_cnt = 0;
280 seq = emip->emi_seq++ & EFX_MASK32(MCDI_HEADER_SEQ);
281 new_epoch = emip->emi_new_epoch;
282 max_version = emip->emi_max_version;
283 EFSYS_UNLOCK(enp->en_eslp, state);
287 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
290 * Huntington firmware supports MCDIv2, but the Huntington BootROM only
291 * supports MCDIv1. Use MCDIv1 headers for MCDIv1 commands where
292 * possible to support this.
294 if ((max_version >= 2) &&
295 ((emrp->emr_cmd > MC_CMD_CMD_SPACE_ESCAPE_7) ||
296 (emrp->emr_in_length > MCDI_CTL_SDU_LEN_MAX_V1) ||
297 (emrp->emr_out_length > MCDI_CTL_SDU_LEN_MAX_V1))) {
298 /* Construct MCDI v2 header */
299 hdr_len = sizeof (hdr);
300 EFX_POPULATE_DWORD_8(hdr[0],
301 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
302 MCDI_HEADER_RESYNC, 1,
303 MCDI_HEADER_DATALEN, 0,
304 MCDI_HEADER_SEQ, seq,
305 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
306 MCDI_HEADER_ERROR, 0,
307 MCDI_HEADER_RESPONSE, 0,
308 MCDI_HEADER_XFLAGS, xflags);
310 EFX_POPULATE_DWORD_2(hdr[1],
311 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, emrp->emr_cmd,
312 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, emrp->emr_in_length);
314 /* Construct MCDI v1 header */
315 hdr_len = sizeof (hdr[0]);
316 EFX_POPULATE_DWORD_8(hdr[0],
317 MCDI_HEADER_CODE, emrp->emr_cmd,
318 MCDI_HEADER_RESYNC, 1,
319 MCDI_HEADER_DATALEN, emrp->emr_in_length,
320 MCDI_HEADER_SEQ, seq,
321 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
322 MCDI_HEADER_ERROR, 0,
323 MCDI_HEADER_RESPONSE, 0,
324 MCDI_HEADER_XFLAGS, xflags);
327 #if EFSYS_OPT_MCDI_LOGGING
328 if (emtp->emt_logger != NULL) {
329 emtp->emt_logger(emtp->emt_context, EFX_LOG_MCDI_REQUEST,
331 emrp->emr_in_buf, emrp->emr_in_length);
333 #endif /* EFSYS_OPT_MCDI_LOGGING */
335 efx_mcdi_send_request(enp, &hdr[0], hdr_len,
336 emrp->emr_in_buf, emrp->emr_in_length);
341 efx_mcdi_read_response_header(
343 __inout efx_mcdi_req_t *emrp)
345 #if EFSYS_OPT_MCDI_LOGGING
346 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
347 #endif /* EFSYS_OPT_MCDI_LOGGING */
348 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
350 unsigned int hdr_len;
351 unsigned int data_len;
357 EFSYS_ASSERT(emrp != NULL);
359 efx_mcdi_read_response(enp, &hdr[0], 0, sizeof (hdr[0]));
360 hdr_len = sizeof (hdr[0]);
362 cmd = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE);
363 seq = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_SEQ);
364 error = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_ERROR);
366 if (cmd != MC_CMD_V2_EXTN) {
367 data_len = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_DATALEN);
369 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
370 hdr_len += sizeof (hdr[1]);
372 cmd = EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_EXTENDED_CMD);
374 EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
377 if (error && (data_len == 0)) {
378 /* The MC has rebooted since the request was sent. */
379 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
380 efx_mcdi_poll_reboot(enp);
384 #if EFSYS_OPT_MCDI_PROXY_AUTH_SERVER
385 if (((cmd != emrp->emr_cmd) && (emrp->emr_cmd != MC_CMD_PROXY_CMD)) ||
387 if ((cmd != emrp->emr_cmd) ||
389 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
390 /* Response is for a different request */
396 unsigned int err_len = MIN(data_len, sizeof (err));
397 int err_code = MC_CMD_ERR_EPROTO;
400 /* Read error code (and arg num for MCDI v2 commands) */
401 efx_mcdi_read_response(enp, &err, hdr_len, err_len);
403 if (err_len >= (MC_CMD_ERR_CODE_OFST + sizeof (efx_dword_t)))
404 err_code = EFX_DWORD_FIELD(err[0], EFX_DWORD_0);
406 if (err_len >= (MC_CMD_ERR_ARG_OFST + sizeof (efx_dword_t)))
407 err_arg = EFX_DWORD_FIELD(err[1], EFX_DWORD_0);
409 emrp->emr_err_code = err_code;
410 emrp->emr_err_arg = err_arg;
412 #if EFSYS_OPT_MCDI_PROXY_AUTH
413 if ((err_code == MC_CMD_ERR_PROXY_PENDING) &&
414 (err_len == sizeof (err))) {
416 * The MCDI request would normally fail with EPERM, but
417 * firmware has forwarded it to an authorization agent
418 * attached to a privileged PF.
420 * Save the authorization request handle. The client
421 * must wait for a PROXY_RESPONSE event, or timeout.
423 emrp->emr_proxy_handle = err_arg;
425 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
427 #if EFSYS_OPT_MCDI_LOGGING
428 if (emtp->emt_logger != NULL) {
429 emtp->emt_logger(emtp->emt_context,
430 EFX_LOG_MCDI_RESPONSE,
434 #endif /* EFSYS_OPT_MCDI_LOGGING */
436 if (!emrp->emr_quiet) {
437 EFSYS_PROBE3(mcdi_err_arg, int, emrp->emr_cmd,
438 int, err_code, int, err_arg);
441 rc = efx_mcdi_request_errcode(err_code);
446 emrp->emr_out_length_used = data_len;
447 #if EFSYS_OPT_MCDI_PROXY_AUTH
448 emrp->emr_proxy_handle = 0;
449 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
456 emrp->emr_out_length_used = 0;
460 efx_mcdi_finish_response(
462 __in efx_mcdi_req_t *emrp)
464 #if EFSYS_OPT_MCDI_LOGGING
465 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
466 #endif /* EFSYS_OPT_MCDI_LOGGING */
468 unsigned int hdr_len;
470 unsigned int resp_off;
471 #if EFSYS_OPT_MCDI_PROXY_AUTH_SERVER
472 unsigned int resp_cmd;
473 boolean_t proxied_cmd_resp = B_FALSE;
474 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH_SERVER */
476 if (emrp->emr_out_buf == NULL)
479 /* Read the command header to detect MCDI response format */
480 hdr_len = sizeof (hdr[0]);
481 efx_mcdi_read_response(enp, &hdr[0], 0, hdr_len);
482 if (EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE) == MC_CMD_V2_EXTN) {
484 * Read the actual payload length. The length given in the event
485 * is only correct for responses with the V1 format.
487 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
488 hdr_len += sizeof (hdr[1]);
491 emrp->emr_out_length_used = EFX_DWORD_FIELD(hdr[1],
492 MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
493 #if EFSYS_OPT_MCDI_PROXY_AUTH_SERVER
495 * A proxy MCDI command is executed by PF on behalf of
496 * one of its VFs. The command to be proxied follows
497 * immediately afterward in the host buffer.
498 * PROXY_CMD inner call complete response should be copied to
499 * output buffer so that it can be returned to the requesting
500 * function in MC_CMD_PROXY_COMPLETE payload.
503 EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_EXTENDED_CMD);
504 proxied_cmd_resp = ((emrp->emr_cmd == MC_CMD_PROXY_CMD) &&
505 (resp_cmd != MC_CMD_PROXY_CMD));
506 if (proxied_cmd_resp) {
508 emrp->emr_out_length_used += hdr_len;
510 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH_SERVER */
515 /* Copy payload out into caller supplied buffer */
516 bytes = MIN(emrp->emr_out_length_used, emrp->emr_out_length);
517 efx_mcdi_read_response(enp, emrp->emr_out_buf, resp_off, bytes);
519 #if EFSYS_OPT_MCDI_LOGGING
520 if (emtp->emt_logger != NULL) {
521 emtp->emt_logger(emtp->emt_context,
522 EFX_LOG_MCDI_RESPONSE,
524 emrp->emr_out_buf, bytes);
526 #endif /* EFSYS_OPT_MCDI_LOGGING */
530 __checkReturn boolean_t
531 efx_mcdi_request_poll(
534 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
535 efx_mcdi_req_t *emrp;
536 efsys_lock_state_t state;
539 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
540 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
541 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
543 /* Serialise against post-watchdog efx_mcdi_ev* */
544 EFSYS_LOCK(enp->en_eslp, state);
546 EFSYS_ASSERT(emip->emi_pending_req != NULL);
547 EFSYS_ASSERT(!emip->emi_ev_cpl);
548 emrp = emip->emi_pending_req;
550 /* Check if hardware is unavailable */
551 if (efx_nic_hw_unavailable(enp)) {
552 EFSYS_UNLOCK(enp->en_eslp, state);
556 /* Check for reboot atomically w.r.t efx_mcdi_request_start */
557 if (emip->emi_poll_cnt++ == 0) {
558 if ((rc = efx_mcdi_poll_reboot(enp)) != 0) {
559 emip->emi_pending_req = NULL;
560 EFSYS_UNLOCK(enp->en_eslp, state);
562 /* Reboot/Assertion */
563 if (rc == EIO || rc == EINTR)
564 efx_mcdi_raise_exception(enp, emrp, rc);
570 /* Check if a response is available */
571 if (efx_mcdi_poll_response(enp) == B_FALSE) {
572 EFSYS_UNLOCK(enp->en_eslp, state);
576 /* Read the response header */
577 efx_mcdi_read_response_header(enp, emrp);
579 /* Request complete */
580 emip->emi_pending_req = NULL;
582 /* Ensure stale MCDI requests fail after an MC reboot. */
583 emip->emi_new_epoch = B_FALSE;
585 EFSYS_UNLOCK(enp->en_eslp, state);
587 if ((rc = emrp->emr_rc) != 0)
590 efx_mcdi_finish_response(enp, emrp);
594 if (!emrp->emr_quiet)
597 if (!emrp->emr_quiet)
598 EFSYS_PROBE1(fail1, efx_rc_t, rc);
603 __checkReturn boolean_t
604 efx_mcdi_request_abort(
607 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
608 efx_mcdi_req_t *emrp;
610 efsys_lock_state_t state;
612 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
613 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
614 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
617 * efx_mcdi_ev_* may have already completed this event, and be
618 * spinning/blocked on the upper layer lock. So it *is* legitimate
619 * to for emi_pending_req to be NULL. If there is a pending event
620 * completed request, then provide a "credit" to allow
621 * efx_mcdi_ev_cpl() to accept a single spurious completion.
623 EFSYS_LOCK(enp->en_eslp, state);
624 emrp = emip->emi_pending_req;
625 aborted = (emrp != NULL);
627 emip->emi_pending_req = NULL;
629 /* Error the request */
630 emrp->emr_out_length_used = 0;
631 emrp->emr_rc = ETIMEDOUT;
633 /* Provide a credit for seqno/emr_pending_req mismatches */
634 if (emip->emi_ev_cpl)
638 * The upper layer has called us, so we don't
639 * need to complete the request.
642 EFSYS_UNLOCK(enp->en_eslp, state);
648 efx_mcdi_get_timeout(
650 __in efx_mcdi_req_t *emrp,
651 __out uint32_t *timeoutp)
653 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
655 emcop->emco_get_timeout(enp, emrp, timeoutp);
658 __checkReturn efx_rc_t
659 efx_mcdi_request_errcode(
660 __in unsigned int err)
665 case MC_CMD_ERR_EPERM:
667 case MC_CMD_ERR_ENOENT:
669 case MC_CMD_ERR_EINTR:
671 case MC_CMD_ERR_EACCES:
673 case MC_CMD_ERR_EBUSY:
675 case MC_CMD_ERR_EINVAL:
677 case MC_CMD_ERR_EDEADLK:
679 case MC_CMD_ERR_ENOSYS:
681 case MC_CMD_ERR_ETIME:
683 case MC_CMD_ERR_ENOTSUP:
685 case MC_CMD_ERR_EALREADY:
689 case MC_CMD_ERR_EEXIST:
691 #ifdef MC_CMD_ERR_EAGAIN
692 case MC_CMD_ERR_EAGAIN:
695 #ifdef MC_CMD_ERR_ENOSPC
696 case MC_CMD_ERR_ENOSPC:
699 case MC_CMD_ERR_ERANGE:
702 case MC_CMD_ERR_ALLOC_FAIL:
704 case MC_CMD_ERR_NO_VADAPTOR:
706 case MC_CMD_ERR_NO_EVB_PORT:
708 case MC_CMD_ERR_NO_VSWITCH:
710 case MC_CMD_ERR_VLAN_LIMIT:
712 case MC_CMD_ERR_BAD_PCI_FUNC:
714 case MC_CMD_ERR_BAD_VLAN_MODE:
716 case MC_CMD_ERR_BAD_VSWITCH_TYPE:
718 case MC_CMD_ERR_BAD_VPORT_TYPE:
720 case MC_CMD_ERR_MAC_EXIST:
723 case MC_CMD_ERR_PROXY_PENDING:
727 EFSYS_PROBE1(mc_pcol_error, int, err);
733 efx_mcdi_raise_exception(
735 __in_opt efx_mcdi_req_t *emrp,
738 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
739 efx_mcdi_exception_t exception;
741 /* Reboot or Assertion failure only */
742 EFSYS_ASSERT(rc == EIO || rc == EINTR);
745 * If MC_CMD_REBOOT causes a reboot (dependent on parameters),
746 * then the EIO is not worthy of an exception.
748 if (emrp != NULL && emrp->emr_cmd == MC_CMD_REBOOT && rc == EIO)
751 exception = (rc == EIO)
752 ? EFX_MCDI_EXCEPTION_MC_REBOOT
753 : EFX_MCDI_EXCEPTION_MC_BADASSERT;
755 emtp->emt_exception(emtp->emt_context, exception);
761 __inout efx_mcdi_req_t *emrp)
763 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
765 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
766 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
768 emrp->emr_quiet = B_FALSE;
769 emtp->emt_execute(emtp->emt_context, emrp);
773 efx_mcdi_execute_quiet(
775 __inout efx_mcdi_req_t *emrp)
777 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
779 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
780 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
782 emrp->emr_quiet = B_TRUE;
783 emtp->emt_execute(emtp->emt_context, emrp);
789 __in unsigned int seq,
790 __in unsigned int outlen,
793 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
794 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
795 efx_mcdi_req_t *emrp;
796 efsys_lock_state_t state;
798 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
799 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
802 * Serialise against efx_mcdi_request_poll()/efx_mcdi_request_start()
803 * when we're completing an aborted request.
805 EFSYS_LOCK(enp->en_eslp, state);
806 if (emip->emi_pending_req == NULL || !emip->emi_ev_cpl ||
807 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
808 EFSYS_ASSERT(emip->emi_aborted > 0);
809 if (emip->emi_aborted > 0)
811 EFSYS_UNLOCK(enp->en_eslp, state);
815 emrp = emip->emi_pending_req;
816 emip->emi_pending_req = NULL;
817 EFSYS_UNLOCK(enp->en_eslp, state);
819 if (emip->emi_max_version >= 2) {
820 /* MCDIv2 response details do not fit into an event. */
821 efx_mcdi_read_response_header(enp, emrp);
824 if (!emrp->emr_quiet) {
825 EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd,
828 emrp->emr_out_length_used = 0;
829 emrp->emr_rc = efx_mcdi_request_errcode(errcode);
831 emrp->emr_out_length_used = outlen;
835 if (emrp->emr_rc == 0)
836 efx_mcdi_finish_response(enp, emrp);
838 emtp->emt_ev_cpl(emtp->emt_context);
841 #if EFSYS_OPT_MCDI_PROXY_AUTH
843 __checkReturn efx_rc_t
844 efx_mcdi_get_proxy_handle(
846 __in efx_mcdi_req_t *emrp,
847 __out uint32_t *handlep)
851 _NOTE(ARGUNUSED(enp))
854 * Return proxy handle from MCDI request that returned with error
855 * MC_MCD_ERR_PROXY_PENDING. This handle is used to wait for a matching
856 * PROXY_RESPONSE event.
858 if ((emrp == NULL) || (handlep == NULL)) {
862 if ((emrp->emr_rc != 0) &&
863 (emrp->emr_err_code == MC_CMD_ERR_PROXY_PENDING)) {
864 *handlep = emrp->emr_proxy_handle;
873 EFSYS_PROBE1(fail1, efx_rc_t, rc);
878 efx_mcdi_ev_proxy_response(
880 __in unsigned int handle,
881 __in unsigned int status)
883 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
887 * Handle results of an authorization request for a privileged MCDI
888 * command. If authorization was granted then we must re-issue the
889 * original MCDI request. If authorization failed or timed out,
890 * then the original MCDI request should be completed with the
891 * result code from this event.
893 rc = (status == 0) ? 0 : efx_mcdi_request_errcode(status);
895 emtp->emt_ev_proxy_response(emtp->emt_context, handle, rc);
897 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
899 #if EFSYS_OPT_MCDI_PROXY_AUTH_SERVER
901 efx_mcdi_ev_proxy_request(
903 __in unsigned int index)
905 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
907 if (emtp->emt_ev_proxy_request != NULL)
908 emtp->emt_ev_proxy_request(emtp->emt_context, index);
910 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH_SERVER */
916 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
917 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
918 efx_mcdi_req_t *emrp = NULL;
920 efsys_lock_state_t state;
923 * The MCDI request (if there is one) has been terminated, either
924 * by a BADASSERT or REBOOT event.
926 * If there is an outstanding event-completed MCDI operation, then we
927 * will never receive the completion event (because both MCDI
928 * completions and BADASSERT events are sent to the same evq). So
929 * complete this MCDI op.
931 * This function might run in parallel with efx_mcdi_request_poll()
932 * for poll completed mcdi requests, and also with
933 * efx_mcdi_request_start() for post-watchdog completions.
935 EFSYS_LOCK(enp->en_eslp, state);
936 emrp = emip->emi_pending_req;
937 ev_cpl = emip->emi_ev_cpl;
938 if (emrp != NULL && emip->emi_ev_cpl) {
939 emip->emi_pending_req = NULL;
941 emrp->emr_out_length_used = 0;
947 * Since we're running in parallel with a request, consume the
948 * status word before dropping the lock.
950 if (rc == EIO || rc == EINTR) {
951 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
952 (void) efx_mcdi_poll_reboot(enp);
953 emip->emi_new_epoch = B_TRUE;
956 EFSYS_UNLOCK(enp->en_eslp, state);
958 efx_mcdi_raise_exception(enp, emrp, rc);
960 if (emrp != NULL && ev_cpl)
961 emtp->emt_ev_cpl(emtp->emt_context);
964 __checkReturn efx_rc_t
967 __out_ecount_opt(4) uint16_t versionp[4],
968 __out_opt uint32_t *buildp,
969 __out_opt efx_mcdi_boot_t *statusp)
972 EFX_MCDI_DECLARE_BUF(payload,
973 MAX(MC_CMD_GET_VERSION_IN_LEN, MC_CMD_GET_BOOT_STATUS_IN_LEN),
974 MAX(MC_CMD_GET_VERSION_OUT_LEN,
975 MC_CMD_GET_BOOT_STATUS_OUT_LEN));
976 efx_word_t *ver_words;
979 efx_mcdi_boot_t status;
982 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
984 req.emr_cmd = MC_CMD_GET_VERSION;
985 req.emr_in_buf = payload;
986 req.emr_in_length = MC_CMD_GET_VERSION_IN_LEN;
987 req.emr_out_buf = payload;
988 req.emr_out_length = MC_CMD_GET_VERSION_OUT_LEN;
990 efx_mcdi_execute(enp, &req);
992 if (req.emr_rc != 0) {
997 /* bootrom support */
998 if (req.emr_out_length_used == MC_CMD_GET_VERSION_V0_OUT_LEN) {
999 version[0] = version[1] = version[2] = version[3] = 0;
1000 build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
1005 if (req.emr_out_length_used < MC_CMD_GET_VERSION_OUT_LEN) {
1010 ver_words = MCDI_OUT2(req, efx_word_t, GET_VERSION_OUT_VERSION);
1011 version[0] = EFX_WORD_FIELD(ver_words[0], EFX_WORD_0);
1012 version[1] = EFX_WORD_FIELD(ver_words[1], EFX_WORD_0);
1013 version[2] = EFX_WORD_FIELD(ver_words[2], EFX_WORD_0);
1014 version[3] = EFX_WORD_FIELD(ver_words[3], EFX_WORD_0);
1015 build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
1018 /* The bootrom doesn't understand BOOT_STATUS */
1019 if (MC_FW_VERSION_IS_BOOTLOADER(build)) {
1020 status = EFX_MCDI_BOOT_ROM;
1024 (void) memset(payload, 0, sizeof (payload));
1025 req.emr_cmd = MC_CMD_GET_BOOT_STATUS;
1026 req.emr_in_buf = payload;
1027 req.emr_in_length = MC_CMD_GET_BOOT_STATUS_IN_LEN;
1028 req.emr_out_buf = payload;
1029 req.emr_out_length = MC_CMD_GET_BOOT_STATUS_OUT_LEN;
1031 efx_mcdi_execute_quiet(enp, &req);
1033 if (req.emr_rc == EACCES) {
1034 /* Unprivileged functions cannot access BOOT_STATUS */
1035 status = EFX_MCDI_BOOT_PRIMARY;
1036 version[0] = version[1] = version[2] = version[3] = 0;
1041 if (req.emr_rc != 0) {
1046 if (req.emr_out_length_used < MC_CMD_GET_BOOT_STATUS_OUT_LEN) {
1051 if (MCDI_OUT_DWORD_FIELD(req, GET_BOOT_STATUS_OUT_FLAGS,
1052 GET_BOOT_STATUS_OUT_FLAGS_PRIMARY))
1053 status = EFX_MCDI_BOOT_PRIMARY;
1055 status = EFX_MCDI_BOOT_SECONDARY;
1058 if (versionp != NULL)
1059 memcpy(versionp, version, sizeof (version));
1062 if (statusp != NULL)
1074 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1079 __checkReturn efx_rc_t
1080 efx_mcdi_get_capabilities(
1081 __in efx_nic_t *enp,
1082 __out_opt uint32_t *flagsp,
1083 __out_opt uint16_t *rx_dpcpu_fw_idp,
1084 __out_opt uint16_t *tx_dpcpu_fw_idp,
1085 __out_opt uint32_t *flags2p,
1086 __out_opt uint32_t *tso2ncp)
1089 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_CAPABILITIES_IN_LEN,
1090 MC_CMD_GET_CAPABILITIES_V2_OUT_LEN);
1091 boolean_t v2_capable;
1094 req.emr_cmd = MC_CMD_GET_CAPABILITIES;
1095 req.emr_in_buf = payload;
1096 req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN;
1097 req.emr_out_buf = payload;
1098 req.emr_out_length = MC_CMD_GET_CAPABILITIES_V2_OUT_LEN;
1100 efx_mcdi_execute_quiet(enp, &req);
1102 if (req.emr_rc != 0) {
1107 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_OUT_LEN) {
1113 *flagsp = MCDI_OUT_DWORD(req, GET_CAPABILITIES_OUT_FLAGS1);
1115 if (rx_dpcpu_fw_idp != NULL)
1116 *rx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1117 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID);
1119 if (tx_dpcpu_fw_idp != NULL)
1120 *tx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1121 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID);
1123 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)
1124 v2_capable = B_FALSE;
1126 v2_capable = B_TRUE;
1128 if (flags2p != NULL) {
1129 *flags2p = (v2_capable) ?
1130 MCDI_OUT_DWORD(req, GET_CAPABILITIES_V2_OUT_FLAGS2) :
1134 if (tso2ncp != NULL) {
1135 *tso2ncp = (v2_capable) ?
1137 GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS) :
1146 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1151 static __checkReturn efx_rc_t
1153 __in efx_nic_t *enp,
1154 __in boolean_t after_assertion)
1156 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_REBOOT_IN_LEN,
1157 MC_CMD_REBOOT_OUT_LEN);
1162 * We could require the caller to have caused en_mod_flags=0 to
1163 * call this function. This doesn't help the other port though,
1164 * who's about to get the MC ripped out from underneath them.
1165 * Since they have to cope with the subsequent fallout of MCDI
1166 * failures, we should as well.
1168 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1170 req.emr_cmd = MC_CMD_REBOOT;
1171 req.emr_in_buf = payload;
1172 req.emr_in_length = MC_CMD_REBOOT_IN_LEN;
1173 req.emr_out_buf = payload;
1174 req.emr_out_length = MC_CMD_REBOOT_OUT_LEN;
1176 MCDI_IN_SET_DWORD(req, REBOOT_IN_FLAGS,
1177 (after_assertion ? MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION : 0));
1179 efx_mcdi_execute_quiet(enp, &req);
1181 if (req.emr_rc == EACCES) {
1182 /* Unprivileged functions cannot reboot the MC. */
1186 /* A successful reboot request returns EIO. */
1187 if (req.emr_rc != 0 && req.emr_rc != EIO) {
1196 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1201 __checkReturn efx_rc_t
1203 __in efx_nic_t *enp)
1205 return (efx_mcdi_do_reboot(enp, B_FALSE));
1208 __checkReturn efx_rc_t
1209 efx_mcdi_exit_assertion_handler(
1210 __in efx_nic_t *enp)
1212 return (efx_mcdi_do_reboot(enp, B_TRUE));
1215 __checkReturn efx_rc_t
1216 efx_mcdi_read_assertion(
1217 __in efx_nic_t *enp)
1220 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_ASSERTS_IN_LEN,
1221 MC_CMD_GET_ASSERTS_OUT_LEN);
1230 * Before we attempt to chat to the MC, we should verify that the MC
1231 * isn't in it's assertion handler, either due to a previous reboot,
1232 * or because we're reinitializing due to an eec_exception().
1234 * Use GET_ASSERTS to read any assertion state that may be present.
1235 * Retry this command twice. Once because a boot-time assertion failure
1236 * might cause the 1st MCDI request to fail. And once again because
1237 * we might race with efx_mcdi_exit_assertion_handler() running on
1238 * partner port(s) on the same NIC.
1242 (void) memset(payload, 0, sizeof (payload));
1243 req.emr_cmd = MC_CMD_GET_ASSERTS;
1244 req.emr_in_buf = payload;
1245 req.emr_in_length = MC_CMD_GET_ASSERTS_IN_LEN;
1246 req.emr_out_buf = payload;
1247 req.emr_out_length = MC_CMD_GET_ASSERTS_OUT_LEN;
1249 MCDI_IN_SET_DWORD(req, GET_ASSERTS_IN_CLEAR, 1);
1250 efx_mcdi_execute_quiet(enp, &req);
1252 } while ((req.emr_rc == EINTR || req.emr_rc == EIO) && retry-- > 0);
1254 if (req.emr_rc != 0) {
1255 if (req.emr_rc == EACCES) {
1256 /* Unprivileged functions cannot clear assertions. */
1263 if (req.emr_out_length_used < MC_CMD_GET_ASSERTS_OUT_LEN) {
1268 /* Print out any assertion state recorded */
1269 flags = MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1270 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1273 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1274 ? "system-level assertion"
1275 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1276 ? "thread-level assertion"
1277 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1279 : (flags == MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP)
1280 ? "illegal address trap"
1281 : "unknown assertion";
1282 EFSYS_PROBE3(mcpu_assertion,
1283 const char *, reason, unsigned int,
1284 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1286 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_THREAD_OFFS));
1288 /* Print out the registers (r1 ... r31) */
1289 ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
1291 index < 1 + MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1293 EFSYS_PROBE2(mcpu_register, unsigned int, index, unsigned int,
1294 EFX_DWORD_FIELD(*MCDI_OUT(req, efx_dword_t, ofst),
1296 ofst += sizeof (efx_dword_t);
1298 EFSYS_ASSERT(ofst <= MC_CMD_GET_ASSERTS_OUT_LEN);
1306 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1313 * Internal routines for for specific MCDI requests.
1316 __checkReturn efx_rc_t
1317 efx_mcdi_drv_attach(
1318 __in efx_nic_t *enp,
1319 __in boolean_t attach)
1322 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_DRV_ATTACH_IN_V2_LEN,
1323 MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
1326 req.emr_cmd = MC_CMD_DRV_ATTACH;
1327 req.emr_in_buf = payload;
1328 if (enp->en_drv_version[0] == '\0') {
1329 req.emr_in_length = MC_CMD_DRV_ATTACH_IN_LEN;
1331 req.emr_in_length = MC_CMD_DRV_ATTACH_IN_V2_LEN;
1333 req.emr_out_buf = payload;
1334 req.emr_out_length = MC_CMD_DRV_ATTACH_EXT_OUT_LEN;
1337 * Typically, client drivers use DONT_CARE for the datapath firmware
1338 * type to ensure that the driver can attach to an unprivileged
1339 * function. The datapath firmware type to use is controlled by the
1341 * If a client driver wishes to attach with a specific datapath firmware
1342 * type, that can be passed in second argument of efx_nic_probe API. One
1343 * such example is the ESXi native driver that attempts attaching with
1344 * FULL_FEATURED datapath firmware type first and fall backs to
1345 * DONT_CARE datapath firmware type if MC_CMD_DRV_ATTACH fails.
1347 MCDI_IN_POPULATE_DWORD_2(req, DRV_ATTACH_IN_NEW_STATE,
1348 DRV_ATTACH_IN_ATTACH, attach ? 1 : 0,
1349 DRV_ATTACH_IN_SUBVARIANT_AWARE, EFSYS_OPT_FW_SUBVARIANT_AWARE);
1350 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1);
1351 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, enp->efv);
1353 if (req.emr_in_length >= MC_CMD_DRV_ATTACH_IN_V2_LEN) {
1354 EFX_STATIC_ASSERT(sizeof (enp->en_drv_version) ==
1355 MC_CMD_DRV_ATTACH_IN_V2_DRIVER_VERSION_LEN);
1356 memcpy(MCDI_IN2(req, char, DRV_ATTACH_IN_V2_DRIVER_VERSION),
1357 enp->en_drv_version,
1358 MC_CMD_DRV_ATTACH_IN_V2_DRIVER_VERSION_LEN);
1361 efx_mcdi_execute(enp, &req);
1363 if (req.emr_rc != 0) {
1368 if (req.emr_out_length_used < MC_CMD_DRV_ATTACH_OUT_LEN) {
1378 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1383 __checkReturn efx_rc_t
1384 efx_mcdi_get_board_cfg(
1385 __in efx_nic_t *enp,
1386 __out_opt uint32_t *board_typep,
1387 __out_opt efx_dword_t *capabilitiesp,
1388 __out_ecount_opt(6) uint8_t mac_addrp[6])
1390 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
1392 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_BOARD_CFG_IN_LEN,
1393 MC_CMD_GET_BOARD_CFG_OUT_LENMIN);
1396 req.emr_cmd = MC_CMD_GET_BOARD_CFG;
1397 req.emr_in_buf = payload;
1398 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
1399 req.emr_out_buf = payload;
1400 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMIN;
1402 efx_mcdi_execute(enp, &req);
1404 if (req.emr_rc != 0) {
1409 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1414 if (mac_addrp != NULL) {
1417 if (emip->emi_port == 1) {
1418 addrp = MCDI_OUT2(req, uint8_t,
1419 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0);
1420 } else if (emip->emi_port == 2) {
1421 addrp = MCDI_OUT2(req, uint8_t,
1422 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1);
1428 EFX_MAC_ADDR_COPY(mac_addrp, addrp);
1431 if (capabilitiesp != NULL) {
1432 if (emip->emi_port == 1) {
1433 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1434 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1435 } else if (emip->emi_port == 2) {
1436 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1437 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1444 if (board_typep != NULL) {
1445 *board_typep = MCDI_OUT_DWORD(req,
1446 GET_BOARD_CFG_OUT_BOARD_TYPE);
1458 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1463 __checkReturn efx_rc_t
1464 efx_mcdi_get_resource_limits(
1465 __in efx_nic_t *enp,
1466 __out_opt uint32_t *nevqp,
1467 __out_opt uint32_t *nrxqp,
1468 __out_opt uint32_t *ntxqp)
1471 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_RESOURCE_LIMITS_IN_LEN,
1472 MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN);
1475 req.emr_cmd = MC_CMD_GET_RESOURCE_LIMITS;
1476 req.emr_in_buf = payload;
1477 req.emr_in_length = MC_CMD_GET_RESOURCE_LIMITS_IN_LEN;
1478 req.emr_out_buf = payload;
1479 req.emr_out_length = MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN;
1481 efx_mcdi_execute(enp, &req);
1483 if (req.emr_rc != 0) {
1488 if (req.emr_out_length_used < MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) {
1494 *nevqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_EVQ);
1496 *nrxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_RXQ);
1498 *ntxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_TXQ);
1505 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1510 __checkReturn efx_rc_t
1511 efx_mcdi_get_phy_cfg(
1512 __in efx_nic_t *enp)
1514 efx_port_t *epp = &(enp->en_port);
1515 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1517 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_PHY_CFG_IN_LEN,
1518 MC_CMD_GET_PHY_CFG_OUT_LEN);
1523 uint32_t phy_media_type;
1526 req.emr_cmd = MC_CMD_GET_PHY_CFG;
1527 req.emr_in_buf = payload;
1528 req.emr_in_length = MC_CMD_GET_PHY_CFG_IN_LEN;
1529 req.emr_out_buf = payload;
1530 req.emr_out_length = MC_CMD_GET_PHY_CFG_OUT_LEN;
1532 efx_mcdi_execute(enp, &req);
1534 if (req.emr_rc != 0) {
1539 if (req.emr_out_length_used < MC_CMD_GET_PHY_CFG_OUT_LEN) {
1544 encp->enc_phy_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_TYPE);
1546 namep = MCDI_OUT2(req, char, GET_PHY_CFG_OUT_NAME);
1547 namelen = MIN(sizeof (encp->enc_phy_name) - 1,
1548 strnlen(namep, MC_CMD_GET_PHY_CFG_OUT_NAME_LEN));
1549 (void) memset(encp->enc_phy_name, 0,
1550 sizeof (encp->enc_phy_name));
1551 memcpy(encp->enc_phy_name, namep, namelen);
1552 #endif /* EFSYS_OPT_NAMES */
1553 (void) memset(encp->enc_phy_revision, 0,
1554 sizeof (encp->enc_phy_revision));
1555 memcpy(encp->enc_phy_revision,
1556 MCDI_OUT2(req, char, GET_PHY_CFG_OUT_REVISION),
1557 MIN(sizeof (encp->enc_phy_revision) - 1,
1558 MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN));
1559 #if EFSYS_OPT_PHY_LED_CONTROL
1560 encp->enc_led_mask = ((1 << EFX_PHY_LED_DEFAULT) |
1561 (1 << EFX_PHY_LED_OFF) |
1562 (1 << EFX_PHY_LED_ON));
1563 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
1565 /* Get the media type of the fixed port, if recognised. */
1566 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XAUI == EFX_PHY_MEDIA_XAUI);
1567 EFX_STATIC_ASSERT(MC_CMD_MEDIA_CX4 == EFX_PHY_MEDIA_CX4);
1568 EFX_STATIC_ASSERT(MC_CMD_MEDIA_KX4 == EFX_PHY_MEDIA_KX4);
1569 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XFP == EFX_PHY_MEDIA_XFP);
1570 EFX_STATIC_ASSERT(MC_CMD_MEDIA_SFP_PLUS == EFX_PHY_MEDIA_SFP_PLUS);
1571 EFX_STATIC_ASSERT(MC_CMD_MEDIA_BASE_T == EFX_PHY_MEDIA_BASE_T);
1572 EFX_STATIC_ASSERT(MC_CMD_MEDIA_QSFP_PLUS == EFX_PHY_MEDIA_QSFP_PLUS);
1573 phy_media_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_MEDIA_TYPE);
1574 epp->ep_fixed_port_type = (efx_phy_media_type_t)phy_media_type;
1575 if (epp->ep_fixed_port_type >= EFX_PHY_MEDIA_NTYPES)
1576 epp->ep_fixed_port_type = EFX_PHY_MEDIA_INVALID;
1578 epp->ep_phy_cap_mask =
1579 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP);
1580 #if EFSYS_OPT_PHY_FLAGS
1581 encp->enc_phy_flags_mask = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_FLAGS);
1582 #endif /* EFSYS_OPT_PHY_FLAGS */
1584 encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT);
1586 /* Populate internal state */
1587 encp->enc_mcdi_mdio_channel =
1588 (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_CHANNEL);
1590 #if EFSYS_OPT_PHY_STATS
1591 encp->enc_mcdi_phy_stat_mask =
1592 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_STATS_MASK);
1593 #endif /* EFSYS_OPT_PHY_STATS */
1596 encp->enc_bist_mask = 0;
1597 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1598 GET_PHY_CFG_OUT_BIST_CABLE_SHORT))
1599 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_SHORT);
1600 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1601 GET_PHY_CFG_OUT_BIST_CABLE_LONG))
1602 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_LONG);
1603 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1604 GET_PHY_CFG_OUT_BIST))
1605 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_NORMAL);
1606 #endif /* EFSYS_OPT_BIST */
1613 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1618 __checkReturn efx_rc_t
1619 efx_mcdi_firmware_update_supported(
1620 __in efx_nic_t *enp,
1621 __out boolean_t *supportedp)
1623 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1626 if (emcop != NULL) {
1627 if ((rc = emcop->emco_feature_supported(enp,
1628 EFX_MCDI_FEATURE_FW_UPDATE, supportedp)) != 0)
1631 /* Earlier devices always supported updates */
1632 *supportedp = B_TRUE;
1638 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1643 __checkReturn efx_rc_t
1644 efx_mcdi_macaddr_change_supported(
1645 __in efx_nic_t *enp,
1646 __out boolean_t *supportedp)
1648 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1651 if (emcop != NULL) {
1652 if ((rc = emcop->emco_feature_supported(enp,
1653 EFX_MCDI_FEATURE_MACADDR_CHANGE, supportedp)) != 0)
1656 /* Earlier devices always supported MAC changes */
1657 *supportedp = B_TRUE;
1663 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1668 __checkReturn efx_rc_t
1669 efx_mcdi_link_control_supported(
1670 __in efx_nic_t *enp,
1671 __out boolean_t *supportedp)
1673 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1676 if (emcop != NULL) {
1677 if ((rc = emcop->emco_feature_supported(enp,
1678 EFX_MCDI_FEATURE_LINK_CONTROL, supportedp)) != 0)
1681 /* Earlier devices always supported link control */
1682 *supportedp = B_TRUE;
1688 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1693 __checkReturn efx_rc_t
1694 efx_mcdi_mac_spoofing_supported(
1695 __in efx_nic_t *enp,
1696 __out boolean_t *supportedp)
1698 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1701 if (emcop != NULL) {
1702 if ((rc = emcop->emco_feature_supported(enp,
1703 EFX_MCDI_FEATURE_MAC_SPOOFING, supportedp)) != 0)
1706 /* Earlier devices always supported MAC spoofing */
1707 *supportedp = B_TRUE;
1713 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1722 * Enter bist offline mode. This is a fw mode which puts the NIC into a state
1723 * where memory BIST tests can be run and not much else can interfere or happen.
1724 * A reboot is required to exit this mode.
1726 __checkReturn efx_rc_t
1727 efx_mcdi_bist_enable_offline(
1728 __in efx_nic_t *enp)
1733 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN == 0);
1734 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN == 0);
1736 req.emr_cmd = MC_CMD_ENABLE_OFFLINE_BIST;
1737 req.emr_in_buf = NULL;
1738 req.emr_in_length = 0;
1739 req.emr_out_buf = NULL;
1740 req.emr_out_length = 0;
1742 efx_mcdi_execute(enp, &req);
1744 if (req.emr_rc != 0) {
1752 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1756 #endif /* EFX_OPTS_EF10() */
1758 __checkReturn efx_rc_t
1759 efx_mcdi_bist_start(
1760 __in efx_nic_t *enp,
1761 __in efx_bist_type_t type)
1764 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_START_BIST_IN_LEN,
1765 MC_CMD_START_BIST_OUT_LEN);
1768 req.emr_cmd = MC_CMD_START_BIST;
1769 req.emr_in_buf = payload;
1770 req.emr_in_length = MC_CMD_START_BIST_IN_LEN;
1771 req.emr_out_buf = payload;
1772 req.emr_out_length = MC_CMD_START_BIST_OUT_LEN;
1775 case EFX_BIST_TYPE_PHY_NORMAL:
1776 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST);
1778 case EFX_BIST_TYPE_PHY_CABLE_SHORT:
1779 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1780 MC_CMD_PHY_BIST_CABLE_SHORT);
1782 case EFX_BIST_TYPE_PHY_CABLE_LONG:
1783 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1784 MC_CMD_PHY_BIST_CABLE_LONG);
1786 case EFX_BIST_TYPE_MC_MEM:
1787 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1788 MC_CMD_MC_MEM_BIST);
1790 case EFX_BIST_TYPE_SAT_MEM:
1791 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1792 MC_CMD_PORT_MEM_BIST);
1794 case EFX_BIST_TYPE_REG:
1795 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1802 efx_mcdi_execute(enp, &req);
1804 if (req.emr_rc != 0) {
1812 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1817 #endif /* EFSYS_OPT_BIST */
1820 /* Enable logging of some events (e.g. link state changes) */
1821 __checkReturn efx_rc_t
1823 __in efx_nic_t *enp)
1826 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_LOG_CTRL_IN_LEN,
1827 MC_CMD_LOG_CTRL_OUT_LEN);
1830 req.emr_cmd = MC_CMD_LOG_CTRL;
1831 req.emr_in_buf = payload;
1832 req.emr_in_length = MC_CMD_LOG_CTRL_IN_LEN;
1833 req.emr_out_buf = payload;
1834 req.emr_out_length = MC_CMD_LOG_CTRL_OUT_LEN;
1836 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST,
1837 MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ);
1838 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST_EVQ, 0);
1840 efx_mcdi_execute(enp, &req);
1842 if (req.emr_rc != 0) {
1850 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1856 #if EFSYS_OPT_MAC_STATS
1858 __checkReturn efx_rc_t
1860 __in efx_nic_t *enp,
1861 __in uint32_t vport_id,
1862 __in_opt efsys_mem_t *esmp,
1863 __in efx_stats_action_t action,
1864 __in uint16_t period_ms)
1867 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_MAC_STATS_IN_LEN,
1868 MC_CMD_MAC_STATS_V2_OUT_DMA_LEN);
1869 int clear = (action == EFX_STATS_CLEAR);
1870 int upload = (action == EFX_STATS_UPLOAD);
1871 int enable = (action == EFX_STATS_ENABLE_NOEVENTS);
1872 int events = (action == EFX_STATS_ENABLE_EVENTS);
1873 int disable = (action == EFX_STATS_DISABLE);
1876 req.emr_cmd = MC_CMD_MAC_STATS;
1877 req.emr_in_buf = payload;
1878 req.emr_in_length = MC_CMD_MAC_STATS_IN_LEN;
1879 req.emr_out_buf = payload;
1880 req.emr_out_length = MC_CMD_MAC_STATS_V2_OUT_DMA_LEN;
1882 MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD,
1883 MAC_STATS_IN_DMA, upload,
1884 MAC_STATS_IN_CLEAR, clear,
1885 MAC_STATS_IN_PERIODIC_CHANGE, enable | events | disable,
1886 MAC_STATS_IN_PERIODIC_ENABLE, enable | events,
1887 MAC_STATS_IN_PERIODIC_NOEVENT, !events,
1888 MAC_STATS_IN_PERIOD_MS, (enable | events) ? period_ms : 0);
1890 if (enable || events || upload) {
1891 const efx_nic_cfg_t *encp = &enp->en_nic_cfg;
1894 /* Periodic stats or stats upload require a DMA buffer */
1900 if (encp->enc_mac_stats_nstats < MC_CMD_MAC_NSTATS) {
1901 /* MAC stats count too small for legacy MAC stats */
1906 bytes = encp->enc_mac_stats_nstats * sizeof (efx_qword_t);
1908 if (EFSYS_MEM_SIZE(esmp) < bytes) {
1909 /* DMA buffer too small */
1914 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
1915 EFSYS_MEM_ADDR(esmp) & 0xffffffff);
1916 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI,
1917 EFSYS_MEM_ADDR(esmp) >> 32);
1918 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes);
1922 * NOTE: Do not use EVB_PORT_ID_ASSIGNED when disabling periodic stats,
1923 * as this may fail (and leave periodic DMA enabled) if the
1924 * vadapter has already been deleted.
1926 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_PORT_ID,
1927 (disable ? EVB_PORT_ID_NULL : vport_id));
1929 efx_mcdi_execute(enp, &req);
1931 if (req.emr_rc != 0) {
1932 /* EF10: Expect ENOENT if no DMA queues are initialised */
1933 if ((req.emr_rc != ENOENT) ||
1934 (enp->en_rx_qcount + enp->en_tx_qcount != 0)) {
1949 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1954 __checkReturn efx_rc_t
1955 efx_mcdi_mac_stats_clear(
1956 __in efx_nic_t *enp)
1960 if ((rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, NULL,
1961 EFX_STATS_CLEAR, 0)) != 0)
1967 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1972 __checkReturn efx_rc_t
1973 efx_mcdi_mac_stats_upload(
1974 __in efx_nic_t *enp,
1975 __in efsys_mem_t *esmp)
1980 * The MC DMAs aggregate statistics for our convenience, so we can
1981 * avoid having to pull the statistics buffer into the cache to
1982 * maintain cumulative statistics.
1984 if ((rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, esmp,
1985 EFX_STATS_UPLOAD, 0)) != 0)
1991 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1996 __checkReturn efx_rc_t
1997 efx_mcdi_mac_stats_periodic(
1998 __in efx_nic_t *enp,
1999 __in efsys_mem_t *esmp,
2000 __in uint16_t period_ms,
2001 __in boolean_t events)
2006 * The MC DMAs aggregate statistics for our convenience, so we can
2007 * avoid having to pull the statistics buffer into the cache to
2008 * maintain cumulative statistics.
2009 * Huntington uses a fixed 1sec period.
2010 * Medford uses a fixed 1sec period before v6.2.1.1033 firmware.
2013 rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, NULL,
2014 EFX_STATS_DISABLE, 0);
2016 rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, esmp,
2017 EFX_STATS_ENABLE_EVENTS, period_ms);
2019 rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, esmp,
2020 EFX_STATS_ENABLE_NOEVENTS, period_ms);
2028 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2033 #endif /* EFSYS_OPT_MAC_STATS */
2035 #if EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10()
2038 * This function returns the pf and vf number of a function. If it is a pf the
2039 * vf number is 0xffff. The vf number is the index of the vf on that
2040 * function. So if you have 3 vfs on pf 0 the 3 vfs will return (pf=0,vf=0),
2041 * (pf=0,vf=1), (pf=0,vf=2) aand the pf will return (pf=0, vf=0xffff).
2043 __checkReturn efx_rc_t
2044 efx_mcdi_get_function_info(
2045 __in efx_nic_t *enp,
2046 __out uint32_t *pfp,
2047 __out_opt uint32_t *vfp)
2050 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_FUNCTION_INFO_IN_LEN,
2051 MC_CMD_GET_FUNCTION_INFO_OUT_LEN);
2054 req.emr_cmd = MC_CMD_GET_FUNCTION_INFO;
2055 req.emr_in_buf = payload;
2056 req.emr_in_length = MC_CMD_GET_FUNCTION_INFO_IN_LEN;
2057 req.emr_out_buf = payload;
2058 req.emr_out_length = MC_CMD_GET_FUNCTION_INFO_OUT_LEN;
2060 efx_mcdi_execute(enp, &req);
2062 if (req.emr_rc != 0) {
2067 if (req.emr_out_length_used < MC_CMD_GET_FUNCTION_INFO_OUT_LEN) {
2072 *pfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_PF);
2074 *vfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_VF);
2081 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2086 __checkReturn efx_rc_t
2087 efx_mcdi_privilege_mask(
2088 __in efx_nic_t *enp,
2091 __out uint32_t *maskp)
2094 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_PRIVILEGE_MASK_IN_LEN,
2095 MC_CMD_PRIVILEGE_MASK_OUT_LEN);
2098 req.emr_cmd = MC_CMD_PRIVILEGE_MASK;
2099 req.emr_in_buf = payload;
2100 req.emr_in_length = MC_CMD_PRIVILEGE_MASK_IN_LEN;
2101 req.emr_out_buf = payload;
2102 req.emr_out_length = MC_CMD_PRIVILEGE_MASK_OUT_LEN;
2104 MCDI_IN_POPULATE_DWORD_2(req, PRIVILEGE_MASK_IN_FUNCTION,
2105 PRIVILEGE_MASK_IN_FUNCTION_PF, pf,
2106 PRIVILEGE_MASK_IN_FUNCTION_VF, vf);
2108 efx_mcdi_execute(enp, &req);
2110 if (req.emr_rc != 0) {
2115 if (req.emr_out_length_used < MC_CMD_PRIVILEGE_MASK_OUT_LEN) {
2120 *maskp = MCDI_OUT_DWORD(req, PRIVILEGE_MASK_OUT_OLD_MASK);
2127 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2132 #endif /* EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10() */
2134 __checkReturn efx_rc_t
2135 efx_mcdi_set_workaround(
2136 __in efx_nic_t *enp,
2138 __in boolean_t enabled,
2139 __out_opt uint32_t *flagsp)
2142 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_WORKAROUND_IN_LEN,
2143 MC_CMD_WORKAROUND_EXT_OUT_LEN);
2146 req.emr_cmd = MC_CMD_WORKAROUND;
2147 req.emr_in_buf = payload;
2148 req.emr_in_length = MC_CMD_WORKAROUND_IN_LEN;
2149 req.emr_out_buf = payload;
2150 req.emr_out_length = MC_CMD_WORKAROUND_OUT_LEN;
2152 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_TYPE, type);
2153 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_ENABLED, enabled ? 1 : 0);
2155 efx_mcdi_execute_quiet(enp, &req);
2157 if (req.emr_rc != 0) {
2162 if (flagsp != NULL) {
2163 if (req.emr_out_length_used >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
2164 *flagsp = MCDI_OUT_DWORD(req, WORKAROUND_EXT_OUT_FLAGS);
2172 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2178 __checkReturn efx_rc_t
2179 efx_mcdi_get_workarounds(
2180 __in efx_nic_t *enp,
2181 __out_opt uint32_t *implementedp,
2182 __out_opt uint32_t *enabledp)
2185 EFX_MCDI_DECLARE_BUF(payload, 0, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
2188 req.emr_cmd = MC_CMD_GET_WORKAROUNDS;
2189 req.emr_in_buf = NULL;
2190 req.emr_in_length = 0;
2191 req.emr_out_buf = payload;
2192 req.emr_out_length = MC_CMD_GET_WORKAROUNDS_OUT_LEN;
2194 efx_mcdi_execute(enp, &req);
2196 if (req.emr_rc != 0) {
2201 if (implementedp != NULL) {
2203 MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_IMPLEMENTED);
2206 if (enabledp != NULL) {
2207 *enabledp = MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_ENABLED);
2213 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2219 * Size of media information page in accordance with SFF-8472 and SFF-8436.
2220 * It is used in MCDI interface as well.
2222 #define EFX_PHY_MEDIA_INFO_PAGE_SIZE 0x80
2225 * Transceiver identifiers from SFF-8024 Table 4-1.
2227 #define EFX_SFF_TRANSCEIVER_ID_SFP 0x03 /* SFP/SFP+/SFP28 */
2228 #define EFX_SFF_TRANSCEIVER_ID_QSFP 0x0c /* QSFP */
2229 #define EFX_SFF_TRANSCEIVER_ID_QSFP_PLUS 0x0d /* QSFP+ or later */
2230 #define EFX_SFF_TRANSCEIVER_ID_QSFP28 0x11 /* QSFP28 or later */
2232 static __checkReturn efx_rc_t
2233 efx_mcdi_get_phy_media_info(
2234 __in efx_nic_t *enp,
2235 __in uint32_t mcdi_page,
2236 __in uint8_t offset,
2238 __out_bcount(len) uint8_t *data)
2241 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN,
2242 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(
2243 EFX_PHY_MEDIA_INFO_PAGE_SIZE));
2246 EFSYS_ASSERT((uint32_t)offset + len <= EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2248 req.emr_cmd = MC_CMD_GET_PHY_MEDIA_INFO;
2249 req.emr_in_buf = payload;
2250 req.emr_in_length = MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN;
2251 req.emr_out_buf = payload;
2252 req.emr_out_length =
2253 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2255 MCDI_IN_SET_DWORD(req, GET_PHY_MEDIA_INFO_IN_PAGE, mcdi_page);
2257 efx_mcdi_execute(enp, &req);
2259 if (req.emr_rc != 0) {
2264 if (req.emr_out_length_used !=
2265 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE)) {
2270 if (MCDI_OUT_DWORD(req, GET_PHY_MEDIA_INFO_OUT_DATALEN) !=
2271 EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2277 MCDI_OUT2(req, uint8_t, GET_PHY_MEDIA_INFO_OUT_DATA) + offset,
2287 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2292 __checkReturn efx_rc_t
2293 efx_mcdi_phy_module_get_info(
2294 __in efx_nic_t *enp,
2295 __in uint8_t dev_addr,
2298 __out_bcount(len) uint8_t *data)
2300 efx_port_t *epp = &(enp->en_port);
2302 uint32_t mcdi_lower_page;
2303 uint32_t mcdi_upper_page;
2306 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
2309 * Map device address to MC_CMD_GET_PHY_MEDIA_INFO pages.
2310 * Offset plus length interface allows to access page 0 only.
2311 * I.e. non-zero upper pages are not accessible.
2312 * See SFF-8472 section 4 Memory Organization and SFF-8436 section 7.6
2313 * QSFP+ Memory Map for details on how information is structured
2316 switch (epp->ep_fixed_port_type) {
2317 case EFX_PHY_MEDIA_SFP_PLUS:
2318 case EFX_PHY_MEDIA_QSFP_PLUS:
2319 /* Port type supports modules */
2327 * For all supported port types, MCDI page 0 offset 0 holds the
2328 * transceiver identifier. Probe to determine the data layout.
2329 * Definitions from SFF-8024 Table 4-1.
2331 rc = efx_mcdi_get_phy_media_info(enp,
2332 0, 0, sizeof(id), &id);
2337 case EFX_SFF_TRANSCEIVER_ID_SFP:
2339 * In accordance with SFF-8472 Diagnostic Monitoring
2340 * Interface for Optical Transceivers section 4 Memory
2341 * Organization two 2-wire addresses are defined.
2344 /* Base information */
2345 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE:
2347 * MCDI page 0 should be used to access lower
2348 * page 0 (0x00 - 0x7f) at the device address 0xA0.
2350 mcdi_lower_page = 0;
2352 * MCDI page 1 should be used to access upper
2353 * page 0 (0x80 - 0xff) at the device address 0xA0.
2355 mcdi_upper_page = 1;
2358 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM:
2360 * MCDI page 2 should be used to access lower
2361 * page 0 (0x00 - 0x7f) at the device address 0xA2.
2363 mcdi_lower_page = 2;
2365 * MCDI page 3 should be used to access upper
2366 * page 0 (0x80 - 0xff) at the device address 0xA2.
2368 mcdi_upper_page = 3;
2375 case EFX_SFF_TRANSCEIVER_ID_QSFP:
2376 case EFX_SFF_TRANSCEIVER_ID_QSFP_PLUS:
2377 case EFX_SFF_TRANSCEIVER_ID_QSFP28:
2379 case EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP:
2381 * MCDI page -1 should be used to access lower page 0
2384 mcdi_lower_page = (uint32_t)-1;
2386 * MCDI page 0 should be used to access upper page 0
2389 mcdi_upper_page = 0;
2401 EFX_STATIC_ASSERT(EFX_PHY_MEDIA_INFO_PAGE_SIZE <= 0xFF);
2403 if (offset < EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2405 MIN(len, EFX_PHY_MEDIA_INFO_PAGE_SIZE - offset);
2407 rc = efx_mcdi_get_phy_media_info(enp,
2408 mcdi_lower_page, (uint8_t)offset, (uint8_t)read_len, data);
2417 offset -= EFX_PHY_MEDIA_INFO_PAGE_SIZE;
2421 EFSYS_ASSERT3U(len, <=, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2422 EFSYS_ASSERT3U(offset, <, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2424 rc = efx_mcdi_get_phy_media_info(enp,
2425 mcdi_upper_page, (uint8_t)offset, (uint8_t)len, data);
2441 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2446 #if EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10()
2448 #define INIT_EVQ_MAXNBUFS MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM
2451 # if (INIT_EVQ_MAXNBUFS < EF10_EVQ_MAXNBUFS)
2452 # error "INIT_EVQ_MAXNBUFS too small"
2454 #endif /* EFX_OPTS_EF10 */
2455 #if EFSYS_OPT_RIVERHEAD
2456 # if (INIT_EVQ_MAXNBUFS < RHEAD_EVQ_MAXNBUFS)
2457 # error "INIT_EVQ_MAXNBUFS too small"
2459 #endif /* EFSYS_OPT_RIVERHEAD */
2461 __checkReturn efx_rc_t
2463 __in efx_nic_t *enp,
2464 __in unsigned int instance,
2465 __in efsys_mem_t *esmp,
2469 __in uint32_t flags,
2470 __in boolean_t low_latency)
2472 const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
2474 EFX_MCDI_DECLARE_BUF(payload,
2475 MC_CMD_INIT_EVQ_V2_IN_LEN(INIT_EVQ_MAXNBUFS),
2476 MC_CMD_INIT_EVQ_V2_OUT_LEN);
2477 boolean_t interrupting;
2480 unsigned int evq_type;
2481 efx_qword_t *dma_addr;
2487 npages = efx_evq_nbufs(enp, nevs);
2488 if (npages > INIT_EVQ_MAXNBUFS) {
2493 req.emr_cmd = MC_CMD_INIT_EVQ;
2494 req.emr_in_buf = payload;
2495 req.emr_in_length = MC_CMD_INIT_EVQ_V2_IN_LEN(npages);
2496 req.emr_out_buf = payload;
2497 req.emr_out_length = MC_CMD_INIT_EVQ_V2_OUT_LEN;
2499 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_SIZE, nevs);
2500 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_INSTANCE, instance);
2501 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_IRQ_NUM, irq);
2503 interrupting = ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
2504 EFX_EVQ_FLAGS_NOTIFY_INTERRUPT);
2506 if (encp->enc_init_evq_v2_supported) {
2508 * On Medford the low latency license is required to enable RX
2509 * and event cut through and to disable RX batching. If event
2510 * queue type in flags is auto, we let the firmware decide the
2511 * settings to use. If the adapter has a low latency license,
2512 * it will choose the best settings for low latency, otherwise
2513 * it will choose the best settings for throughput.
2515 switch (flags & EFX_EVQ_FLAGS_TYPE_MASK) {
2516 case EFX_EVQ_FLAGS_TYPE_AUTO:
2517 evq_type = MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_AUTO;
2519 case EFX_EVQ_FLAGS_TYPE_THROUGHPUT:
2520 evq_type = MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_THROUGHPUT;
2522 case EFX_EVQ_FLAGS_TYPE_LOW_LATENCY:
2523 evq_type = MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_LOW_LATENCY;
2529 /* EvQ type controls merging, no manual settings */
2533 /* EvQ types other than manual are not supported */
2534 evq_type = MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_MANUAL;
2536 * On Huntington RX and TX event batching can only be requested
2537 * together (even if the datapath firmware doesn't actually
2538 * support RX batching). If event cut through is enabled no RX
2539 * batching will occur.
2541 * So always enable RX and TX event batching, and enable event
2542 * cut through if we want low latency operation.
2545 switch (flags & EFX_EVQ_FLAGS_TYPE_MASK) {
2546 case EFX_EVQ_FLAGS_TYPE_AUTO:
2547 ev_cut_through = low_latency ? 1 : 0;
2549 case EFX_EVQ_FLAGS_TYPE_THROUGHPUT:
2552 case EFX_EVQ_FLAGS_TYPE_LOW_LATENCY:
2561 MCDI_IN_POPULATE_DWORD_7(req, INIT_EVQ_V2_IN_FLAGS,
2562 INIT_EVQ_V2_IN_FLAG_INTERRUPTING, interrupting,
2563 INIT_EVQ_V2_IN_FLAG_RPTR_DOS, 0,
2564 INIT_EVQ_V2_IN_FLAG_INT_ARMD, 0,
2565 INIT_EVQ_V2_IN_FLAG_CUT_THRU, ev_cut_through,
2566 INIT_EVQ_V2_IN_FLAG_RX_MERGE, ev_merge,
2567 INIT_EVQ_V2_IN_FLAG_TX_MERGE, ev_merge,
2568 INIT_EVQ_V2_IN_FLAG_TYPE, evq_type);
2570 /* If the value is zero then disable the timer */
2572 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_MODE,
2573 MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_DIS);
2574 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_LOAD, 0);
2575 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_RELOAD, 0);
2579 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
2582 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_MODE,
2583 MC_CMD_INIT_EVQ_V2_IN_TMR_INT_HLDOFF);
2584 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_LOAD, ticks);
2585 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_RELOAD, ticks);
2588 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_COUNT_MODE,
2589 MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_DIS);
2590 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_COUNT_THRSHLD, 0);
2592 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_EVQ_V2_IN_DMA_ADDR);
2593 addr = EFSYS_MEM_ADDR(esmp);
2595 for (i = 0; i < npages; i++) {
2596 EFX_POPULATE_QWORD_2(*dma_addr,
2597 EFX_DWORD_1, (uint32_t)(addr >> 32),
2598 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
2601 addr += EFX_BUF_SIZE;
2604 efx_mcdi_execute(enp, &req);
2606 if (req.emr_rc != 0) {
2611 if (encp->enc_init_evq_v2_supported) {
2612 if (req.emr_out_length_used < MC_CMD_INIT_EVQ_V2_OUT_LEN) {
2616 EFSYS_PROBE1(mcdi_evq_flags, uint32_t,
2617 MCDI_OUT_DWORD(req, INIT_EVQ_V2_OUT_FLAGS));
2619 if (req.emr_out_length_used < MC_CMD_INIT_EVQ_OUT_LEN) {
2625 /* NOTE: ignore the returned IRQ param as firmware does not set it. */
2640 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2645 __checkReturn efx_rc_t
2647 __in efx_nic_t *enp,
2648 __in uint32_t instance)
2651 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_EVQ_IN_LEN,
2652 MC_CMD_FINI_EVQ_OUT_LEN);
2655 req.emr_cmd = MC_CMD_FINI_EVQ;
2656 req.emr_in_buf = payload;
2657 req.emr_in_length = MC_CMD_FINI_EVQ_IN_LEN;
2658 req.emr_out_buf = payload;
2659 req.emr_out_length = MC_CMD_FINI_EVQ_OUT_LEN;
2661 MCDI_IN_SET_DWORD(req, FINI_EVQ_IN_INSTANCE, instance);
2663 efx_mcdi_execute_quiet(enp, &req);
2665 if (req.emr_rc != 0) {
2674 * EALREADY is not an error, but indicates that the MC has rebooted and
2675 * that the EVQ has already been destroyed.
2678 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2683 __checkReturn efx_rc_t
2685 __in efx_nic_t *enp,
2686 __in uint32_t ndescs,
2687 __in efx_evq_t *eep,
2688 __in uint32_t label,
2689 __in uint32_t instance,
2690 __in efsys_mem_t *esmp,
2691 __in boolean_t disable_scatter,
2692 __in boolean_t want_inner_classes,
2693 __in uint32_t buf_size,
2694 __in uint32_t ps_bufsize,
2695 __in uint32_t es_bufs_per_desc,
2696 __in uint32_t es_max_dma_len,
2697 __in uint32_t es_buf_stride,
2698 __in uint32_t hol_block_timeout)
2700 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
2702 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V4_IN_LEN,
2703 MC_CMD_INIT_RXQ_V4_OUT_LEN);
2704 int npages = efx_rxq_nbufs(enp, ndescs);
2706 efx_qword_t *dma_addr;
2710 boolean_t want_outer_classes;
2711 boolean_t no_cont_ev;
2713 EFSYS_ASSERT3U(ndescs, <=, encp->enc_rxq_max_ndescs);
2715 if ((esmp == NULL) ||
2716 (EFSYS_MEM_SIZE(esmp) < efx_rxq_size(enp, ndescs))) {
2721 no_cont_ev = (eep->ee_flags & EFX_EVQ_FLAGS_NO_CONT_EV);
2722 if ((no_cont_ev == B_TRUE) && (disable_scatter == B_FALSE)) {
2723 /* TODO: Support scatter in NO_CONT_EV mode */
2729 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
2730 else if (es_bufs_per_desc > 0)
2731 dma_mode = MC_CMD_INIT_RXQ_V3_IN_EQUAL_STRIDE_SUPER_BUFFER;
2733 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
2735 if (encp->enc_tunnel_encapsulations_supported != 0 &&
2736 !want_inner_classes) {
2738 * WANT_OUTER_CLASSES can only be specified on hardware which
2739 * supports tunnel encapsulation offloads, even though it is
2740 * effectively the behaviour the hardware gives.
2742 * Also, on hardware which does support such offloads, older
2743 * firmware rejects the flag if the offloads are not supported
2744 * by the current firmware variant, which means this may fail if
2745 * the capabilities are not updated when the firmware variant
2746 * changes. This is not an issue on newer firmware, as it was
2747 * changed in bug 69842 (v6.4.2.1007) to permit this flag to be
2748 * specified on all firmware variants.
2750 want_outer_classes = B_TRUE;
2752 want_outer_classes = B_FALSE;
2755 req.emr_cmd = MC_CMD_INIT_RXQ;
2756 req.emr_in_buf = payload;
2757 req.emr_in_length = MC_CMD_INIT_RXQ_V4_IN_LEN;
2758 req.emr_out_buf = payload;
2759 req.emr_out_length = MC_CMD_INIT_RXQ_V4_OUT_LEN;
2761 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
2762 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, eep->ee_index);
2763 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
2764 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
2765 MCDI_IN_POPULATE_DWORD_10(req, INIT_RXQ_EXT_IN_FLAGS,
2766 INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
2767 INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
2768 INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
2769 INIT_RXQ_EXT_IN_CRC_MODE, 0,
2770 INIT_RXQ_EXT_IN_FLAG_PREFIX, 1,
2771 INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, disable_scatter,
2772 INIT_RXQ_EXT_IN_DMA_MODE,
2774 INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize,
2775 INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES, want_outer_classes,
2776 INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV, no_cont_ev);
2777 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
2778 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, enp->en_vport_id);
2780 if (es_bufs_per_desc > 0) {
2781 MCDI_IN_SET_DWORD(req,
2782 INIT_RXQ_V3_IN_ES_PACKET_BUFFERS_PER_BUCKET,
2784 MCDI_IN_SET_DWORD(req,
2785 INIT_RXQ_V3_IN_ES_MAX_DMA_LEN, es_max_dma_len);
2786 MCDI_IN_SET_DWORD(req,
2787 INIT_RXQ_V3_IN_ES_PACKET_STRIDE, es_buf_stride);
2788 MCDI_IN_SET_DWORD(req,
2789 INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT,
2793 if (encp->enc_init_rxq_with_buffer_size)
2794 MCDI_IN_SET_DWORD(req, INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES,
2797 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
2798 addr = EFSYS_MEM_ADDR(esmp);
2800 for (i = 0; i < npages; i++) {
2801 EFX_POPULATE_QWORD_2(*dma_addr,
2802 EFX_DWORD_1, (uint32_t)(addr >> 32),
2803 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
2806 addr += EFX_BUF_SIZE;
2809 efx_mcdi_execute(enp, &req);
2811 if (req.emr_rc != 0) {
2823 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2828 __checkReturn efx_rc_t
2830 __in efx_nic_t *enp,
2831 __in uint32_t instance)
2834 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_RXQ_IN_LEN,
2835 MC_CMD_FINI_RXQ_OUT_LEN);
2838 req.emr_cmd = MC_CMD_FINI_RXQ;
2839 req.emr_in_buf = payload;
2840 req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN;
2841 req.emr_out_buf = payload;
2842 req.emr_out_length = MC_CMD_FINI_RXQ_OUT_LEN;
2844 MCDI_IN_SET_DWORD(req, FINI_RXQ_IN_INSTANCE, instance);
2846 efx_mcdi_execute_quiet(enp, &req);
2848 if (req.emr_rc != 0) {
2857 * EALREADY is not an error, but indicates that the MC has rebooted and
2858 * that the RXQ has already been destroyed.
2861 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2866 __checkReturn efx_rc_t
2868 __in efx_nic_t *enp,
2869 __in uint32_t ndescs,
2870 __in uint32_t target_evq,
2871 __in uint32_t label,
2872 __in uint32_t instance,
2873 __in uint16_t flags,
2874 __in efsys_mem_t *esmp)
2877 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_TXQ_EXT_IN_LEN,
2878 MC_CMD_INIT_TXQ_OUT_LEN);
2879 efx_qword_t *dma_addr;
2885 EFSYS_ASSERT(MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM >=
2886 efx_txq_nbufs(enp, enp->en_nic_cfg.enc_txq_max_ndescs));
2888 if ((esmp == NULL) ||
2889 (EFSYS_MEM_SIZE(esmp) < efx_txq_size(enp, ndescs))) {
2894 npages = efx_txq_nbufs(enp, ndescs);
2895 if (MC_CMD_INIT_TXQ_IN_LEN(npages) > sizeof (payload)) {
2900 req.emr_cmd = MC_CMD_INIT_TXQ;
2901 req.emr_in_buf = payload;
2902 req.emr_in_length = MC_CMD_INIT_TXQ_IN_LEN(npages);
2903 req.emr_out_buf = payload;
2904 req.emr_out_length = MC_CMD_INIT_TXQ_OUT_LEN;
2906 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_SIZE, ndescs);
2907 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_TARGET_EVQ, target_evq);
2908 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_LABEL, label);
2909 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_INSTANCE, instance);
2911 MCDI_IN_POPULATE_DWORD_9(req, INIT_TXQ_IN_FLAGS,
2912 INIT_TXQ_IN_FLAG_BUFF_MODE, 0,
2913 INIT_TXQ_IN_FLAG_IP_CSUM_DIS,
2914 (flags & EFX_TXQ_CKSUM_IPV4) ? 0 : 1,
2915 INIT_TXQ_IN_FLAG_TCP_CSUM_DIS,
2916 (flags & EFX_TXQ_CKSUM_TCPUDP) ? 0 : 1,
2917 INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN,
2918 (flags & EFX_TXQ_CKSUM_INNER_IPV4) ? 1 : 0,
2919 INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN,
2920 (flags & EFX_TXQ_CKSUM_INNER_TCPUDP) ? 1 : 0,
2921 INIT_TXQ_EXT_IN_FLAG_TSOV2_EN, (flags & EFX_TXQ_FATSOV2) ? 1 : 0,
2922 INIT_TXQ_IN_FLAG_TCP_UDP_ONLY, 0,
2923 INIT_TXQ_IN_CRC_MODE, 0,
2924 INIT_TXQ_IN_FLAG_TIMESTAMP, 0);
2926 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_OWNER_ID, 0);
2927 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_PORT_ID, enp->en_vport_id);
2929 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_TXQ_IN_DMA_ADDR);
2930 addr = EFSYS_MEM_ADDR(esmp);
2932 for (i = 0; i < npages; i++) {
2933 EFX_POPULATE_QWORD_2(*dma_addr,
2934 EFX_DWORD_1, (uint32_t)(addr >> 32),
2935 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
2938 addr += EFX_BUF_SIZE;
2941 efx_mcdi_execute(enp, &req);
2943 if (req.emr_rc != 0) {
2955 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2960 __checkReturn efx_rc_t
2962 __in efx_nic_t *enp,
2963 __in uint32_t instance)
2966 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_TXQ_IN_LEN,
2967 MC_CMD_FINI_TXQ_OUT_LEN);
2970 req.emr_cmd = MC_CMD_FINI_TXQ;
2971 req.emr_in_buf = payload;
2972 req.emr_in_length = MC_CMD_FINI_TXQ_IN_LEN;
2973 req.emr_out_buf = payload;
2974 req.emr_out_length = MC_CMD_FINI_TXQ_OUT_LEN;
2976 MCDI_IN_SET_DWORD(req, FINI_TXQ_IN_INSTANCE, instance);
2978 efx_mcdi_execute_quiet(enp, &req);
2980 if (req.emr_rc != 0) {
2989 * EALREADY is not an error, but indicates that the MC has rebooted and
2990 * that the TXQ has already been destroyed.
2993 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2998 #endif /* EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10() */
3000 #endif /* EFSYS_OPT_MCDI */