1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019-2020 Xilinx, Inc.
4 * Copyright(c) 2018-2019 Solarflare Communications Inc.
10 #if EFSYS_OPT_RIVERHEAD
13 * Non-interrupting event queue requires interrupting event queue to
14 * refer to for wake-up events even if wake ups are never used.
15 * It could be even non-allocated event queue.
17 #define EFX_RHEAD_ALWAYS_INTERRUPTING_EVQ_INDEX (0)
22 __in efx_qword_t *eventp,
23 __in const efx_ev_callbacks_t *eecp,
26 static __checkReturn boolean_t
29 __in efx_qword_t *eqp,
30 __in const efx_ev_callbacks_t *eecp,
33 static __checkReturn boolean_t
34 rhead_ev_tx_completion(
36 __in efx_qword_t *eqp,
37 __in const efx_ev_callbacks_t *eecp,
40 static __checkReturn boolean_t
43 __in efx_qword_t *eqp,
44 __in const efx_ev_callbacks_t *eecp,
47 #if EFSYS_OPT_EV_EXTENDED_WIDTH
51 __in efx_xword_t *eventp,
52 __in const efx_ev_callbacks_t *eecp,
58 __inout unsigned int *countp,
59 __in const efx_ev_callbacks_t *eecp,
62 #if EFSYS_OPT_DESC_PROXY
66 __in efx_xword_t *eventp,
67 __in const efx_ev_callbacks_t *eecp,
71 rhead_ev_ew_virtq_desc(
73 __in efx_xword_t *eventp,
74 __in const efx_ev_callbacks_t *eecp,
76 #endif /* EFSYS_OPT_DESC_PROXY */
77 #endif /* EFSYS_OPT_EV_EXTENDED_WIDTH */
80 __checkReturn efx_rc_t
96 __checkReturn efx_rc_t
99 __in unsigned int index,
100 __in efsys_mem_t *esmp,
107 const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
112 _NOTE(ARGUNUSED(id)) /* buftbl id managed by MC */
114 desc_size = encp->enc_ev_desc_size;
115 #if EFSYS_OPT_EV_EXTENDED_WIDTH
116 if (flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH)
117 desc_size = encp->enc_ev_ew_desc_size;
119 EFSYS_ASSERT(desc_size != 0);
121 if (EFSYS_MEM_SIZE(esmp) < (ndescs * desc_size)) {
122 /* Buffer too small for event queue descriptors */
127 /* Set up the handler table */
128 eep->ee_rx = rhead_ev_rx_packets;
129 eep->ee_tx = rhead_ev_tx_completion;
130 eep->ee_driver = NULL; /* FIXME */
131 eep->ee_drv_gen = NULL; /* FIXME */
132 eep->ee_mcdi = rhead_ev_mcdi;
134 #if EFSYS_OPT_DESC_PROXY
135 eep->ee_ew_txq_desc = rhead_ev_ew_txq_desc;
136 eep->ee_ew_virtq_desc = rhead_ev_ew_virtq_desc;
137 #endif /* EFSYS_OPT_DESC_PROXY */
139 /* Set up the event queue */
140 /* INIT_EVQ expects function-relative vector number */
141 if ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
142 EFX_EVQ_FLAGS_NOTIFY_INTERRUPT) {
144 } else if (index == EFX_RHEAD_ALWAYS_INTERRUPTING_EVQ_INDEX) {
146 flags = (flags & ~EFX_EVQ_FLAGS_NOTIFY_MASK) |
147 EFX_EVQ_FLAGS_NOTIFY_INTERRUPT;
149 irq = EFX_RHEAD_ALWAYS_INTERRUPTING_EVQ_INDEX;
153 * Interrupts may be raised for events immediately after the queue is
154 * created. See bug58606.
156 rc = efx_mcdi_init_evq(enp, index, esmp, ndescs, irq, us, flags,
166 EFSYS_PROBE1(fail1, efx_rc_t, rc);
175 efx_nic_t *enp = eep->ee_enp;
177 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_RIVERHEAD);
179 (void) efx_mcdi_fini_evq(enp, eep->ee_index);
182 __checkReturn efx_rc_t
185 __in unsigned int count)
187 efx_nic_t *enp = eep->ee_enp;
191 rptr = count & eep->ee_mask;
193 EFX_POPULATE_DWORD_2(dword, ERF_GZ_EVQ_ID, eep->ee_index,
195 /* EVQ_INT_PRIME lives function control window only on Riverhead */
196 EFX_BAR_FCW_WRITED(enp, ER_GZ_EVQ_INT_PRIME, &dword);
206 _NOTE(ARGUNUSED(eep, data))
208 /* Not implemented yet */
209 EFSYS_ASSERT(B_FALSE);
212 static __checkReturn boolean_t
215 __in efx_qword_t *eventp,
216 __in const efx_ev_callbacks_t *eecp,
219 boolean_t should_abort;
222 code = EFX_QWORD_FIELD(*eventp, ESF_GZ_E_TYPE);
224 case ESE_GZ_EF100_EV_RX_PKTS:
225 should_abort = eep->ee_rx(eep, eventp, eecp, arg);
227 case ESE_GZ_EF100_EV_TX_COMPLETION:
228 should_abort = eep->ee_tx(eep, eventp, eecp, arg);
230 case ESE_GZ_EF100_EV_MCDI:
231 should_abort = eep->ee_mcdi(eep, eventp, eecp, arg);
234 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
235 uint32_t, EFX_QWORD_FIELD(*eventp, EFX_DWORD_1),
236 uint32_t, EFX_QWORD_FIELD(*eventp, EFX_DWORD_0));
238 EFSYS_ASSERT(eecp->eec_exception != NULL);
239 (void) eecp->eec_exception(arg, EFX_EXCEPTION_EV_ERROR, code);
240 should_abort = B_TRUE;
244 return (should_abort);
248 * Poll event queue in batches. Size of the batch is equal to cache line
249 * size divided by event size.
251 * Event queue is written by NIC and read by CPU. If CPU starts reading
252 * of events on the cache line, read all remaining events in a tight
253 * loop while event is present.
255 #define EF100_EV_BATCH 8
258 * Check if event is present.
260 * Riverhead EvQs use a phase bit to indicate the presence of valid events,
261 * by flipping the phase bit on each wrap of the write index.
263 #define EF100_EV_PRESENT(_qword, _phase_bit) \
264 (EFX_QWORD_FIELD((_qword), ESF_GZ_EV_EVQ_PHASE) == _phase_bit)
269 __inout unsigned int *countp,
270 __in const efx_ev_callbacks_t *eecp,
273 efx_qword_t ev[EF100_EV_BATCH];
275 unsigned int phase_bit;
281 #if EFSYS_OPT_EV_EXTENDED_WIDTH
282 if (eep->ee_flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) {
283 rhead_ev_ew_qpoll(eep, countp, eecp, arg);
286 #endif /* EFSYS_OPT_EV_EXTENDED_WIDTH */
288 EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
289 EFSYS_ASSERT(countp != NULL);
290 EFSYS_ASSERT(eecp != NULL);
294 /* Read up until the end of the batch period */
295 batch = EF100_EV_BATCH - (count & (EF100_EV_BATCH - 1));
296 phase_bit = (count & (eep->ee_mask + 1)) != 0;
297 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
298 for (total = 0; total < batch; ++total) {
299 EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
301 if (!EF100_EV_PRESENT(ev[total], phase_bit))
304 EFSYS_PROBE3(event, unsigned int, eep->ee_index,
305 uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
306 uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
308 offset += sizeof (efx_qword_t);
311 /* Process the batch of events */
312 for (index = 0; index < total; ++index) {
313 boolean_t should_abort;
315 EFX_EV_QSTAT_INCR(eep, EV_ALL);
318 rhead_ev_dispatch(eep, &(ev[index]), eecp, arg);
321 /* Ignore subsequent events */
325 * Poison batch to ensure the outer
326 * loop is broken out of.
328 EFSYS_ASSERT(batch <= EF100_EV_BATCH);
329 batch += (EF100_EV_BATCH << 1);
330 EFSYS_ASSERT(total != batch);
336 * There is no necessity to clear processed events since
337 * phase bit which is flipping on each write index wrap
338 * is used for event presence indication.
343 } while (total == batch);
348 #if EFSYS_OPT_EV_EXTENDED_WIDTH
350 rhead_ev_ew_dispatch(
352 __in efx_xword_t *eventp,
353 __in const efx_ev_callbacks_t *eecp,
356 boolean_t should_abort;
359 EFSYS_ASSERT((eep->ee_flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) != 0);
361 code = EFX_XWORD_FIELD(*eventp, ESF_GZ_EV_256_EV32_TYPE);
363 case ESE_GZ_EF100_EVEW_64BIT:
364 /* NOTE: ignore phase bit in encapsulated 64bit event. */
366 rhead_ev_dispatch(eep, &eventp->ex_qword[0], eecp, arg);
369 #if EFSYS_OPT_DESC_PROXY
370 case ESE_GZ_EF100_EVEW_TXQ_DESC:
371 should_abort = eep->ee_ew_txq_desc(eep, eventp, eecp, arg);
374 case ESE_GZ_EF100_EVEW_VIRTQ_DESC:
375 should_abort = eep->ee_ew_virtq_desc(eep, eventp, eecp, arg);
377 #endif /* EFSYS_OPT_DESC_PROXY */
380 /* Omit currently unused reserved bits from the probe. */
381 EFSYS_PROBE7(ew_bad_event, unsigned int, eep->ee_index,
382 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_7),
383 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_4),
384 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_3),
385 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_2),
386 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_1),
387 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_0));
389 EFSYS_ASSERT(eecp->eec_exception != NULL);
390 (void) eecp->eec_exception(arg, EFX_EXCEPTION_EV_ERROR, code);
391 should_abort = B_TRUE;
394 return (should_abort);
398 * Poll extended width event queue. Size of the batch is equal to cache line
399 * size divided by event size.
401 #define EF100_EV_EW_BATCH 2
404 * Check if event is present.
406 * Riverhead EvQs use a phase bit to indicate the presence of valid events,
407 * by flipping the phase bit on each wrap of the write index.
409 #define EF100_EV_EW_PRESENT(_xword, _phase_bit) \
410 (EFX_XWORD_FIELD((_xword), ESF_GZ_EV_256_EV32_PHASE) == (_phase_bit))
415 __inout unsigned int *countp,
416 __in const efx_ev_callbacks_t *eecp,
419 efx_xword_t ev[EF100_EV_EW_BATCH];
421 unsigned int phase_bit;
427 EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
428 EFSYS_ASSERT((eep->ee_flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) != 0);
429 EFSYS_ASSERT(countp != NULL);
430 EFSYS_ASSERT(eecp != NULL);
434 /* Read up until the end of the batch period */
435 batch = EF100_EV_EW_BATCH - (count & (EF100_EV_EW_BATCH - 1));
436 phase_bit = (count & (eep->ee_mask + 1)) != 0;
437 offset = (count & eep->ee_mask) * sizeof (efx_xword_t);
438 for (total = 0; total < batch; ++total) {
439 EFSYS_MEM_READX(eep->ee_esmp, offset, &(ev[total]));
441 if (!EF100_EV_EW_PRESENT(ev[total], phase_bit))
444 /* Omit unused reserved bits from the probe. */
445 EFSYS_PROBE7(ew_event, unsigned int, eep->ee_index,
446 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_7),
447 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_4),
448 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_3),
449 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_2),
450 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_1),
451 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_0));
453 offset += sizeof (efx_xword_t);
456 /* Process the batch of events */
457 for (index = 0; index < total; ++index) {
458 boolean_t should_abort;
460 EFX_EV_QSTAT_INCR(eep, EV_ALL);
463 rhead_ev_ew_dispatch(eep, &(ev[index]), eecp, arg);
466 /* Ignore subsequent events */
470 * Poison batch to ensure the outer
471 * loop is broken out of.
473 EFSYS_ASSERT(batch <= EF100_EV_EW_BATCH);
474 batch += (EF100_EV_EW_BATCH << 1);
475 EFSYS_ASSERT(total != batch);
481 * There is no necessity to clear processed events since
482 * phase bit which is flipping on each write index wrap
483 * is used for event presence indication.
488 } while (total == batch);
492 #endif /* EFSYS_OPT_EV_EXTENDED_WIDTH */
495 __checkReturn efx_rc_t
498 __in unsigned int us)
500 _NOTE(ARGUNUSED(eep, us))
508 rhead_ev_qstats_update(
510 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat)
514 for (id = 0; id < EV_NQSTATS; id++) {
515 efsys_stat_t *essp = &stat[id];
517 EFSYS_STAT_INCR(essp, eep->ee_stat[id]);
518 eep->ee_stat[id] = 0;
521 #endif /* EFSYS_OPT_QSTATS */
523 static __checkReturn boolean_t
526 __in efx_qword_t *eqp,
527 __in const efx_ev_callbacks_t *eecp,
530 efx_nic_t *enp = eep->ee_enp;
532 uint32_t num_packets;
533 boolean_t should_abort;
535 EFX_EV_QSTAT_INCR(eep, EV_RX);
537 /* Discard events after RXQ/TXQ errors, or hardware not available */
538 if (enp->en_reset_flags &
539 (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR | EFX_RESET_HW_UNAVAIL))
542 label = EFX_QWORD_FIELD(*eqp, ESF_GZ_EV_RXPKTS_Q_LABEL);
545 * On EF100 the EV_RX event reports the number of received
546 * packets (unlike EF10 which reports a descriptor index).
547 * The client driver is responsible for maintaining the Rx
548 * descriptor index, and computing how many descriptors are
549 * occupied by each received packet (based on the Rx buffer size
550 * and the packet length from the Rx prefix).
552 num_packets = EFX_QWORD_FIELD(*eqp, ESF_GZ_EV_RXPKTS_NUM_PKT);
555 * The receive event may indicate more than one packet, and so
556 * does not contain the packet length. Read the packet length
557 * from the prefix when handling each packet.
559 EFSYS_ASSERT(eecp->eec_rx_packets != NULL);
560 should_abort = eecp->eec_rx_packets(arg, label, num_packets,
563 return (should_abort);
566 static __checkReturn boolean_t
567 rhead_ev_tx_completion(
569 __in efx_qword_t *eqp,
570 __in const efx_ev_callbacks_t *eecp,
573 efx_nic_t *enp = eep->ee_enp;
576 boolean_t should_abort;
578 EFX_EV_QSTAT_INCR(eep, EV_TX);
580 /* Discard events after RXQ/TXQ errors, or hardware not available */
581 if (enp->en_reset_flags &
582 (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR | EFX_RESET_HW_UNAVAIL))
585 label = EFX_QWORD_FIELD(*eqp, ESF_GZ_EV_TXCMPL_Q_LABEL);
588 * On EF100 the EV_TX event reports the number of completed Tx
589 * descriptors (on EF10, the event reports the low bits of the
590 * index of the last completed descriptor).
591 * The client driver completion callback will compute the
592 * descriptor index, so that is not needed here.
594 num_descs = EFX_QWORD_FIELD(*eqp, ESF_GZ_EV_TXCMPL_NUM_DESC);
596 EFSYS_PROBE2(tx_ndescs, uint32_t, label, unsigned int, num_descs);
598 EFSYS_ASSERT(eecp->eec_tx_ndescs != NULL);
599 should_abort = eecp->eec_tx_ndescs(arg, label, num_descs);
601 return (should_abort);
604 static __checkReturn boolean_t
607 __in efx_qword_t *eqp,
608 __in const efx_ev_callbacks_t *eecp,
614 * Event format was changed post Riverhead R1 and now
615 * MCDI event layout on EF100 is exactly the same as on EF10
616 * except added QDMA phase bit which is unused on EF10.
618 ret = ef10_ev_mcdi(eep, eqp, eecp, arg);
623 #if EFSYS_OPT_DESC_PROXY
625 rhead_ev_ew_txq_desc(
627 __in efx_xword_t *eventp,
628 __in const efx_ev_callbacks_t *eecp,
631 efx_oword_t txq_desc;
633 boolean_t should_abort;
635 _NOTE(ARGUNUSED(eep))
637 vi_id = EFX_XWORD_FIELD(*eventp, ESF_GZ_EV_TXQ_DP_VI_ID);
640 * NOTE: This is the raw descriptor data, and has not been converted
641 * to host endian. The handler callback must use the EFX_OWORD macros
642 * to extract the descriptor fields as host endian values.
644 txq_desc = eventp->ex_oword[0];
646 EFSYS_ASSERT(eecp->eec_desc_proxy_txq_desc != NULL);
647 should_abort = eecp->eec_desc_proxy_txq_desc(arg, vi_id, txq_desc);
649 return (should_abort);
651 #endif /* EFSYS_OPT_DESC_PROXY */
654 #if EFSYS_OPT_DESC_PROXY
656 rhead_ev_ew_virtq_desc(
658 __in efx_xword_t *eventp,
659 __in const efx_ev_callbacks_t *eecp,
662 efx_oword_t virtq_desc;
665 boolean_t should_abort;
667 _NOTE(ARGUNUSED(eep))
669 vi_id = EFX_XWORD_FIELD(*eventp, ESF_GZ_EV_VQ_DP_VI_ID);
670 avail = EFX_XWORD_FIELD(*eventp, ESF_GZ_EV_VQ_DP_AVAIL_ENTRY);
673 * NOTE: This is the raw descriptor data, and has not been converted
674 * to host endian. The handler callback must use the EFX_OWORD macros
675 * to extract the descriptor fields as host endian values.
677 virtq_desc = eventp->ex_oword[0];
679 EFSYS_ASSERT(eecp->eec_desc_proxy_virtq_desc != NULL);
681 eecp->eec_desc_proxy_virtq_desc(arg, vi_id, avail, virtq_desc);
683 return (should_abort);
685 #endif /* EFSYS_OPT_DESC_PROXY */
687 #endif /* EFSYS_OPT_RIVERHEAD */