1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019-2021 Xilinx, Inc.
4 * Copyright(c) 2018-2019 Solarflare Communications Inc.
10 #if EFSYS_OPT_RIVERHEAD
13 * Non-interrupting event queue requires interrupting event queue to
14 * refer to for wake-up events even if wake ups are never used.
15 * It could be even non-allocated event queue.
17 #define EFX_RHEAD_ALWAYS_INTERRUPTING_EVQ_INDEX (0)
22 __in efx_qword_t *eventp,
23 __in const efx_ev_callbacks_t *eecp,
26 static __checkReturn boolean_t
29 __in efx_qword_t *eqp,
30 __in const efx_ev_callbacks_t *eecp,
33 static __checkReturn boolean_t
34 rhead_ev_tx_completion(
36 __in efx_qword_t *eqp,
37 __in const efx_ev_callbacks_t *eecp,
40 static __checkReturn boolean_t
43 __in efx_qword_t *eqp,
44 __in const efx_ev_callbacks_t *eecp,
47 #if EFSYS_OPT_EV_EXTENDED_WIDTH
51 __in efx_xword_t *eventp,
52 __in const efx_ev_callbacks_t *eecp,
58 __inout unsigned int *countp,
59 __in const efx_ev_callbacks_t *eecp,
62 #if EFSYS_OPT_DESC_PROXY
66 __in efx_xword_t *eventp,
67 __in const efx_ev_callbacks_t *eecp,
71 rhead_ev_ew_virtq_desc(
73 __in efx_xword_t *eventp,
74 __in const efx_ev_callbacks_t *eecp,
76 #endif /* EFSYS_OPT_DESC_PROXY */
77 #endif /* EFSYS_OPT_EV_EXTENDED_WIDTH */
80 __checkReturn efx_rc_t
96 __checkReturn efx_rc_t
99 __in unsigned int index,
100 __in efsys_mem_t *esmp,
108 const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
110 uint32_t target_evq = 0;
113 _NOTE(ARGUNUSED(id)) /* buftbl id managed by MC */
115 desc_size = encp->enc_ev_desc_size;
116 #if EFSYS_OPT_EV_EXTENDED_WIDTH
117 if (flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH)
118 desc_size = encp->enc_ev_ew_desc_size;
120 EFSYS_ASSERT(desc_size != 0);
122 if (EFSYS_MEM_SIZE(esmp) < (ndescs * desc_size)) {
123 /* Buffer too small for event queue descriptors */
128 /* Set up the handler table */
129 eep->ee_rx = rhead_ev_rx_packets;
130 eep->ee_tx = rhead_ev_tx_completion;
131 eep->ee_driver = NULL; /* FIXME */
132 eep->ee_drv_gen = NULL; /* FIXME */
133 eep->ee_mcdi = rhead_ev_mcdi;
135 #if EFSYS_OPT_DESC_PROXY
136 eep->ee_ew_txq_desc = rhead_ev_ew_txq_desc;
137 eep->ee_ew_virtq_desc = rhead_ev_ew_virtq_desc;
138 #endif /* EFSYS_OPT_DESC_PROXY */
140 /* Set up the event queue */
141 /* INIT_EVQ expects function-relative vector number */
142 if ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
143 EFX_EVQ_FLAGS_NOTIFY_INTERRUPT) {
144 /* IRQ number is specified by caller */
145 } else if (index == EFX_RHEAD_ALWAYS_INTERRUPTING_EVQ_INDEX) {
146 /* Use the first interrupt for always interrupting EvQ */
148 flags = (flags & ~EFX_EVQ_FLAGS_NOTIFY_MASK) |
149 EFX_EVQ_FLAGS_NOTIFY_INTERRUPT;
151 target_evq = EFX_RHEAD_ALWAYS_INTERRUPTING_EVQ_INDEX;
155 * Interrupts may be raised for events immediately after the queue is
156 * created. See bug58606.
158 rc = efx_mcdi_init_evq(enp, index, esmp, ndescs, irq, target_evq, us,
168 EFSYS_PROBE1(fail1, efx_rc_t, rc);
177 efx_nic_t *enp = eep->ee_enp;
179 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_RIVERHEAD);
181 (void) efx_mcdi_fini_evq(enp, eep->ee_index);
184 __checkReturn efx_rc_t
187 __in unsigned int count)
189 efx_nic_t *enp = eep->ee_enp;
193 rptr = count & eep->ee_mask;
195 EFX_POPULATE_DWORD_2(dword, ERF_GZ_EVQ_ID, eep->ee_index,
197 /* EVQ_INT_PRIME lives function control window only on Riverhead */
198 EFX_BAR_FCW_WRITED(enp, ER_GZ_EVQ_INT_PRIME, &dword);
208 _NOTE(ARGUNUSED(eep, data))
210 /* Not implemented yet */
211 EFSYS_ASSERT(B_FALSE);
214 static __checkReturn boolean_t
217 __in efx_qword_t *eventp,
218 __in const efx_ev_callbacks_t *eecp,
221 boolean_t should_abort;
224 code = EFX_QWORD_FIELD(*eventp, ESF_GZ_E_TYPE);
226 case ESE_GZ_EF100_EV_RX_PKTS:
227 should_abort = eep->ee_rx(eep, eventp, eecp, arg);
229 case ESE_GZ_EF100_EV_TX_COMPLETION:
230 should_abort = eep->ee_tx(eep, eventp, eecp, arg);
232 case ESE_GZ_EF100_EV_MCDI:
233 should_abort = eep->ee_mcdi(eep, eventp, eecp, arg);
236 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
237 uint32_t, EFX_QWORD_FIELD(*eventp, EFX_DWORD_1),
238 uint32_t, EFX_QWORD_FIELD(*eventp, EFX_DWORD_0));
240 EFSYS_ASSERT(eecp->eec_exception != NULL);
241 (void) eecp->eec_exception(arg, EFX_EXCEPTION_EV_ERROR, code);
242 should_abort = B_TRUE;
246 return (should_abort);
250 * Poll event queue in batches. Size of the batch is equal to cache line
251 * size divided by event size.
253 * Event queue is written by NIC and read by CPU. If CPU starts reading
254 * of events on the cache line, read all remaining events in a tight
255 * loop while event is present.
257 #define EF100_EV_BATCH 8
260 * Check if event is present.
262 * Riverhead EvQs use a phase bit to indicate the presence of valid events,
263 * by flipping the phase bit on each wrap of the write index.
265 #define EF100_EV_PRESENT(_qword, _phase_bit) \
266 (EFX_QWORD_FIELD((_qword), ESF_GZ_EV_EVQ_PHASE) == _phase_bit)
271 __inout unsigned int *countp,
272 __in const efx_ev_callbacks_t *eecp,
275 efx_qword_t ev[EF100_EV_BATCH];
277 unsigned int phase_bit;
283 #if EFSYS_OPT_EV_EXTENDED_WIDTH
284 if (eep->ee_flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) {
285 rhead_ev_ew_qpoll(eep, countp, eecp, arg);
288 #endif /* EFSYS_OPT_EV_EXTENDED_WIDTH */
290 EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
291 EFSYS_ASSERT(countp != NULL);
292 EFSYS_ASSERT(eecp != NULL);
296 /* Read up until the end of the batch period */
297 batch = EF100_EV_BATCH - (count & (EF100_EV_BATCH - 1));
298 phase_bit = (count & (eep->ee_mask + 1)) != 0;
299 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
300 for (total = 0; total < batch; ++total) {
301 EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
303 if (!EF100_EV_PRESENT(ev[total], phase_bit))
306 EFSYS_PROBE3(event, unsigned int, eep->ee_index,
307 uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
308 uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
310 offset += sizeof (efx_qword_t);
313 /* Process the batch of events */
314 for (index = 0; index < total; ++index) {
315 boolean_t should_abort;
317 EFX_EV_QSTAT_INCR(eep, EV_ALL);
320 rhead_ev_dispatch(eep, &(ev[index]), eecp, arg);
323 /* Ignore subsequent events */
327 * Poison batch to ensure the outer
328 * loop is broken out of.
330 EFSYS_ASSERT(batch <= EF100_EV_BATCH);
331 batch += (EF100_EV_BATCH << 1);
332 EFSYS_ASSERT(total != batch);
338 * There is no necessity to clear processed events since
339 * phase bit which is flipping on each write index wrap
340 * is used for event presence indication.
345 } while (total == batch);
350 #if EFSYS_OPT_EV_EXTENDED_WIDTH
352 rhead_ev_ew_dispatch(
354 __in efx_xword_t *eventp,
355 __in const efx_ev_callbacks_t *eecp,
358 boolean_t should_abort;
361 EFSYS_ASSERT((eep->ee_flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) != 0);
363 code = EFX_XWORD_FIELD(*eventp, ESF_GZ_EV_256_EV32_TYPE);
365 case ESE_GZ_EF100_EVEW_64BIT:
366 /* NOTE: ignore phase bit in encapsulated 64bit event. */
368 rhead_ev_dispatch(eep, &eventp->ex_qword[0], eecp, arg);
371 #if EFSYS_OPT_DESC_PROXY
372 case ESE_GZ_EF100_EVEW_TXQ_DESC:
373 should_abort = eep->ee_ew_txq_desc(eep, eventp, eecp, arg);
376 case ESE_GZ_EF100_EVEW_VIRTQ_DESC:
377 should_abort = eep->ee_ew_virtq_desc(eep, eventp, eecp, arg);
379 #endif /* EFSYS_OPT_DESC_PROXY */
382 /* Omit currently unused reserved bits from the probe. */
383 EFSYS_PROBE7(ew_bad_event, unsigned int, eep->ee_index,
384 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_7),
385 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_4),
386 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_3),
387 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_2),
388 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_1),
389 uint32_t, EFX_XWORD_FIELD(*eventp, EFX_DWORD_0));
391 EFSYS_ASSERT(eecp->eec_exception != NULL);
392 (void) eecp->eec_exception(arg, EFX_EXCEPTION_EV_ERROR, code);
393 should_abort = B_TRUE;
396 return (should_abort);
400 * Poll extended width event queue. Size of the batch is equal to cache line
401 * size divided by event size.
403 #define EF100_EV_EW_BATCH 2
406 * Check if event is present.
408 * Riverhead EvQs use a phase bit to indicate the presence of valid events,
409 * by flipping the phase bit on each wrap of the write index.
411 #define EF100_EV_EW_PRESENT(_xword, _phase_bit) \
412 (EFX_XWORD_FIELD((_xword), ESF_GZ_EV_256_EV32_PHASE) == (_phase_bit))
417 __inout unsigned int *countp,
418 __in const efx_ev_callbacks_t *eecp,
421 efx_xword_t ev[EF100_EV_EW_BATCH];
423 unsigned int phase_bit;
429 EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
430 EFSYS_ASSERT((eep->ee_flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) != 0);
431 EFSYS_ASSERT(countp != NULL);
432 EFSYS_ASSERT(eecp != NULL);
436 /* Read up until the end of the batch period */
437 batch = EF100_EV_EW_BATCH - (count & (EF100_EV_EW_BATCH - 1));
438 phase_bit = (count & (eep->ee_mask + 1)) != 0;
439 offset = (count & eep->ee_mask) * sizeof (efx_xword_t);
440 for (total = 0; total < batch; ++total) {
441 EFSYS_MEM_READX(eep->ee_esmp, offset, &(ev[total]));
443 if (!EF100_EV_EW_PRESENT(ev[total], phase_bit))
446 /* Omit unused reserved bits from the probe. */
447 EFSYS_PROBE7(ew_event, unsigned int, eep->ee_index,
448 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_7),
449 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_4),
450 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_3),
451 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_2),
452 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_1),
453 uint32_t, EFX_XWORD_FIELD(ev[total], EFX_DWORD_0));
455 offset += sizeof (efx_xword_t);
458 /* Process the batch of events */
459 for (index = 0; index < total; ++index) {
460 boolean_t should_abort;
462 EFX_EV_QSTAT_INCR(eep, EV_ALL);
465 rhead_ev_ew_dispatch(eep, &(ev[index]), eecp, arg);
468 /* Ignore subsequent events */
472 * Poison batch to ensure the outer
473 * loop is broken out of.
475 EFSYS_ASSERT(batch <= EF100_EV_EW_BATCH);
476 batch += (EF100_EV_EW_BATCH << 1);
477 EFSYS_ASSERT(total != batch);
483 * There is no necessity to clear processed events since
484 * phase bit which is flipping on each write index wrap
485 * is used for event presence indication.
490 } while (total == batch);
494 #endif /* EFSYS_OPT_EV_EXTENDED_WIDTH */
497 __checkReturn efx_rc_t
500 __in unsigned int us)
502 _NOTE(ARGUNUSED(eep, us))
510 rhead_ev_qstats_update(
512 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat)
516 for (id = 0; id < EV_NQSTATS; id++) {
517 efsys_stat_t *essp = &stat[id];
519 EFSYS_STAT_INCR(essp, eep->ee_stat[id]);
520 eep->ee_stat[id] = 0;
523 #endif /* EFSYS_OPT_QSTATS */
525 static __checkReturn boolean_t
528 __in efx_qword_t *eqp,
529 __in const efx_ev_callbacks_t *eecp,
532 efx_nic_t *enp = eep->ee_enp;
534 uint32_t num_packets;
535 boolean_t should_abort;
537 EFX_EV_QSTAT_INCR(eep, EV_RX);
539 /* Discard events after RXQ/TXQ errors, or hardware not available */
540 if (enp->en_reset_flags &
541 (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR | EFX_RESET_HW_UNAVAIL))
544 label = EFX_QWORD_FIELD(*eqp, ESF_GZ_EV_RXPKTS_Q_LABEL);
547 * On EF100 the EV_RX event reports the number of received
548 * packets (unlike EF10 which reports a descriptor index).
549 * The client driver is responsible for maintaining the Rx
550 * descriptor index, and computing how many descriptors are
551 * occupied by each received packet (based on the Rx buffer size
552 * and the packet length from the Rx prefix).
554 num_packets = EFX_QWORD_FIELD(*eqp, ESF_GZ_EV_RXPKTS_NUM_PKT);
557 * The receive event may indicate more than one packet, and so
558 * does not contain the packet length. Read the packet length
559 * from the prefix when handling each packet.
561 EFSYS_ASSERT(eecp->eec_rx_packets != NULL);
562 should_abort = eecp->eec_rx_packets(arg, label, num_packets,
565 return (should_abort);
568 static __checkReturn boolean_t
569 rhead_ev_tx_completion(
571 __in efx_qword_t *eqp,
572 __in const efx_ev_callbacks_t *eecp,
575 efx_nic_t *enp = eep->ee_enp;
578 boolean_t should_abort;
580 EFX_EV_QSTAT_INCR(eep, EV_TX);
582 /* Discard events after RXQ/TXQ errors, or hardware not available */
583 if (enp->en_reset_flags &
584 (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR | EFX_RESET_HW_UNAVAIL))
587 label = EFX_QWORD_FIELD(*eqp, ESF_GZ_EV_TXCMPL_Q_LABEL);
590 * On EF100 the EV_TX event reports the number of completed Tx
591 * descriptors (on EF10, the event reports the low bits of the
592 * index of the last completed descriptor).
593 * The client driver completion callback will compute the
594 * descriptor index, so that is not needed here.
596 num_descs = EFX_QWORD_FIELD(*eqp, ESF_GZ_EV_TXCMPL_NUM_DESC);
598 EFSYS_PROBE2(tx_ndescs, uint32_t, label, unsigned int, num_descs);
600 EFSYS_ASSERT(eecp->eec_tx_ndescs != NULL);
601 should_abort = eecp->eec_tx_ndescs(arg, label, num_descs);
603 return (should_abort);
606 static __checkReturn boolean_t
609 __in efx_qword_t *eqp,
610 __in const efx_ev_callbacks_t *eecp,
616 * Event format was changed post Riverhead R1 and now
617 * MCDI event layout on EF100 is exactly the same as on EF10
618 * except added QDMA phase bit which is unused on EF10.
620 ret = ef10_ev_mcdi(eep, eqp, eecp, arg);
625 #if EFSYS_OPT_DESC_PROXY
627 rhead_ev_ew_txq_desc(
629 __in efx_xword_t *eventp,
630 __in const efx_ev_callbacks_t *eecp,
633 efx_oword_t txq_desc;
635 boolean_t should_abort;
637 _NOTE(ARGUNUSED(eep))
639 vi_id = EFX_XWORD_FIELD(*eventp, ESF_GZ_EV_TXQ_DP_VI_ID);
642 * NOTE: This is the raw descriptor data, and has not been converted
643 * to host endian. The handler callback must use the EFX_OWORD macros
644 * to extract the descriptor fields as host endian values.
646 txq_desc = eventp->ex_oword[0];
648 EFSYS_ASSERT(eecp->eec_desc_proxy_txq_desc != NULL);
649 should_abort = eecp->eec_desc_proxy_txq_desc(arg, vi_id, txq_desc);
651 return (should_abort);
653 #endif /* EFSYS_OPT_DESC_PROXY */
656 #if EFSYS_OPT_DESC_PROXY
658 rhead_ev_ew_virtq_desc(
660 __in efx_xword_t *eventp,
661 __in const efx_ev_callbacks_t *eecp,
664 efx_oword_t virtq_desc;
667 boolean_t should_abort;
669 _NOTE(ARGUNUSED(eep))
671 vi_id = EFX_XWORD_FIELD(*eventp, ESF_GZ_EV_VQ_DP_VI_ID);
672 avail = EFX_XWORD_FIELD(*eventp, ESF_GZ_EV_VQ_DP_AVAIL_ENTRY);
675 * NOTE: This is the raw descriptor data, and has not been converted
676 * to host endian. The handler callback must use the EFX_OWORD macros
677 * to extract the descriptor fields as host endian values.
679 virtq_desc = eventp->ex_oword[0];
681 EFSYS_ASSERT(eecp->eec_desc_proxy_virtq_desc != NULL);
683 eecp->eec_desc_proxy_virtq_desc(arg, vi_id, avail, virtq_desc);
685 return (should_abort);
687 #endif /* EFSYS_OPT_DESC_PROXY */
689 #endif /* EFSYS_OPT_RIVERHEAD */