1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019-2021 Xilinx, Inc.
4 * Copyright(c) 2018-2019 Solarflare Communications Inc.
7 #ifndef _SYS_RHEAD_IMPL_H
8 #define _SYS_RHEAD_IMPL_H
16 * Riverhead requires physically contiguous event rings (so, just one
17 * DMA address is sufficient to represent it), but MCDI interface is still
18 * in terms of 4k size 4k-aligned DMA buffers.
20 #define RHEAD_EVQ_MAXNBUFS 32
22 #define RHEAD_EVQ_MAXNEVS 16384
23 #define RHEAD_EVQ_MINNEVS 256
25 #define RHEAD_RXQ_MAXNDESCS 16384
26 #define RHEAD_RXQ_MINNDESCS 256
28 #define RHEAD_TXQ_MAXNDESCS 16384
29 #define RHEAD_TXQ_MINNDESCS 256
31 #define RHEAD_EVQ_DESC_SIZE (sizeof (efx_qword_t))
32 #define RHEAD_RXQ_DESC_SIZE (sizeof (efx_qword_t))
33 #define RHEAD_TXQ_DESC_SIZE (sizeof (efx_oword_t))
35 #if EFSYS_OPT_EV_EXTENDED_WIDTH
36 #define RHEAD_EVQ_EW_DESC_SIZE (sizeof (efx_xword_t))
43 extern __checkReturn efx_rc_t
48 extern __checkReturn efx_rc_t
53 extern __checkReturn efx_rc_t
54 rhead_nic_set_drv_limits(
55 __inout efx_nic_t *enp,
56 __in efx_drv_limits_t *edlp);
59 extern __checkReturn efx_rc_t
60 rhead_nic_get_vi_pool(
62 __out uint32_t *vi_countp);
65 extern __checkReturn efx_rc_t
66 rhead_nic_get_bar_region(
68 __in efx_nic_region_t region,
69 __out uint32_t *offsetp,
73 extern __checkReturn efx_rc_t
78 extern __checkReturn efx_rc_t
83 extern __checkReturn boolean_t
84 rhead_nic_hw_unavailable(
89 rhead_nic_set_hw_unavailable(
95 extern __checkReturn efx_rc_t
96 rhead_nic_register_test(
99 #endif /* EFSYS_OPT_DIAG */
104 __in efx_nic_t *enp);
109 __in efx_nic_t *enp);
115 extern __checkReturn efx_rc_t
117 __in efx_nic_t *enp);
122 __in efx_nic_t *enp);
125 extern __checkReturn efx_rc_t
128 __in unsigned int index,
129 __in efsys_mem_t *esmp,
135 __in efx_evq_t *eep);
140 __in efx_evq_t *eep);
143 extern __checkReturn efx_rc_t
146 __in unsigned int count);
158 __inout unsigned int *countp,
159 __in const efx_ev_callbacks_t *eecp,
163 extern __checkReturn efx_rc_t
166 __in unsigned int us);
172 rhead_ev_qstats_update(
174 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat);
176 #endif /* EFSYS_OPT_QSTATS */
182 extern __checkReturn efx_rc_t
185 __in efx_intr_type_t type,
186 __in efsys_mem_t *esmp);
191 __in efx_nic_t *enp);
196 __in efx_nic_t *enp);
200 rhead_intr_disable_unlocked(
201 __in efx_nic_t *enp);
204 extern __checkReturn efx_rc_t
207 __in unsigned int level);
211 rhead_intr_status_line(
213 __out boolean_t *fatalp,
214 __out uint32_t *qmaskp);
218 rhead_intr_status_message(
220 __in unsigned int message,
221 __out boolean_t *fatalp);
226 __in efx_nic_t *enp);
231 __in efx_nic_t *enp);
237 extern __checkReturn efx_rc_t
239 __in efx_nic_t *enp);
244 __in efx_nic_t *enp);
246 #if EFSYS_OPT_RX_SCATTER
249 extern __checkReturn efx_rc_t
250 rhead_rx_scatter_enable(
252 __in unsigned int buf_size);
254 #endif /* EFSYS_OPT_RX_SCATTER */
256 #if EFSYS_OPT_RX_SCALE
259 extern __checkReturn efx_rc_t
260 rhead_rx_scale_context_alloc(
262 __in efx_rx_scale_context_type_t type,
263 __in uint32_t num_queues,
264 __out uint32_t *rss_contextp);
267 extern __checkReturn efx_rc_t
268 rhead_rx_scale_context_free(
270 __in uint32_t rss_context);
273 extern __checkReturn efx_rc_t
274 rhead_rx_scale_mode_set(
276 __in uint32_t rss_context,
277 __in efx_rx_hash_alg_t alg,
278 __in efx_rx_hash_type_t type,
279 __in boolean_t insert);
282 extern __checkReturn efx_rc_t
283 rhead_rx_scale_key_set(
285 __in uint32_t rss_context,
286 __in_ecount(n) uint8_t *key,
290 extern __checkReturn efx_rc_t
291 rhead_rx_scale_tbl_set(
293 __in uint32_t rss_context,
294 __in_ecount(n) unsigned int *table,
298 extern __checkReturn uint32_t
299 rhead_rx_prefix_hash(
301 __in efx_rx_hash_alg_t func,
302 __in uint8_t *buffer);
304 #endif /* EFSYS_OPT_RX_SCALE */
307 extern __checkReturn efx_rc_t
308 rhead_rx_prefix_pktlen(
310 __in uint8_t *buffer,
311 __out uint16_t *lengthp);
317 __in_ecount(ndescs) efsys_dma_addr_t *addrp,
319 __in unsigned int ndescs,
320 __in unsigned int completed,
321 __in unsigned int added);
327 __in unsigned int added,
328 __inout unsigned int *pushedp);
331 extern __checkReturn efx_rc_t
333 __in efx_rxq_t *erp);
338 __in efx_rxq_t *erp);
340 union efx_rxq_type_data_u;
343 extern __checkReturn efx_rc_t
346 __in unsigned int index,
347 __in unsigned int label,
348 __in efx_rxq_type_t type,
349 __in const union efx_rxq_type_data_u *type_data,
350 __in efsys_mem_t *esmp,
353 __in unsigned int flags,
355 __in efx_rxq_t *erp);
360 __in efx_rxq_t *erp);
366 extern __checkReturn efx_rc_t
368 __in efx_nic_t *enp);
373 __in efx_nic_t *enp);
376 extern __checkReturn efx_rc_t
379 __in unsigned int index,
380 __in unsigned int label,
381 __in efsys_mem_t *esmp,
387 __out unsigned int *addedp);
392 __in efx_txq_t *etp);
395 extern __checkReturn efx_rc_t
398 __in_ecount(ndescs) efx_buffer_t *ebp,
399 __in unsigned int ndescs,
400 __in unsigned int completed,
401 __inout unsigned int *addedp);
407 __in unsigned int added,
408 __in unsigned int pushed);
411 extern __checkReturn efx_rc_t
414 __in unsigned int ns);
417 extern __checkReturn efx_rc_t
419 __in efx_txq_t *etp);
424 __in efx_txq_t *etp);
427 extern __checkReturn efx_rc_t
430 __in_ecount(n) efx_desc_t *ed,
432 __in unsigned int completed,
433 __inout unsigned int *addedp);
439 rhead_tx_qstats_update(
441 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat);
443 #endif /* EFSYS_OPT_QSTATS */
448 extern __checkReturn efx_rc_t
449 rhead_tunnel_reconfigure(
450 __in efx_nic_t *enp);
455 __in efx_nic_t *enp);
457 #endif /* EFSYS_OPT_TUNNEL */
462 * Perform discovery of function control window by looking for a
463 * EF100 locator in Xilinx capabilities tables.
466 extern __checkReturn efx_rc_t
467 rhead_pci_nic_membar_lookup(
468 __in efsys_pci_config_t *espcp,
469 __in const efx_pci_ops_t *epop,
470 __out efx_bar_region_t *ebrp);
472 #endif /* EFSYS_OPT_PCI */
475 extern __checkReturn efx_rc_t
476 rhead_nic_xilinx_cap_tbl_read_ef100_locator(
477 __in efsys_bar_t *esbp,
478 __in efsys_dma_addr_t offset,
479 __out efx_bar_region_t *ebrp);
484 extern __checkReturn efx_rc_t
486 __in efx_virtio_vq_t *evvp,
487 __in efx_virtio_vq_cfg_t *evvcp,
488 __in_opt efx_virtio_vq_dyncfg_t *evvdp);
491 extern __checkReturn efx_rc_t
493 __in efx_virtio_vq_t *evvp,
494 __out_opt efx_virtio_vq_dyncfg_t *evvdp);
497 extern __checkReturn efx_rc_t
498 rhead_virtio_get_doorbell_offset(
499 __in efx_virtio_vq_t *evvp,
500 __out uint32_t *offsetp);
503 extern __checkReturn efx_rc_t
504 rhead_virtio_get_features(
506 __in efx_virtio_device_type_t type,
507 __out uint64_t *featuresp);
510 extern __checkReturn efx_rc_t
511 rhead_virtio_verify_features(
513 __in efx_virtio_device_type_t type,
514 __in uint64_t features);
516 #endif /* EFSYS_OPT_VIRTIO */
522 #endif /* _SYS_RHEAD_IMPL_H */