1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019-2021 Xilinx, Inc.
4 * Copyright(c) 2009-2019 Solarflare Communications Inc.
7 #ifndef _SYS_SIENA_IMPL_H
8 #define _SYS_SIENA_IMPL_H
12 #include "siena_flash.h"
18 #ifndef EFX_TXQ_DC_SIZE
19 #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
21 #ifndef EFX_RXQ_DC_SIZE
22 #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
24 #define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
25 #define EFX_RXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
27 #define SIENA_EVQ_MAXNEVS 32768
28 #define SIENA_EVQ_MINNEVS 512
30 #define SIENA_TXQ_MAXNDESCS 4096
31 #define SIENA_TXQ_MINNDESCS 512
33 #define SIENA_RXQ_MAXNDESCS 4096
34 #define SIENA_RXQ_MINNDESCS 512
36 #define SIENA_EVQ_DESC_SIZE (sizeof (efx_qword_t))
37 #define SIENA_RXQ_DESC_SIZE (sizeof (efx_qword_t))
38 #define SIENA_TXQ_DESC_SIZE (sizeof (efx_qword_t))
40 #define SIENA_NVRAM_CHUNK 0x80
44 extern __checkReturn efx_rc_t
49 extern __checkReturn efx_rc_t
54 extern __checkReturn efx_rc_t
61 extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[];
63 typedef struct siena_register_set_s {
68 } siena_register_set_t;
71 extern __checkReturn efx_rc_t
72 siena_nic_register_test(
75 #endif /* EFSYS_OPT_DIAG */
87 #define SIENA_SRAM_ROWS 0x12000
97 extern __checkReturn efx_rc_t
100 __in efx_sram_pattern_fn_t func);
102 #endif /* EFSYS_OPT_DIAG */
107 extern __checkReturn efx_rc_t
110 __in const efx_mcdi_transport_t *mtp);
114 siena_mcdi_send_request(
116 __in_bcount(hdr_len) void *hdrp,
118 __in_bcount(sdu_len) void *sdup,
119 __in size_t sdu_len);
122 extern __checkReturn boolean_t
123 siena_mcdi_poll_response(
124 __in efx_nic_t *enp);
128 siena_mcdi_read_response(
130 __out_bcount(length) void *bufferp,
136 siena_mcdi_poll_reboot(
137 __in efx_nic_t *enp);
142 __in efx_nic_t *enp);
145 extern __checkReturn efx_rc_t
146 siena_mcdi_feature_supported(
148 __in efx_mcdi_feature_id_t id,
149 __out boolean_t *supportedp);
153 siena_mcdi_get_timeout(
155 __in efx_mcdi_req_t *emrp,
156 __out uint32_t *timeoutp);
158 #endif /* EFSYS_OPT_MCDI */
160 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
163 extern __checkReturn efx_rc_t
164 siena_nvram_partn_lock(
166 __in uint32_t partn);
169 extern __checkReturn efx_rc_t
170 siena_nvram_partn_unlock(
173 __out_opt uint32_t *verify_resultp);
176 extern __checkReturn efx_rc_t
177 siena_nvram_get_dynamic_cfg(
181 __out siena_mc_dynamic_config_hdr_t **dcfgp,
182 __out size_t *sizep);
184 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
191 extern __checkReturn efx_rc_t
193 __in efx_nic_t *enp);
195 #endif /* EFSYS_OPT_DIAG */
198 extern __checkReturn efx_rc_t
199 siena_nvram_get_subtype(
202 __out uint32_t *subtypep);
205 extern __checkReturn efx_rc_t
206 siena_nvram_type_to_partn(
208 __in efx_nvram_type_t type,
209 __out uint32_t *partnp);
212 extern __checkReturn efx_rc_t
213 siena_nvram_partn_size(
216 __out size_t *sizep);
219 extern __checkReturn efx_rc_t
220 siena_nvram_partn_info(
223 __out efx_nvram_info_t * enip);
226 extern __checkReturn efx_rc_t
227 siena_nvram_partn_rw_start(
230 __out size_t *chunk_sizep);
233 extern __checkReturn efx_rc_t
234 siena_nvram_partn_read(
237 __in unsigned int offset,
238 __out_bcount(size) caddr_t data,
242 extern __checkReturn efx_rc_t
243 siena_nvram_partn_erase(
246 __in unsigned int offset,
250 extern __checkReturn efx_rc_t
251 siena_nvram_partn_write(
254 __in unsigned int offset,
255 __out_bcount(size) caddr_t data,
259 extern __checkReturn efx_rc_t
260 siena_nvram_partn_rw_finish(
263 __out_opt uint32_t *verify_resultp);
266 extern __checkReturn efx_rc_t
267 siena_nvram_partn_get_version(
270 __out uint32_t *subtypep,
271 __out_ecount(4) uint16_t version[4]);
274 extern __checkReturn efx_rc_t
275 siena_nvram_partn_set_version(
278 __in_ecount(4) uint16_t version[4]);
280 #endif /* EFSYS_OPT_NVRAM */
285 extern __checkReturn efx_rc_t
287 __in efx_nic_t *enp);
290 extern __checkReturn efx_rc_t
293 __out size_t *sizep);
296 extern __checkReturn efx_rc_t
299 __out_bcount(size) caddr_t data,
303 extern __checkReturn efx_rc_t
306 __in_bcount(size) caddr_t data,
310 extern __checkReturn efx_rc_t
313 __in_bcount(size) caddr_t data,
317 extern __checkReturn efx_rc_t
320 __in_bcount(size) caddr_t data,
322 __inout efx_vpd_value_t *evvp);
325 extern __checkReturn efx_rc_t
328 __in_bcount(size) caddr_t data,
330 __in efx_vpd_value_t *evvp);
333 extern __checkReturn efx_rc_t
336 __in_bcount(size) caddr_t data,
338 __out efx_vpd_value_t *evvp,
339 __inout unsigned int *contp);
342 extern __checkReturn efx_rc_t
345 __in_bcount(size) caddr_t data,
351 __in efx_nic_t *enp);
353 #endif /* EFSYS_OPT_VPD */
355 typedef struct siena_link_state_s {
356 uint32_t sls_adv_cap_mask;
357 uint32_t sls_lp_cap_mask;
358 unsigned int sls_fcntl;
359 efx_link_mode_t sls_link_mode;
360 #if EFSYS_OPT_LOOPBACK
361 efx_loopback_type_t sls_loopback;
363 boolean_t sls_mac_up;
364 } siena_link_state_t;
370 __in efx_qword_t *eqp,
371 __out efx_link_mode_t *link_modep);
374 extern __checkReturn efx_rc_t
377 __out siena_link_state_t *slsp);
380 extern __checkReturn efx_rc_t
386 extern __checkReturn efx_rc_t
387 siena_phy_reconfigure(
388 __in efx_nic_t *enp);
391 extern __checkReturn efx_rc_t
393 __in efx_nic_t *enp);
396 extern __checkReturn efx_rc_t
399 __out uint32_t *ouip);
401 #if EFSYS_OPT_PHY_STATS
405 siena_phy_decode_stats(
408 __in_opt efsys_mem_t *esmp,
409 __out_opt uint64_t *smaskp,
410 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat);
413 extern __checkReturn efx_rc_t
414 siena_phy_stats_update(
416 __in efsys_mem_t *esmp,
417 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
419 #endif /* EFSYS_OPT_PHY_STATS */
424 extern __checkReturn efx_rc_t
425 siena_phy_bist_start(
427 __in efx_bist_type_t type);
430 extern __checkReturn efx_rc_t
433 __in efx_bist_type_t type,
434 __out efx_bist_result_t *resultp,
435 __out_opt __drv_when(count > 0, __notnull)
436 uint32_t *value_maskp,
437 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
438 unsigned long *valuesp,
445 __in efx_bist_type_t type);
447 #endif /* EFSYS_OPT_BIST */
450 extern __checkReturn efx_rc_t
453 __out efx_link_mode_t *link_modep);
456 extern __checkReturn efx_rc_t
459 __out boolean_t *mac_upp);
462 extern __checkReturn efx_rc_t
463 siena_mac_reconfigure(
464 __in efx_nic_t *enp);
467 extern __checkReturn efx_rc_t
472 #if EFSYS_OPT_LOOPBACK
475 extern __checkReturn efx_rc_t
476 siena_mac_loopback_set(
478 __in efx_link_mode_t link_mode,
479 __in efx_loopback_type_t loopback_type);
481 #endif /* EFSYS_OPT_LOOPBACK */
483 #if EFSYS_OPT_MAC_STATS
486 extern __checkReturn efx_rc_t
487 siena_mac_stats_get_mask(
489 __inout_bcount(mask_size) uint32_t *maskp,
490 __in size_t mask_size);
493 extern __checkReturn efx_rc_t
494 siena_mac_stats_update(
496 __in efsys_mem_t *esmp,
497 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
498 __inout_opt uint32_t *generationp);
500 #endif /* EFSYS_OPT_MAC_STATS */
506 #endif /* _SYS_SIENA_IMPL_H */